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JPS61112661A - Conductive path wiring board for thermal head and method for manufacturing the same - Google Patents

Conductive path wiring board for thermal head and method for manufacturing the same

Info

Publication number
JPS61112661A
JPS61112661A JP25113585A JP25113585A JPS61112661A JP S61112661 A JPS61112661 A JP S61112661A JP 25113585 A JP25113585 A JP 25113585A JP 25113585 A JP25113585 A JP 25113585A JP S61112661 A JPS61112661 A JP S61112661A
Authority
JP
Japan
Prior art keywords
conductive path
wiring board
thermal head
conductive
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25113585A
Other languages
Japanese (ja)
Inventor
Hideo Abe
阿部 秀郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP25113585A priority Critical patent/JPS61112661A/en
Publication of JPS61112661A publication Critical patent/JPS61112661A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/345Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads characterised by the arrangement of resistors or conductors

Landscapes

  • Electronic Switches (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔技術分野〕 この発明は、サーマルヘッド装置の発熱抵抗体に駆動電
力を供給するための3!S電路配線基板およびその製造
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention provides 3! for supplying driving power to a heating resistor of a thermal head device. The present invention relates to an S circuit wiring board and a method for manufacturing the same.

〔従来技術〕[Prior art]

サーマルヘッド装置の構成は、例えば第1図に示すよう
であり、発熱記録を行うための抵抗体10Δを有するセ
ラミック基板10と、抵抗体10Aに駆動電力を供給す
るための導電路11Aを(jりるガラス丁ボ1シ基板1
1と、ドライバ用回路を含む集積回路チップ12△を搭
載する基体10.11間を接続するテープキャリア12
とを備えている。
The configuration of the thermal head device is, for example, as shown in FIG. Ruru glass board 1 board 1
1 and a base 10.11 on which an integrated circuit chip 12Δ including a driver circuit is mounted.
It is equipped with

ここで、ガラス1ボキシ基体11は、ガラス布基材にエ
ボー1シ樹脂を含浸させたがラスエポキシ材料から成る
基体Cあり、抵抗体10Aに駆動電力を供給するための
特定の配線パターンを右する導電路11Δを基体の片面
に有する。この場合、導電路e、rはそれぞれデータの
導出路(「データアウト路」)及びデータの導入路(「
データイン路」)であるが、例えばデータイン路e−2
゜e−3はその端部が基体の周縁部にまで伸びていない
Here, the glass 1 boxy base 11 is a glass cloth base material impregnated with Evo 1 resin, but there is also a base C made of lath epoxy material, and a specific wiring pattern for supplying driving power to the resistor 10A is used. A conductive path 11Δ is provided on one side of the base. In this case, the conductive paths e and r are a data outgoing path (“data out path”) and a data incoming path (“data out path”), respectively.
data-in path"), but for example, data-in path e-2
The end of °e-3 does not extend to the periphery of the base.

このような導電路を形成するには導電路をエツチングに
よって形成した後はんだめっきをする必要があるが、こ
のため電解めっきをするための電極又は端子がうまく取
出せず不便であった。この場合、導電路を形成する前に
銅箔全体に電解+、1んだめつきをした後エツチングを
行う方法も元えられるが、はんだと銅の二層をエツチン
グしな(−Jればならず工程が複雑となり高価となる。
In order to form such a conductive path, it is necessary to form the conductive path by etching and then perform solder plating, but this is inconvenient because the electrodes or terminals for electrolytic plating cannot be taken out properly. In this case, before forming the conductive path, the entire copper foil can be electrolytically + soldered and then etched, but the two layers of solder and copper cannot be etched (-J). The process becomes complicated and expensive.

このため、従来は、エツチングの後にローラではんだを
塗布したり、また全体を溶融はんだ槽に浸したりしてい
た。しかし、この場合にははんだ厚の制御が難しくボン
ディング性能にバラツキが生じ望ましくなかった。
For this reason, conventionally, after etching, solder was applied with a roller, or the whole was immersed in a bath of molten solder. However, in this case, it is difficult to control the solder thickness, and bonding performance varies, which is not desirable.

〔目 的〕〔the purpose〕

この発明は、以上の従来技術の欠点を除去しようとして
成されたものであり、導電路への電解はんだめっきが容
易であるようなナーマルヘッドの導電路配線基板および
その製造方法を提供することを目的とする。
The present invention was made in an attempt to eliminate the above-mentioned drawbacks of the prior art, and an object of the present invention is to provide a conductive path wiring board for a thermal head and a method for manufacturing the same, in which electrolytic solder plating on the conductive path is easy. shall be.

(構 成〕 以下、添付図面に従ってこの発明の詳細な説明する。(composition〕 Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

第2図はこの発明の実施例を示すものCあり、発熱記録
を行うための抵抗体20’Aを有するセラミック基体2
0と、抵抗体2OAに駆動電力を供給するための導電路
21Aを有するガラスエポキシ基体21と、これらの基
体20.21間を電気的且つ能動的に接続る、ICチッ
プ22Aを搭載したテープキャリア22とを備えている
FIG. 2 shows an embodiment of the present invention, in which a ceramic base 2 has a resistor 20'A for recording heat generation.
0, a glass epoxy base 21 having a conductive path 21A for supplying driving power to the resistor 2OA, and a tape carrier mounted with an IC chip 22A that electrically and actively connects these bases 20 and 21. 22.

セラミック基体20は、レラミック材料から成る基体で
あり、その表面には発熱記録を行うための抵抗体2OA
が連続的に又は断続的に列状に成形されている。この抵
抗体2OAからは各々所定数の電1420Bが引出され
ている。抵抗体20Aの構造及び電M20Bとの接続等
については公知であるため、訂しい説明は省略する。
The ceramic base 20 is a base made of a reramic material, and has a resistor 2OA on its surface for recording heat generation.
are formed continuously or intermittently in rows. A predetermined number of electric currents 1420B are drawn out from each resistor 2OA. The structure of the resistor 20A, the connection with the electric conductor M20B, etc. are well known, so detailed explanations thereof will be omitted.

ガラス」ボキシ基体21は、前述した様にガラスエポキ
シ材料から成る基体であり、この発明によれば、抵抗体
2OAに駆!IJJ電力を供給するため特定の配線パタ
ーンを有する導電路21Aを基体の片面にのみ右する。
As described above, the glass box base 21 is a base made of glass epoxy material, and according to the present invention, it is used as a base for the resistor 2OA. In order to supply IJJ power, a conductive path 21A having a specific wiring pattern is provided on only one side of the base.

ここで、配線パターンの各導電路をa〜hで示しである
が、例えばa−cjは第1から第4のストローブパルス
を与える信号路、e、lま7−ス、クロックその他の信
号路、0はデータの導入路(「データイン路」)、hは
データの導出路(「データアウト路」)、である。スト
ローブパルスを与える信号路a−dは経時的に順次パル
スが与えられ、グループ分けされた各電極群が該当する
パルスによって駆動されることとなる。データイン路Q
は例えばイメージセンサ(図示せず)によって検出され
た画像情報を各画素毎のシリアルデジタル信号として送
り込むものである。このデジタル信号は各ドライバ集積
回路を介し′C低抗体2OA及び次のドライバ集積回路
へ送られる。
Here, each conductive path of the wiring pattern is indicated by a to h, and for example, a-cj is a signal path that provides the first to fourth strobe pulses, e, l and 7-s, clock and other signal paths. , 0 is a data introduction path (“data in path”), and h is a data derivation path (“data out path”). Pulses are sequentially applied to signal paths a to d for applying strobe pulses over time, and each grouped electrode group is driven by the corresponding pulse. Data in path Q
For example, image information detected by an image sensor (not shown) is sent as a serial digital signal for each pixel. This digital signal is sent through each driver integrated circuit to the 'C low antibody 2OA and the next driver integrated circuit.

すなわち、図示したテープキャリア22のうら1番左の
テープキャリア22−1のICチップを介して画像情報
信号をシリアルに配列さUるべく、この信号をデータア
ウト路h1に送り出り。このデータアウト路h1は次の
テープキャリア22−2へのデータイン路となっている
。以下同様の接続が行われ、1番右のテープ:1ヤリ?
 22− nの1つ前のテープキャリア22− (n−
1>からのデータアウト路h  は1香石のテープキャ
リアn−1 22−nへのデータイン路とな−)(−いる。これから
b分かるように、各導電路Q、hは各テープキャリア7
22のIcチップ内のシフトレジスタを直列に接続する
配線パターンを成していて、このため隣り合った導電路
となっている。しかも、これらの導電路は基体21の外
側部分に形成されている。
That is, in order to serially arrange image information signals via the IC chip of the leftmost tape carrier 22-1 at the rear of the illustrated tape carrier 22, this signal is sent to the data out path h1. This data out path h1 serves as a data in path to the next tape carrier 22-2. The same connection is made below, and the rightmost tape: 1 spear?
Tape carrier 22- (n-
The data out path h from 1> is the data in path to the tape carrier n-1 22-n of the 1st grade stone.As can be seen, each conductive path Q, h is connected to each tape carrier. 7
It forms a wiring pattern that connects the shift registers in 22 IC chips in series, thus forming adjacent conductive paths. Moreover, these conductive paths are formed on the outer portion of the base body 21.

また、導電路21Aの各配線パターンa〜Qの端部は基
体21の端部21aまで伸長しており、且つこの端部2
1a付近で導電路21A全体の幅を拡げである。端部2
1aに接して各導電路21Aは端子を形成すべく広幅部
21bが形成されている。また、データイン路及びデー
タアウト路h1〜hoを形成する導電路はその中間部分
から基体21の端部21Gに伸びる導電路を有し、その
導電路の端部は端子を形成する広幅部21dが形成され
ている。この広幅部21dはテスト用の端子として用い
ることができる。またテープキャリア22−1の各線A
、B・・・Gはガラスエポキシ基体21に設けられた配
線パターンa、b、・・・Qとそれぞれ接続箇所1′C
−接続される。
Further, the ends of each of the wiring patterns a to Q of the conductive path 21A extend to the end 21a of the base 21, and this end 2
The width of the entire conductive path 21A is increased near 1a. End 2
1a, each conductive path 21A has a wide portion 21b formed to form a terminal. Further, the conductive path forming the data-in path and the data-out path h1 to ho has a conductive path extending from the intermediate portion to the end portion 21G of the base 21, and the end of the conductive path is a wide portion 21d forming a terminal. is formed. This wide portion 21d can be used as a test terminal. Also, each line A of the tape carrier 22-1
, B...G are connection points 1'C with wiring patterns a, b,...Q provided on the glass epoxy base 21, respectively.
- Connected.

この様な基体21は次の様にして製造寸ろことができる
。先づ、第3図に示す様に、本来基体となるべき部分2
1に加えCその外側に余分をど−)た領域30を設けて
おく。これらの領域21゜30の上に前述のパターン2
1△及びこれと電気的に接続した電解めっき用電極31
をエツチングによっC形成する。このようにすることに
より、全てのパターン21Aは電解めっき用共通゛市欅
31と接続されているため、容易に電解めっきをパター
ン21A上に形成することができる。電解めっきの終了
後、領域30を切落すことににり所望の導電路配線板が
得られる。
Such a base body 21 can be manufactured and sized as follows. First, as shown in Figure 3, the part 2 that should originally become the base.
In addition to C, a region 30 is provided outside of C with an extra portion. The above-mentioned pattern 2 is placed on these areas 21°30.
1△ and electrolytic plating electrode 31 electrically connected thereto
C is formed by etching. By doing so, all the patterns 21A are connected to the common keyaki plate 31 for electrolytic plating, so that electrolytic plating can be easily formed on the patterns 21A. After the electrolytic plating is completed, the desired conductive path wiring board is obtained by cutting off the region 30.

〔効 果〕〔effect〕

以上のように本発明にかかるサーマルヘッドの導電路配
線基板によれば基体端部におけろ導電路を広幅に形成し
ているため電解めっき用の電N(を共通に形成すること
ができ、また本発明にかかるサーマルヘッドの導電路配
線基板の製造方法によれば、あらかじめ広く形成しIC
基板上に電解めっき用の共通電極およびこれに接続され
た配線パターンを電解めっきした後不要部分を切断除去
するようにしているので良質の電界めっきが経済的に可
能となる。
As described above, according to the conductive path wiring board of the thermal head according to the present invention, since the conductive path is formed in a wide width at the end of the base, it is possible to commonly form the conductive path for electrolytic plating. Further, according to the method for manufacturing a conductive path wiring board for a thermal head according to the present invention, it is possible to form a wide area in advance and
Since the common electrode for electrolytic plating and the wiring pattern connected thereto are electrolytically plated on the substrate, unnecessary portions are cut and removed, making high-quality electrolytic plating economically possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のナーマルヘッド装置の構成図、第2図は
この発明の一実施例の構成図、第3図は第2図の実施例
に係る配線基板の製造の様子を示す説明図ぐある。 10.20・・・セラミック基体く第1の基体)、11
.21・・・ガラスエポキシ基体(第2の基体)、10
A、20△・・・抵抗体、IIA、21A・・・導電路
、12.22・・・テープキレリア、21 a、 21
 c・15部、21b、21d、、、広幅部。 出願人代狸人  佐  藤  −雄 興 1 霞 1A
Fig. 1 is a block diagram of a conventional thermal head device, Fig. 2 is a block diagram of an embodiment of the present invention, and Fig. 3 is an explanatory diagram showing the state of manufacturing a wiring board according to the embodiment of Fig. 2. . 10.20...ceramic substrate (first substrate), 11
.. 21...Glass epoxy base (second base), 10
A, 20Δ...Resistor, IIA, 21A...Conducting path, 12.22...Tape Kyrelia, 21 a, 21
c・15 parts, 21b, 21d,, wide part. Applicant Tanukito Sato - Yuuki 1 Kasumi 1A

Claims (1)

【特許請求の範囲】 1、第1の基体上に形成された発熱記録を行うための抵
抗体に駆動電力を供給する複数の導電路と、この導電路
の途中で前記抵抗体を駆動する駆動回路を含む集積回路
とを第2の基体上に備えたサーマルヘッドの導電路配線
基板において、前記各導電路は電解めっきが施され、そ
の少なくとも一端部は前記第2の基体の端部まで伸長し
て配設され、かつ該導電路端部はそれより内方側の配線
パターンよりも広幅に形成されていることを特徴とする
サーマルヘッドの導電路配線基板。 2、サーマルヘッドの抵抗体に駆動電力を供給するため
の複数の導電路を備えたサーマルヘッドの導電路配線基
板を製造する方法において、配線基板を完成状態よりも
大きく形成しておき、導電路をなす配線パターンと共に
、大きく形成された外方領域において各導電路を共通接
続した共通電極を形成し、 この共通電極を用いて前記導電路を電解めっきし、 前記共通電極を有する外方領域を切断除去するようにし
たことを特徴とする導電路配線基板の製造方法。 3、電解めっきが電解はんだめっきである特許請求の範
囲第2項記載の導電路配線基板の製造方法。
[Claims] 1. A plurality of conductive paths for supplying driving power to a resistor for recording heat generation formed on a first substrate, and a drive for driving the resistor in the middle of the conductive path. In a conductive path wiring board for a thermal head having an integrated circuit including a circuit on a second substrate, each of the conductive paths is electrolytically plated, and at least one end thereof extends to an end of the second substrate. 1. A conductive path wiring board for a thermal head, characterized in that the end portion of the conductive path is formed wider than the wiring pattern on the inner side thereof. 2. In a method for manufacturing a conductive path wiring board for a thermal head that is provided with a plurality of conductive paths for supplying driving power to the resistor of the thermal head, the wiring board is formed larger than the completed state, and the conductive paths are forming a common electrode that connects the conductive paths in common in a large outer area together with a wiring pattern forming a large outer area, electrolytically plating the conductive paths using this common electrode, and forming an outer area having the common electrode. A method of manufacturing a conductive path wiring board, characterized in that the conductive path wiring board is cut and removed. 3. The method for manufacturing a conductive path wiring board according to claim 2, wherein the electrolytic plating is electrolytic solder plating.
JP25113585A 1985-11-09 1985-11-09 Conductive path wiring board for thermal head and method for manufacturing the same Pending JPS61112661A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25113585A JPS61112661A (en) 1985-11-09 1985-11-09 Conductive path wiring board for thermal head and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25113585A JPS61112661A (en) 1985-11-09 1985-11-09 Conductive path wiring board for thermal head and method for manufacturing the same

Publications (1)

Publication Number Publication Date
JPS61112661A true JPS61112661A (en) 1986-05-30

Family

ID=17218192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25113585A Pending JPS61112661A (en) 1985-11-09 1985-11-09 Conductive path wiring board for thermal head and method for manufacturing the same

Country Status (1)

Country Link
JP (1) JPS61112661A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6847861B2 (en) 2001-11-30 2005-01-25 Mckesson Automation, Inc. Carousel product for use in integrated restocking and dispensing system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5448562A (en) * 1977-07-30 1979-04-17 Nippon Telegr & Teleph Corp <Ntt> Recording head
JPS55166268A (en) * 1979-06-11 1980-12-25 Matsushita Electric Ind Co Ltd Manufacture of thermal head

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5448562A (en) * 1977-07-30 1979-04-17 Nippon Telegr & Teleph Corp <Ntt> Recording head
JPS55166268A (en) * 1979-06-11 1980-12-25 Matsushita Electric Ind Co Ltd Manufacture of thermal head

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6847861B2 (en) 2001-11-30 2005-01-25 Mckesson Automation, Inc. Carousel product for use in integrated restocking and dispensing system

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