JPS6070973A - Dc/dc converter - Google Patents
Dc/dc converterInfo
- Publication number
- JPS6070973A JPS6070973A JP58176322A JP17632283A JPS6070973A JP S6070973 A JPS6070973 A JP S6070973A JP 58176322 A JP58176322 A JP 58176322A JP 17632283 A JP17632283 A JP 17632283A JP S6070973 A JPS6070973 A JP S6070973A
- Authority
- JP
- Japan
- Prior art keywords
- transformer
- fet
- effect transistor
- field effect
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/337—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/01—Resonant DC/DC converters
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
【発明の詳細な説明】
(技術分野)
本発明はスイッチング・レギーレータ等に使用する自励
式インバータを用いたDC−DCコンバータに係り、特
にスイッチング素子としての電界効果トランジスタ個有
の浮遊容量とトランスのインダクタンスによる共振条件
で自励発振をする自励式インバータ回路を用いたDC−
DCコンバータに関するものである。Detailed Description of the Invention (Technical Field) The present invention relates to a DC-DC converter using a self-commutated inverter used in a switching regirator, etc., and particularly relates to a stray capacitance unique to a field effect transistor as a switching element and a transformer. DC- using a self-excited inverter circuit that performs self-excited oscillation under resonance conditions due to inductance.
This relates to a DC converter.
(従来技術)
従来、自励式インバータはトランスの飽和特性を利用し
た自励発振回路であシ、その代表的なものとして第1図
に示すロイヤー回路がある。同図から分るように、ロイ
ヤー回路はマルチパイプレ−タ回路のCR結合をM結合
にしたのと同じで、同一特性の2個のトランジスタQl
、Q2で交互にスイッチング動作を行ない、トランスを
通じて2次側に電力を発生させている自励発振回路であ
る。(Prior Art) Conventionally, a self-excited inverter is a self-excited oscillation circuit that utilizes the saturation characteristics of a transformer, and a typical example thereof is the Royer circuit shown in FIG. As can be seen from the figure, the Royer circuit is the same as changing the CR coupling of a multipipulator circuit to an M coupling, and it uses two transistors Ql with the same characteristics.
, Q2 alternately perform switching operations, and generate power on the secondary side through a transformer.
いま、直流電圧vcoがトランジスタQl、Q2のコレ
クタ・エミッタ間に急激に加わると、同時に起動抵抗R
8にてトランジスタQl、Q2に順方向のバイアスが与
えられ、コレクタ・エミッタ間に電流が流れるのである
が、同一特性のトランジスタであっても内部浮遊容量な
どの違いによって電流は両者とも全く等しいということ
ではなくどちらかの電流がよシ多く、バランスがくずれ
ているのが普通である。Now, when DC voltage vco is suddenly applied between the collectors and emitters of transistors Ql and Q2, at the same time the starting resistance R
8, a forward bias is applied to transistors Ql and Q2, and a current flows between the collector and emitter. However, even if the transistors have the same characteristics, the current is exactly the same for both transistors due to differences in internal stray capacitance, etc. It is normal for one of the currents to be higher than the other, causing an imbalance.
かりに、Qlを通して電流が多かった場合、コアは励磁
されNB、巻線に誘発された電圧はQlのべ−を
スに加わり(hのコレクタ電流により増加させる方向に
、他方NB2巻線に誘起された電圧はQ2をOFFのま
ま保持する方向に働く。On the other hand, if the current through Ql is large, the core is excited and the voltage induced in the winding NB is applied to the base of Ql (in the direction of increasing by the collector current of h, on the other hand, the voltage induced in the NB2 winding is The applied voltage acts in a direction to keep Q2 OFF.
この正帰還作用はQlを急速にONI Q2をOFFに
する。この時、コアは直線的変化で磁化され、Qlが不
飽和にならない限りコアのインダクタンスとコレクタ電
流の時間変化分は一定のままである。This positive feedback action quickly turns Ql ONI Q2 OFF. At this time, the core is magnetized with a linear change, and the time changes in the core inductance and collector current remain constant unless Ql becomes unsaturated.
・やがてコアがその飽和磁束に達するとインダクタンス
は急激に減少し、その結果、第2図(B)波形のように
コレクタ電流の時間的変化分は無限大となる。- When the core eventually reaches its saturation magnetic flux, the inductance decreases rapidly, and as a result, the time change in the collector current becomes infinite, as shown in the waveform in FIG. 2 (B).
即ちコレクタ電流がベース電流のh□倍に達するとQl
は不飽和となシ、トランスの各巻線の誘起電圧は減少す
るから、供給しているベース電流も減少し、それにつれ
てコレクタ電流も減少を開始するのである。That is, when the collector current reaches h□ times the base current, Ql
is unsaturated, and the induced voltage in each winding of the transformer decreases, so the supplied base current also decreases, and the collector current also begins to decrease accordingly.
コアは飽和してもなおいくらかの残留インダクタンスを
有しておシ、この残留インダクタンスはコレクタ電流が
減少すると、いままでとは逆の誘起電圧を発生させ転流
してQlを急速にOFF、Q2をONに反転させて発振
は開始されるのである。Even when the core is saturated, it still has some residual inductance, and when the collector current decreases, this residual inductance generates an induced voltage opposite to the previous one and commutates, rapidly turning off Ql and turning off Q2. Oscillation is started by inverting it to ON.
このようにして、ロイヤー回路では2個のトランジスタ
のコレクタ電流により、コアの磁束レベルを飽和磁束+
Φ□から一Φ□の間を往復させることにより発振を持続
させているのである。In this way, the Royer circuit uses the collector currents of the two transistors to increase the magnetic flux level of the core to the saturation magnetic flux +
Oscillation is maintained by reciprocating between Φ□ and one Φ□.
しかしながら、このロイヤー回路では、コアの飽和磁束
密度まで磁化させるために、コアの励磁電力が大きい他
、コレクタ電流の最大値でトランジスタが不飽和と々る
ため、コレクタ消費電力が大きい。即ち、転流時のコア
損失及びコレクタ損失が大きい欠点がある。この損失が
出力容量に比べ非常に小さいもので負荷時の変換効率に
さほど影響がなければ良いが、小さな出力容量例えばI
W以下のインバータ回路では変換効率が悪化し無視でき
ない損失となる。However, in this Royer circuit, in order to magnetize the core to the saturation magnetic flux density, the excitation power of the core is large, and the transistor becomes unsaturated at the maximum value of the collector current, so the collector power consumption is large. That is, there is a drawback that core loss and collector loss during commutation are large. It is fine as long as this loss is very small compared to the output capacitance and does not have much effect on the conversion efficiency under load.
In an inverter circuit of W or less, the conversion efficiency deteriorates, resulting in a loss that cannot be ignored.
例えば、入力電力が200mW以下に制限された出力電
力150 mWのDC−DCコンバータを従来のインバ
ータ回路で実施する゛ことは困難であった。For example, it has been difficult to implement a DC-DC converter with an output power of 150 mW and an input power limited to 200 mW or less using a conventional inverter circuit.
(発明の目的)
本発明はロイヤー回路の欠点である転流時の損失を除去
するため、スイッチング素子として電界効果トランジス
タ(以下F’ETという。)を採用したほか、FET毎
に専用のトランス用巻線を設け、FET個有の浮遊容量
とトランスのインダクタンスによる共振条件で自励発振
する変換効率の良好な(5)
インバータ回路によるDC−DCコンバータを提供する
ものである。(Objective of the Invention) In order to eliminate loss during commutation, which is a drawback of the Royer circuit, the present invention employs a field effect transistor (hereinafter referred to as F'ET) as a switching element, and also uses a dedicated transformer for each FET. The present invention provides a DC-DC converter using an inverter circuit (5) which has a winding and has good conversion efficiency that self-oscillates under resonance conditions due to the stray capacitance unique to the FET and the inductance of the transformer.
(発明の構成)
本発明は上記目的を達成するため、一方のスイッチング
素子である第1のFETのドレインは第1のトランスの
1次巻線の一端に接続され、他方のスイッチング素子で
ある第2のFETのドレインは第2のトランスの1次巻
線の一端に接続され、前記第1.第2のFETのソース
はたがいに接続されるとともに、前記第1.第2のトラ
ンスの1次巻線の他端はたがいに接続され、前記第1.
第2のFETの各ドレインは抵抗とこれに並設されたコ
ンデンサを介して第2.第1のFETのダートに接続さ
れておシ、前記第1.第2のトランスの1次巻線の接続
点と前記第1.第20FETのソース間に直流電圧を印
加せしめることによって、第1.第2のFETが交互に
スイッチング動作を行い、FET個有の浮遊容量とトラ
ンスのインダクタンスとによる共振条件によシ自励発振
し、トランスを介して2次側へ交流電力を発生させる自
励式インバー(6)
夕回路を有し、この出力を平滑回路を通して直流電力に
変換させることを特徴とするDC−DCコン・ぐ−タで
ある。(Structure of the Invention) In order to achieve the above object, the drain of the first FET which is one switching element is connected to one end of the primary winding of the first transformer, and the drain of the first FET which is one switching element is connected to one end of the primary winding of the first transformer. The drain of the FET No. 2 is connected to one end of the primary winding of the second transformer, and the drain of the FET No. 2 is connected to one end of the primary winding of the second transformer. The sources of the second FETs are connected to each other, and the sources of the first and second FETs are connected to each other. The other ends of the primary windings of the second transformer are connected to each other, and the first...
Each drain of the second FET is connected to the second FET via a resistor and a capacitor connected in parallel with the resistor. The first FET is connected to the dart of the first FET. The connection point of the primary winding of the second transformer and the connection point of the primary winding of the second transformer. By applying a DC voltage between the sources of the 20th FET, the 1st. A self-excited inverter in which the second FET performs switching operations alternately, self-excited oscillation occurs under the resonance conditions of the stray capacitance unique to the FET and the inductance of the transformer, and generates AC power to the secondary side via the transformer. (6) A DC-DC converter characterized by having an evening circuit and converting the output into DC power through a smoothing circuit.
(実施例) 第3図は本発明の一実施例を示す回路図である。(Example) FIG. 3 is a circuit diagram showing one embodiment of the present invention.
いま、直流電圧vccがFETI、FET2のドレイン
・ソース間に印加されると、抵抗R1* R2及びコン
デンサC11c2を通して各々のダートにも印加され、
使用しているFETはMO8型エンノ1ンスメント型で
あるため、ダート・ソース間電圧がOvのときは、ドレ
イン電流は流れないが、どちらかのFETのゲート・ソ
ース間電圧がそのFETのスレッショルド(閾値)を越
えるとONとなり、この起動によシ本回路はFET個有
の浮遊容量(第4図参照)とトランスのインダクタンス
による共振条件により発振を持続するものである。Now, when DC voltage vcc is applied between the drain and source of FETI and FET2, it is also applied to each dart through resistor R1*R2 and capacitor C11c2,
Since the FETs used are of the MO8 type enhancement type, when the dart-source voltage is Ov, no drain current flows, but the gate-source voltage of either FET is equal to the threshold of that FET ( When the threshold value is exceeded, the circuit turns on, and upon activation, this circuit continues to oscillate due to resonance conditions caused by the stray capacitance unique to the FET (see FIG. 4) and the inductance of the transformer.
いま、かシに、FET 1がON したとすると、FE
T。Now, if FET 1 is turned on, FE
T.
のドレイン電圧が0■レベルになるので、R2C2を通
してFET2のダート電圧もOVレベルになシFET2
はOFFの方向になる。FETzのドレイン−ソース間
電圧波形は第5図(B)のように共振波形となり、その
電位の変化はRIC,を通してFET lのダート電圧
となって、第5図(C)のように現われる。Since the drain voltage of FET2 becomes 0 level, the dirt voltage of FET2 also becomes OV level through R2C2.
is in the OFF direction. The drain-source voltage waveform of FETz becomes a resonant waveform as shown in FIG. 5(B), and the change in potential becomes a dart voltage of FET l through RIC, which appears as shown in FIG. 5(C).
FET 、のドレイン電流はトランスTIの巻線Nil
を励磁し、2次巻線N12に誘起電圧を発生させ出力す
る。このときのドレイン電流は第5図の)のように巻線
N11のインダクタンスによる直線的な上昇であり、ト
ランスTlのコアは飽和に至らない。The drain current of the FET is equal to the winding Nil of the transformer TI.
is excited to generate and output an induced voltage in the secondary winding N12. The drain current at this time increases linearly due to the inductance of the winding N11 as shown in FIG. 5), and the core of the transformer Tl does not reach saturation.
やがて、FET、のゲート電圧が低下し、カットオフ電
圧に達すると、FET、はOFFシ、ドレイン電流を流
さなくなる。同時にFET 1のドレイン電位は共振条
件にて上昇し始める。それに従って、R2C2を通して
FET2のダート電圧も徐々に上昇し、スレッショルド
(閾値)を越えるとFET2はONとなる。Eventually, the gate voltage of the FET decreases and when it reaches the cutoff voltage, the FET is turned off and no drain current flows. At the same time, the drain potential of FET 1 begins to rise under resonance conditions. Accordingly, the dart voltage of FET2 also gradually increases through R2C2, and when it exceeds a threshold, FET2 turns ON.
FET2のドレイン電流はトランスT2のN21巻線を
励磁し、巻線N22に電圧を誘起することにょ多出力す
る。The drain current of FET2 excites the N21 winding of the transformer T2 and induces a voltage in the winding N22, thereby producing a large output.
又、FET2のドレイン電圧がovtz−=ルになシ、
RICl を通してFET lのダート電圧もovレベ
ルになるためFET lはOFFを保持する。Also, if the drain voltage of FET2 is ovtz-=L,
Since the dirt voltage of FET l also becomes the ov level through RICl, FET l remains OFF.
このように、FET 1はOFF、 FET、はONに
反転させ、これを繰返すことにより発振を継続するもの
である。In this way, FET 1 is turned OFF and FET 1 is turned ON, and by repeating this, oscillation is continued.
なお、本実施例ではFET1. FET2にそれぞれト
ランス’r、、トランスT2を設けたが、1個のE+型
ココア中央脚を除く2脚にそれぞれ1次、2次巻線を内
鉄型に巻回しても、あるいは、EE型ココア中央脚に2
組の1次、2次巻線を共に巻回してもよいことはいうま
でもない。Note that in this embodiment, FET1. FET2 is provided with transformers 'r, and transformer T2, but even if the primary and secondary windings are wound in an inner iron shape on each of the two legs except one E+ type cocoa center leg, or the EE type 2 on cocoa center leg
It goes without saying that the primary and secondary windings of the set may be wound together.
さらに、発振条件はFET個有の浮遊容量とトランスの
インダクタンスで決定されるものであるが、発振周波数
を変えたい場合は、トランスのインダクタンスを変える
ことのほかに、例えば第3図の点線で示すようにFET
のダート・ソース間にC3゜C4のコンデンサを付加す
ることにより容易に行なうことかできる。Furthermore, the oscillation conditions are determined by the stray capacitance unique to the FET and the inductance of the transformer, but if you want to change the oscillation frequency, you can do so by changing the inductance of the transformer, for example, as shown by the dotted line in Figure 3. Like FET
This can be easily done by adding a C3°C4 capacitor between the dart and source.
1例として本回路を出力容量150mWの電源回路に実
施した結果、インバータ回路の変換効率は94%であっ
た。ちなみに、従来回路を本回路と同じように出力容量
150mWの電源回路に実施した場合、その変換効率は
50%近傍であった。これを以ってしても、本発明回路
は如何に変換効率を向上させ得たか明らかである。As an example, when this circuit was implemented in a power supply circuit with an output capacity of 150 mW, the conversion efficiency of the inverter circuit was 94%. Incidentally, when the conventional circuit was implemented in a power supply circuit with an output capacity of 150 mW like the present circuit, the conversion efficiency was around 50%. Even with this, it is clear how the circuit of the present invention was able to improve the conversion efficiency.
上述した本発明の自励式インバータ回路によって得られ
た交流電力は、ダイオードD11D2及びコンデンサC
75:ら成る整流平滑回路によシ直流電力に変換される
。The AC power obtained by the self-excited inverter circuit of the present invention described above is transmitted through the diode D11D2 and the capacitor C.
75: is converted into DC power by a rectifying and smoothing circuit consisting of:
なお、この整流平滑回路は他の公知の回路を用いてもよ
いことはいうまでもない。It goes without saying that other known circuits may be used for this rectifying and smoothing circuit.
(発明の効果)
以上説明したように、本発明によれば、FET個有の浮
遊容量とトランスのインダクタンスで決定されかつこれ
らを調整することによって得られる所望の発振周波数で
自゛励発振するインバータ回路が得られ、従来の自励式
インバータ回路に比べ、転流時の損失を著しく減少させ
た結果、高変換効率のDC−DCコンバータが得られ、
さらに大きな容量の回路に応用すれば低損失、高効率変
換が期待できるなど多大の効果をもたらすものである。(Effects of the Invention) As explained above, according to the present invention, an inverter that self-oscillates at a desired oscillation frequency determined by the stray capacitance unique to the FET and the inductance of the transformer and obtained by adjusting these. As a result, a DC-DC converter with high conversion efficiency was obtained, with significantly reduced loss during commutation compared to conventional self-excited inverter circuits.
If applied to circuits with even larger capacity, it can be expected to have lower loss and higher efficiency conversion, bringing about great effects.
第1図は従来のロイヤー回路図、第2図はその各部波形
図、第3図は本発明の一実施例を示す回路図、第4図は
FET個有の浮遊容量を示す等節回、第5図は本発明の
一実施例の各部波形図である。
FET、 、 FET2・・・電界効果トランジスタ、
Cts8・tCoss r Cras −−−FETの
浮遊容量、T0n T2− )ランス、Nlt +NH
・・・1次巻線、N121 N22・・・2次巻線、D
I、D2・・・ダイオード、CI + C2+ Cs
r C4+ C・・・コンデンサ、Rt J R2*
R3+ R4”’抵抗、vcc ・・’直流電源。
特許出願人 沖電気工業株式会社
日本電信電話公社
東北沖電気株式会社
(11)Fig. 1 is a conventional Royer circuit diagram, Fig. 2 is a waveform diagram of each part thereof, Fig. 3 is a circuit diagram showing an embodiment of the present invention, Fig. 4 is an equinodal circuit showing the stray capacitance unique to FET, FIG. 5 is a waveform diagram of each part of an embodiment of the present invention. FET, , FET2...field effect transistor,
Cts8・tCoss r Cras --- Stray capacitance of FET, T0n T2-) Lance, Nlt +NH
...Primary winding, N121 N22...Secondary winding, D
I, D2...diode, CI + C2+ Cs
r C4+ C...Capacitor, Rt J R2*
R3+ R4"'Resistance, Vcc...'DC power supply. Patent applicant Oki Electric Industry Co., Ltd. Nippon Telegraph and Telephone Public Corporation Tohoku Oki Electric Co., Ltd. (11)
Claims (1)
スタのドレインは第1のトランスの1次巻線の一端に接
続され、他方のスイッチング素子である第2の電界効果
トランジスタのドレインは第2のトランスの1次巻線の
一端に接続され、前記第1.第2の電界効果トランジス
タのソースはたがいに接続されるとともに、前記第1.
第2のトランスの1次巻線の他端はたがいに接続され、
前記第1.第2の電界効果トランジスタの各ドレインは
抵抗とこれに並設されたコンデンサを介して第2.第1
の電界効果トランジスタのゲートに接続されており、前
記第1.第2のトランスの1次巻線の接続点と前記第1
.第2の電界効果トランジスタのソース間に直流電圧を
印加せしめることによって、第1.第2の電界効果トラ
ンジスタが交互にスイッチング動作を行ない、電界効果
トランジスタ個有の浮遊容量とトランスのインダクタン
スとによる共振条件により自励発振し、トランスを介し
て2次側へ交流電力を発生させる自励式インバータ回路
を有し、この出力電力を平滑回路を通して直流電力に変
換させることを特徴とするDC−DCコンバータ。The drain of the first field effect transistor, which is one switching element, is connected to one end of the primary winding of the first transformer, and the drain of the second field effect transistor, which is the other switching element, is connected to one end of the primary winding of the first transformer. connected to one end of the primary winding; The sources of the second field effect transistors are connected to each other, and the sources of the first field effect transistors are connected to each other.
The other ends of the primary winding of the second transformer are connected to each other,
Said 1st. Each drain of the second field effect transistor is connected to the second field effect transistor through a resistor and a capacitor arranged in parallel with the resistor. 1st
is connected to the gate of the field effect transistor of the first field effect transistor. The connection point of the primary winding of the second transformer and the first
.. By applying a DC voltage between the sources of the second field effect transistor, the first field effect transistor. The second field-effect transistor alternately performs switching operations, self-oscillates due to resonance conditions caused by the stray capacitance unique to the field-effect transistor and the inductance of the transformer, and generates AC power to the secondary side via the transformer. A DC-DC converter comprising an excited inverter circuit and converting the output power into DC power through a smoothing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58176322A JPS6070973A (en) | 1983-09-26 | 1983-09-26 | Dc/dc converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58176322A JPS6070973A (en) | 1983-09-26 | 1983-09-26 | Dc/dc converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6070973A true JPS6070973A (en) | 1985-04-22 |
| JPS64918B2 JPS64918B2 (en) | 1989-01-09 |
Family
ID=16011552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58176322A Granted JPS6070973A (en) | 1983-09-26 | 1983-09-26 | Dc/dc converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6070973A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6009001A (en) * | 1998-03-27 | 1999-12-28 | Toko, Inc. | Self-oscillation-resonance type power supply circuit |
| JP2008061369A (en) * | 2006-08-31 | 2008-03-13 | Toko Inc | Resonant switching power supply |
-
1983
- 1983-09-26 JP JP58176322A patent/JPS6070973A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6009001A (en) * | 1998-03-27 | 1999-12-28 | Toko, Inc. | Self-oscillation-resonance type power supply circuit |
| JP2008061369A (en) * | 2006-08-31 | 2008-03-13 | Toko Inc | Resonant switching power supply |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS64918B2 (en) | 1989-01-09 |
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