JPS60223361A - Spread spectrum system - Google Patents

Abstract

PURPOSE:To obtain a base band spread spectrum wave excellent in DC interruption characteristic by providing a pseudo noise series generator and a means for applying code conversion to an output and extracting a pseudo noise code not including a DC component to an output side of a converting means. CONSTITUTION:When a clock signal S1 is applied from an input terminal 11, a frequency divider 12 applies 1/2 frequency-division to the signal S1, and a clock signal S2 is generated. The signal S2 is fed to FF circuits 13a-13c of an M series generator 13 as a pseudo noise (PN) system generator as a shift signal at the same time. A PN code S3 as shown in the figure C is extracted at the output side of the FF circuit 13a. The DC component of the PN code, however, is not zero. Then the PN code is fed to one input of an EOR circuit 14 and the signal S2 is fed to the other input, then a signal S4 is tracted at the output of the circuit 14. The signal S4 can be a substantial PN signal not including the DC signal already. Thus, the same signal S5 as the signal S4 substantially is extracted from the output side of the FF circuit 15 as the PN code.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a spread spectrum method suitable for use, for example, in baseband transmission of pseudo-noise codes.

Background technology and its problems For example, in a two-way communication system, when sending information from the terminal side to the center side, 1 data and pseudo The data is multiplied by a noise (hereinafter referred to as PN) code and transmitted with so-called spectrum spreading.

Figure 1 shows an example of this, and now on the terminal side,
When data is supplied to the input terminal (1), this data is supplied to one input terminal of a multiplier (2), and the other input terminal of this multiplier (2) is supplied with a PN sequence, for example, an M sequence generator (
Spread the spectrum by multiplying by the M sequence code from 3). This multiplication output is then supplied to the next stage multiplier (4),
Here, the signal is placed on a carrier from the carrier generator (5) and supplied to the transmitting circuit (6), thereby sending it to the receiving section on the center side via the output terminal (7) and a transmission cable (not shown). That's what I do.

At that time, when sending information from the center side to the multi-terminal side via the lower multi-line, for example, 50 to 450
When using a high frequency band of MHz, and conversely sending information from the terminal side to the center side via the upper multi-line, use a lower frequency band, for example 5 to 30 MHz, than the lower multi-line. For example, an M-sequence code is widely used as a PN code in such a spectrum spread system, but the characteristics of this M-sequence code are as shown in Figure 3, where fb is the frequency of the bit clock. specific)
J? It has a power spectrum. Therefore, when transmitting an M-sequence code with such characteristics in baseband, for example, the band extends to the DC component, so when it is used in a system that does not transmit DC, such as an original fiber, the spreading gain increases. There are disadvantages such as increased loss.

OBJECTS OF THE INVENTION The present invention has been made in view of the above problems, and it is an object of the present invention to provide a spread spectrum method that can obtain a PN code with excellent DC cutoff characteristics with a simple circuit configuration.

Summary of the Invention The present invention includes a pseudo-noise sequence generator and a converting means for converting the code of the output of the pseudo-noise sequence generator, and a pseudo-noise code containing no DC component is generated on the output side of the converting means. I'm trying to get it out.

With such a configuration, the present invention can obtain a baseband spectrum spread wave with excellent DC blocking characteristics.

EXAMPLES Hereinafter, various examples of the present invention will be explained in detail based on FIGS. 4 to 10.

FIG. 4 shows the circuit configuration of a first embodiment of the present invention. In this embodiment, the NRZ code t is converted into a so-called Manchester code to obtain a PN code containing no DC component. In the figure, α〃 is an input terminal to which a clock signal is supplied, (9) is a frequency divider, and (6) is a PN sequence generator, for example, an M-series generator, and this M-series generator α1 In general, when the number of stages of n total shift registers 4 is assumed, the longest sequence length is 2''-1 bits.Here, for example, a three-stage D-type flip-flop circuit (13a), (1
3b) and (13c) and a logic circuit that feeds back the logical combination of the states of each stage to the input of the shift register, such as an exclusive OR (hereinafter referred to as FOR).
) circuit (13d), one period is [111
0100) with a period of 7 is generated.

Further, α→ is, for example, an EOR circuit as a code conversion circuit, and the specific power of this EOROR circuit α is supplied to the input terminal of a D-type flip-frog circuit αQ for timing adjustment. ) is directly supplied with the clock from the input terminal α. And the output terminal Q of the flip-flop circuit αQ
The side is connected to the output terminal a, and a PN code containing no desired DC component is extracted from the output terminal oQ.

Next, the operation of this circuit will be explained with reference to the signal waveforms shown in FIG.

Now, when a lock signal S as shown in FIG. 5A is supplied from the input terminal αp, this clock signal S1 is supplied to the frequency divider (6) and the flip-flop circuit (6).
) is supplied to the clock terminal CK of the clock terminal CK. The frequency divider (b) subdivides the frequency of the input clock signal S, and generates a beat/squeak signal S2 shown in FIG. 5B on its output side. This clock signal S) is simultaneously supplied as a shift clock signal to each flip-flop circuit (13m) to (13c) of the M-sequence generator α1. Then, the contents of these flip-frog circuits are sequentially shifted, and the outputs of the flip-frog circuit (13m) and the flip-frog circuit (13e) are logically processed by the EOR circuit (13d), and then the output of the flip-frog circuit (13c) is processed. It is fed back to the input side. As a result, a PN code of [1110100) as shown in FIG. However, in one cycle of this PN code, there are 4 "1"s and 3 "0"s, and the DC component is not yet 0. Therefore, this PN code is supplied to one input terminal of the EOR circuit α, and the output signal S2 of the frequency divider U is supplied to the other input terminal of the FOR circuit α4. Then, an output signal S4 as shown in Figure 5 is taken out from the output side of this EDR circuit α→. This signal S4
can be said to be a substantial PN signal that does not already contain a DC component.

In this fifth diagram, the signal S4. is a PN code in which the number of 1's and 0#s in one cycle of the PN code is equal and does not include a DC component. This signal S4 is supplied to the input terminal of the flip-flop circuit (A), and the signal S4 as input data is supplied to the clock terminal CK of the shift flip-flop circuit (A) through the input terminal CL, ). , and the output side of the flip-flop circuit (G), that is, the output terminal
A signal S5 as shown in FIG. 5E, which is substantially the same as the output signal S4 of the circuit α4, is extracted as a PN code. This PN code is ultimately a PN code that does not include the desired DC component. Signal S5 which is the PN code in this case
In this case, the A pulse width of the part corresponding to the level change point of the signal S3, which is the original NRZ PN code, is 92 times larger than that of other parts. Such a code is called a Manchester code.

The PN code obtained in this way is used to spread the spectrum of the input data by multiplying it with the data as described above. A PN code containing no components can be easily obtained.

FIG. 6 shows a second embodiment of the present invention, in which an NRZ code is converted into a so-called pi-phase code to obtain a code that does not contain a DC component. In this figure, parts corresponding to those in FIG. 4 are given the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, an OR circuit aη is used in place of the EOR circuit a4 in FIG. 4, and a JK flip-flop circuit (G) is used in place of the D-type flip-flop circuit (G). The other circuit configurations are the same as in FIG. 4. Note that the input terminals J and K of this JK fritzo circuit (to) are commonly connected so that the output of the OR circuit ←η is supplied to both at the same time.

Next, the circuit operation of FIG. 6 will be explained with reference to the signal waveform of FIG. 7. Now, when the lock signal S6 is supplied from the input terminal αυ as shown in FIG. The signal S6 is supplied to the differential frequency generator (6) and also to the flip-flop circuit (L
It is supplied to the clock terminal CK of the clock. The frequency divider board divides the frequency of the supplied clock signal S6 to obtain a lock signal S7 as shown in FIG. 7B. This clock signal S7 is supplied to the M-sequence generator (b) as a clock signal for shifting, and is also supplied to the other input terminal of the OR circuit αη. The M-sequence generator (6) performs the same operation as shown in Fig. 4, and outputs a PN code signal S8 whose one period is [1110100] as shown in Fig. 7C.
Output. However, this PN code still contains a DC component.

Therefore, the signal S8, which is this PN code, is supplied to one input terminal of the OR circuit αη, and is logically processed with the output signal S7 from the above-mentioned frequency divider. An output signal S9 as shown in is obtained. This output signal S9 is supplied to the input terminal JK of the flip-flop circuit α frame, and the clock signal S6 from the input terminal αη is supplied to the clock terminal CK of this flip-flop circuit (G). The output terminal Q of the circuit α frame has an output signal S as shown in FIG. 7E. is taken out. This output signal S, I) does not contain a DC component.
It is N code. The signal S, which is the PN code in this case. is the signal S8, which is the original NRZ PN code, and the signal width of the part corresponding to one level, here 0', is 92 times greater than the other level, that is, the part corresponding to "1". This type of code is called a pi-phase code. This PN code is used to spread the spectrum of data in the same manner as described above.In this way, this embodiment can also obtain substantially the same effects as those of the above embodiment.

8 and 9 are signals S5 and S shown in FIG. 5E and FIG. 7E, respectively. It shows the autocorrelation function of the signal S,. In other words, it can be seen that the polarity of the pie phase code is reversed every cycle, and the stronger the correlation, the more resistant it is to noise.

Further, FIG. 10 shows signals S5 and S. PN represented by
This shows the power spectrum of the code, and it can be seen that the rainbow DC component in this characteristic diagram is zero.

Therefore, by using such a PN code, a baseband spread spectrum wave with good DC blocking characteristics can be obtained.

Note that the code conversion means for obtaining a PN code that does not include the above-mentioned DC component is not limited to the circuits shown in FIGS. 4 and 6, and other means may be used as long as a similar PN code can be obtained. . Furthermore, the PN code is not limited to the M-sequence code, and other codes such as Gold codes may be used.

Effects of the Invention As described above, according to the present invention, since the PN code is converted into a PN code that does not include a DC component, it is possible to obtain a baseband spread spectrum wave with good DC cutoff characteristics. For example, when applied to a communication path where DC components are blocked, the reduction in spreading gain is reduced, allowing good transmission in moving vehicles. For example, in a two-way communication system, a relatively low frequency band is used for multiple lines as described above, but it is not desired to transmit a DC component, and in such a case, using a PN code that does not include a DC component as described above is extremely effective. This is useful because it enables flexible transmission.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing an example of a transmitter in a two-way communication system, FIGS. 2 and 3 are diagrams for explaining the operation of FIG. 1, and FIG. 4 shows an example of the present invention. 5 is a signal waveform diagram for explaining the operation of FIG. 4, and FIG. 6 is a circuit configuration diagram showing another embodiment of the present invention.
FIG. 7 is a signal waveform diagram for explaining the operation of FIG.
FIGS. 8 to 10 are diagrams for explaining the present invention. (b) is a μ frequency divider, (11 is an M-sequence generator, α→ is an exclusive OR (FOR) circuit, (to) is a D-type Frizzo circuit, aη is an OR circuit, and α is a JK Frizzo circuit. Figure 1 Figure 2 Figure 3 Figure 5 Figure 7 Figure 10

Claims (1)

[Claims] It is characterized by comprising a pseudo-noise sequence generator and a conversion means for converting the code of the output of the pseudo-noise sequence generator, and a pseudo-noise code containing no DC component is obtained on the output side of the conversion means. Spread spectrum method.