JPS6448423A - Dividing method of semiconductor chip - Google Patents
Dividing method of semiconductor chipInfo
- Publication number
- JPS6448423A JPS6448423A JP20415587A JP20415587A JPS6448423A JP S6448423 A JPS6448423 A JP S6448423A JP 20415587 A JP20415587 A JP 20415587A JP 20415587 A JP20415587 A JP 20415587A JP S6448423 A JPS6448423 A JP S6448423A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- semiconductor chip
- wafer
- trench
- grounding electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Weting (AREA)
- Dicing (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To prevent the generation of electrical non-conduction in the section of a via hole by forming the via hole into a semiconductor chip and simultaneously plating all of the rear of a grounding electrode shaped to the surface, the inner surface of a through-hole and the rear of the chip. CONSTITUTION:A split line trench is shaped to the surface of a wafer 21, an insulating film 27 is formed onto the surface of the trench, and a window is bored 23' in at least one through grounding electrode 23 in the insulating film 27. The insulating film is shaped onto a support board so that windows in each chip are connected electrically through a conductive film, and a through- hole (a via hole) 28 penetrated to the grounding electrode 23 from the rear of the wafer 21 and the trench of a split line 29 reaching the insulating film 27 are formed. A plating foundation metal 30 is applied onto the surface of the wafer 21, and the upper section of the plating foundation metal 30 is placed with a conductive metal. The semiconductor chip is divided. Accordingly, no defectives, not conducting electrically on the inner surfaces of the via holes 28, are formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20415587A JPH0671045B2 (en) | 1987-08-19 | 1987-08-19 | Method of dividing semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20415587A JPH0671045B2 (en) | 1987-08-19 | 1987-08-19 | Method of dividing semiconductor chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6448423A true JPS6448423A (en) | 1989-02-22 |
| JPH0671045B2 JPH0671045B2 (en) | 1994-09-07 |
Family
ID=16485744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20415587A Expired - Fee Related JPH0671045B2 (en) | 1987-08-19 | 1987-08-19 | Method of dividing semiconductor chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0671045B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5919713A (en) * | 1994-01-28 | 1999-07-06 | Fujitsu Limited | Semiconductor device and method of making |
| WO2004027859A1 (en) * | 2002-08-22 | 2004-04-01 | United Monolithic Semiconductors Gmbh | Method for the production of individual monolithically integrated semiconductor circuits |
| US6881649B2 (en) | 2002-07-18 | 2005-04-19 | Fujitsu Limited | Method of making device chips collectively from common material substrate |
| US7067901B2 (en) * | 2000-06-08 | 2006-06-27 | Micron Technology, Inc. | Semiconductor devices including protective layers on active surfaces thereof |
| JP2006237056A (en) * | 2005-02-22 | 2006-09-07 | Mitsubishi Electric Corp | Manufacturing method of semiconductor device |
| US7442635B2 (en) | 2005-01-31 | 2008-10-28 | Interuniversitair Microelektronica Centrum (Imec) | Method for producing a semiconductor device and resulting device |
-
1987
- 1987-08-19 JP JP20415587A patent/JPH0671045B2/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5919713A (en) * | 1994-01-28 | 1999-07-06 | Fujitsu Limited | Semiconductor device and method of making |
| US6455945B1 (en) | 1994-01-28 | 2002-09-24 | Fujitsu, Limited | Semiconductor device having a fragment of a connection part provided on at least one lateral edge for mechanically connecting to adjacent semiconductor chips |
| US7067901B2 (en) * | 2000-06-08 | 2006-06-27 | Micron Technology, Inc. | Semiconductor devices including protective layers on active surfaces thereof |
| US7084013B2 (en) | 2000-06-08 | 2006-08-01 | Micron Technology, Inc. | Methods for forming protective layers on semiconductor device substrates |
| US6881649B2 (en) | 2002-07-18 | 2005-04-19 | Fujitsu Limited | Method of making device chips collectively from common material substrate |
| WO2004027859A1 (en) * | 2002-08-22 | 2004-04-01 | United Monolithic Semiconductors Gmbh | Method for the production of individual monolithically integrated semiconductor circuits |
| US7084047B2 (en) | 2002-08-22 | 2006-08-01 | United Monolithic Semiconductors Gmbh | Method for the production of individual monolithically integrated semiconductor circuits |
| US7442635B2 (en) | 2005-01-31 | 2008-10-28 | Interuniversitair Microelektronica Centrum (Imec) | Method for producing a semiconductor device and resulting device |
| US7759701B2 (en) | 2005-01-31 | 2010-07-20 | Imec | Semiconductor device having interconnected contact groups |
| JP2006237056A (en) * | 2005-02-22 | 2006-09-07 | Mitsubishi Electric Corp | Manufacturing method of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0671045B2 (en) | 1994-09-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |