JPS5917625B2 - Induction motor control device - Google Patents

Description

[Detailed description of the invention] The present invention relates to a control device for a polyphase AC induction motor.

The applicant of this application developed a control system for a polyphase AC induction motor (hereinafter referred to as AA motor except in special cases) in 1939.
Patent Application No. 2140 filed on February 25, 1972
No. 3 "Adaptive Control Device for AC Motor" (hereinafter referred to as the "earlier application").

In the earlier application, in feedback control, o command position is θC) control amount, that is, the current position of the controlled object connected to and driven by the motor is θa) current speed of the motor is f
2, the value of the control frequency signal fl in relation to the position error (θc - θa) is set as f1 = f2 + G1 (θc - θa) or f1 = G1 (θc - θa)5 (however, G1 is a proportional constant), and this When the value of the control frequency signal is closer to f2 than the value of the shift frequency signal, which has a relationship of (f, +fk) or (f, -fk) with respect to the value of the base frequency fk, which is a predetermined constant value, control is performed. The frequency of the AC power source is controlled to 0 using the frequency signal, and when the value of the variable speed frequency signal is closer to f2 than the value of the control frequency signal, the frequency of the AC power source is controlled using the variable speed frequency signal so that θa ■ θc. A control device is disclosed. Therefore, in the control device of the earlier application, the control amount 5 wave number signal is expressed as fl]'2+G1(θ
c-θa) and when synthesizing the variable speed frequency signal (f2±fk), the current speed f of the motor
2 is a factor that determines the frequency of the AC power supply, but it is difficult to accurately measure the value of f2 in a sufficiently short time, and the disadvantage is that measurement accuracy decreases, especially when the value of f2 is small. It was hot.

An object of the present invention is to eliminate this drawback and obtain a control device that is optimal as a control device for a multiphase AC induction motor.

The drawings will be explained in detail below.

Figure 1 is a circuit diagram and its vector diagram showing a simple equivalent circuit of a polyphase AC induction motor. In the figure, fl, V1, and I4 are the power supply frequency, input voltage, and human power current, respectively, and
, LO, and RO are the excitation current (i.e., no-load current), the inductance of the excitation circuit, and the equivalent resistance representing its loss, Ll, R are the inductance and resistance of the primary side, respectively, and L2 and R2 are the primary side, respectively. The inductance and resistance on the secondary side converted to , VL is the voltage induced by rotation (value converted to the primary * side), and S is the slip.

Further, F2 is the speed of the electric motor and is expressed as a value normalized to the frequency. The torque T of the electric motor is , where Fs = fl - F2 is called the slip frequency.

Also, the current 12 is becomes.

As is clear from equation (1), T=0 at the point Fs=0, and within a small range of Fs around Fs=0, T changes approximately in proportion to Fs.

Therefore, the command position in feedback control is θC
) If the current position, which is a controlled variable, is θa, and in general, the control operation signal includes speed feedback, and the slip frequency Fs is controlled by E, then in the range where T is proportional to Fs, the following equation is obtained.

Here, Ks is a proportional constant for T(7)Fs, J is the total inertia rate of the rotating system including the electric motor and its load, F is the friction coefficient, and p represents a differential operator. Slip frequency Fs
is limited by various conditions.

The absolute limiting condition is the slip frequency (
There are four types of FT cases. In other words, if the direction of left rotation is Fl, f2, f
If the positive direction of s is set, the positive or negative of T matches the positive or negative of Fs, so (F2>0, fs>0) is the counterclockwise acceleration torque, and (F2>0, fs<0) is the counterclockwise deceleration torque. In the case of (F2<0, fs<0) is the clockwise acceleration torque,
(F, <0, fs>0) is for clockwise deceleration torque, and in all four cases there is a slip frequency FT that gives the maximum torque, and when Fs exceeds this value, the motor is disabled. It becomes stable.

The value of FT is from equation (1) within the range where R can be omitted for (2πF,)(L1+L2).

That is, the absolute value of Fs must not exceed this value of FT.

The second limiting condition for Fs arises from the control method of V, and the limit of 12.

The method of controlling V1 is an issue that should be determined in connection with the design of the electric motor, and various methods can be considered, but in the following explanation, for convenience, the case where it is controlled according to T:1-1 will be described.

Equation (6) is one numerical example for design purposes, and it goes without saying that the device of the present invention is not limited to this numerical example. By understanding the numerical examples given herein, it will be easy to design the device of the invention accordingly if other numerical values are used. Hereinafter, in this specification, when a numerical example is used for convenience of explanation, it will be written as (numerical example). J2
Jl In equation (2), if we omit FOofO and substitute R into equation (6-1) for R2+-R2=-R2, we obtain Therefore, Fs must be limited so that the value of 12 does not exceed the design tolerance.

A third limitation on Fs arises from performance limitations of variable frequency AC power supplies.

For example, if Fs and F2 have opposite signs, the current will be 1 as is clear from equation (2) in a sufficiently large region
The phase of Fs and F2 have a relationship as shown in Figure 1c with respect to the phase of voltage V, and if the variable frequency AC power supply cannot flow a current with such a phase relationship, Fs and F2
The value of Fs must be limited so that the relationship with However, within the region where F2 is sufficiently small, F
Even if the positive and negative signs of s and F2 are opposite, 11=IO+I2 and V
It is clear from equation (2) that the phase relationship of , is acceptable for a variable frequency AC power supply. The upper and lower limits of the limit value to be set in the slip frequency limiter are set in consideration of such conditions. FIG. 2 is a block circuit diagram showing one embodiment of the present invention.
The commercial AC power source from 2 is rectified by a rectifier 14 and converted into multiphase AC power by an inverter 16 to drive an induction motor 18.

The instantaneous angular position of the motor 18 is determined by θ together with the position of a load (not shown) coupled to the motor and whose position is controlled.
As a, a gear 22 is attached to the rotating shaft of the electric motor 18 and its load.
angular position sensing devices 26, 28 connected at 24. In this embodiment, the angular position detection device is a so-called code plate (Shaft digitizer).
Assuming that we use something called θa, we set the value of θa to 2
It is output as a base code (numerical example), and its MSB (highest digit bit) corresponds to θCO) MSB, and the lower 8 bits of θa (numerical example) represent the angle less than one revolution of the motor. . The phase angle generator 200 includes a control operation signal generator, a frequency limiter, a frequency integrator, and a phase angle calculator, and inputs θc and θa to calculate the instantaneous phase angle of the AC power supply voltage. The target value θp for the target value θp is output.

The frequency generator 300 inputs θp and controls the frequency and phase rotation direction of the AC power generated by the inverter 16 through the frequency controller 34 so that they become the values indicated by θp.

The voltage signal generator 30 inputs the frequency value signal F, from the phase angle generator 200, and generates the voltage value signal 1 according to equation (6).
Output.

The voltage control device 32 inputs the voltage value signal V, and controls the rectifier 1.
4 is controlled so that the output voltage of the inverter 16 becomes a voltage value corresponding to .

The timing pulse generator 100 is a phase angle generator 20
0, supplies necessary gate waveforms and clock pulses to the frequency generator 300 and voltage signal generator 30. In this specification, when the power supply frequency control device is referred to as a device including the angular position detection devices 26 and 28, the timing pulse generation device 100, the phase angle generation device 200, the frequency generation device 300, and the frequency control device 34 in FIG. collectively.

A block circuit diagram of the timing pulse generator 100 and its output waveform are shown in FIG.

A clock pulse generator 110 generates a clock pulse Pc of 524,288 Hz (numerical example) and a clock pulse Pc of 524,288 Hz (numerical example).
divides the frequency into 1/16 (numerical example) and outputs a pulse P of 32,768 Hz (numerical example), which is further passed to the counter 11.
Divide the frequency by 4 to 1/1,024 (numerical example) and divide the first 3
AND gate 11 for one period G32 waveform of 2,768Hz
Output from 8. A decoder 116 is connected to the counter 112, and outputs 16 types of counting phases from O to 15 of the counter 112, and 12 types (numerical example) from TE) to O to 11 as gate waveforms of GO to Gll, respectively. .

The gate waveforms of G2 to Gll are omitted in the waveform diagram.
The AND gate 120 extracts the gate waveform GO included in the waveform G32 and sets it as the gate waveform G32-0. Reference numeral 122 is an element that provides an appropriate delay to the clock pulse Pc. FIG. 4a shows a block circuit diagram of the phase angle generator 200, and FIG. 4b shows its operating time table.
FIG. 4a also includes a circuit showing an embodiment of the voltage signal generating device 30 of FIG. 2, and the voltage signal generating device will also be explained at the same time. Adder (including subtraction circuit) 210, θa register 212, F2 register 214,
1f21 register 215, θp register 216, E register 218, θs register 220, f1 register 222
, 1f11 register 224, etc. are of a parallel input/output type, and each has a manual terminal and an output terminal corresponding to the required number of bits, but to simplify the drawing, only one bit of the circuit is shown. TazoFll-FO
Register 226 only needs one bit to indicate positive or negative.

Further, the clock pulse circuit is not shown, and only the bits representing the positive/negative status of the contents of the register are shown for purposes of explanation. Adders, registers, etc. are extremely common circuits, so they can be easily understood even if they are omitted as shown in Figure 4a, and their operations can be explained using the time table in Figure 4b and the circuit in Figure 4a. Since it can be easily understood by comparing it with the figures, only the main points will be described in the following explanation. G
When the gate waveform is 32-0, the data of θa is connected to the addend input terminal A of the adder 210 via the gate 248, and the data of θa from 1/32 seconds ago (numerical example) is connected to the addend input terminal B. The numerical value currently input to the θa register 212 as data is connected via the gate 230, a subtraction signal is applied to the addition/subtraction switching signal input terminal s of the adder 210, and the output terminal Σ of the adder is connected to the gate 276. via F2 register 2
14 input, and is also connected to the θa register 212
Since the data of θa is connected to the human input terminal via the gate 274, the clock pulse in the gate waveform 32-0 causes the F2 register 214 to change the current value of θa by 1.
/θa that was input to the θa register 212 32 seconds ago
The value obtained by subtracting the value is entered.

This value corresponds to F2. At the same time, the contents of the θa register 212 become the current value of θa and are used for subtraction after 1/32 seconds. 4b (7) t is time, which is represented by a gate waveform, and A, B, S, and Σ are registers connected to the input/output terminals of the adder 210 as described above, or data other than registers (other than registers). data is shown in parentheses like θc), 0PE indicates the operation performed in the adder, and TRANS indicates the operation performed in the adder 210.
Represents data transfer that is performed without going through . As shown in Figure 4b, when the gate waveforms of GO, gl and G2 are θ
C and θa are multiplied by a constant G1, and F2 is multiplied by a constant G2, but if G and G2 are both selected as integer powers of 2, when θC, θA, and f2 are added to the E register, Just by shifting the digits appropriately and adding them, you can perform constant multiplication.

FIG. 4a shows an embodiment in which the multiplier circuit is omitted in this manner. The circuit related to the E register 218 is called a control operation signal generator.

What is shown with reference numeral 228 in FIG.
numerical example), subtract Fs by (-16Hz) Fs〈(+1
6Hz) (numerical example), in the region of F2 > 16Hz, 0Hz <Fs; in the region of F2 > (-16Hz), (-16Hz) <Fs > 0Hz, as shown in Figure 5. FIG. 6 shows an example of a logic circuit constituting the slip frequency value limiting device 228 in the case of a numerical example in which Fs is limited within the shaded area.

When limiting the slip frequency value as shown in the numerical example shown in Figure 5, it is more convenient to calculate the absolute value of F2, l, and if F2 is negative, invert the sign of E. good.
This is done when G3 and G4 are gate waveforms, respectively, as shown in FIG. 4b. In Figure 6, number 2
881 is a terminal to which the parallel output from the E register 218 is connected, and 2882 is a terminal to which the parallel output from the I register 215 is connected. 2883 is O
<E>16Hz condition, gate 2884 is (-16H
z) <E<O conditions are shown respectively. Further, in general, negative numbers are represented in the form of complements in the register due to the relationship of the adder 210, so this is corrected by the gate group 2890. The output of gate 2887 is 0〈E
〈16Hz or (-16Hz)〈E〈0, I
Since this represents the condition of 16 Hz, when this output exists, the bit representing Fs of 23 or less is connected to gate group 28.
91, respectively. Furthermore, the output of the gate 2888 represents the condition of E>16Hz, and the output of the gate 2889 represents the condition of E<(16Hz) and I<16Hz, so in both cases, the output is 24% of Fs.
is output as a bit representing the value. In addition, the bit missing representing the negative value of Fs, the gate 289 only in the case of Kl6Hz.
Output from 2. As described above, the slip frequency value can be limited to the range shown by diagonal lines in FIG.

A feature of the present invention is that when the gate waveform G8 is present, F2 is accumulated in the θs register 220, and in order to calculate the slip phase angle θs, the calculation θs=−Fs is performed.

In other words, the circuit related to the θs register 220 constitutes a slip frequency value integrator. Further, for gate waveform G9, the calculation θp=θa+θs is performed. That is, the circuit related to the θp register 216 constitutes a phase angle calculation device, and the instantaneous phase angle target value θp of the power supply voltage is 32,768 Hz.
This allows f1 to be determined with high precision even when the measurement precision of F2 is insufficient. Fig. 4b (7) Since the positive/negative of E is inverted when F2 is negative in the case of G4 gate, the bit indicating the positive/negative of Fs output from the slip frequency limiter 228 is the positive/negative of F2 and the positive/negative of Fs. It means whether the positive and negative agree or disagree.

Therefore, the subtraction signal when the gate waveform G9 is as shown in Fig. 4b.
(7) Decisions must be made as shown in the G9 column. Gates 273- and 275 are devices for this purpose. The peak of gate waveform G7 and I-FO are calculated.

F here. = RO/2πLO, which is an operation to calculate the value of 1 according to equation 6, and ge,l-FO register 2
26 and gates 284 and 286 constitute a voltage signal generator 30. In other words, if Fll-FO is positive, it is bald, and if 1 is negative, it is F. gates 284 and 2 respectively
86, the value obtained by multiplying this by the constant 2πLOIOm becomes the voltage value 1. Above, only the main points of the operation of the circuit shown in Fig. 4a have been explained, but from this explanation, the circuit shown in Fig. 4a inputs data of θc and θa and outputs data of θp and V1/2πLOIOm. You should be able to understand the integrated operation up to this point.

Conventionally known devices can be used as the frequency generator 300, the frequency controller 34, and the voltage controller 32, so their explanation will be omitted, but if the data of θp is 32,768H
Since the frequency z (numerical example) is given at a high sampling rate, the configuration of the frequency generator 300 and the frequency controller 34 becomes extremely easy.

For example, a conventional variable frequency AC power supply including an inverter 16 and a frequency controller 34 is designed to be controlled by inputting a trigger pulse at a specific phase point(s) of the AC frequency to be generated. However, it is extremely easy to select the above specific phase point from θp. From the above explanation, it can be understood that the control device shown in FIG. 2 can be used to configure a feedback control device that drives the induction motor 18 and causes the position θa of the load connected to the motor to follow the command position θc. Will.

The above explanation regarding the present invention was made regarding position control, but since the differential value of position with respect to time is velocity,
Speed control can be considered equivalent to position control.

Therefore, when referring to "position control" in this specification, it should be understood that it also includes speed control. In other words, when the speed Fc is commanded, if an integrating device is added to the configuration shown in Fig. 2 to calculate θc by time-integrating Fc, θaθc can be obtained.
It is controlled as follows, and F2=Fc. Furthermore, it is easy to use the control device of the present invention for program control.

If the relationship between the value of θc and time is programmed and inputted into a storage device, and this storage device and its reading device are added to the configuration shown in FIG. 2, θc will be automatically read out. is controlled, and the relationship between θa and time becomes as programmed in advance. As is clear from the above description, the present invention provides a control system that allows an induction motor to be used for sophisticated feedback control and program control purposes. It goes without saying that various modifications can be made without departing from the spirit of the invention.

[Brief explanation of the drawing]

Fig. 1 is a simplified equivalent circuit diagram of a polyphase AC induction motor and its vector diagram, Fig. 2 is a block circuit diagram showing one embodiment of the present invention, and Fig. 3 is a timing diagram used in the device shown in Fig. 2. A block circuit diagram of the pulse generator 100 and its output waveform diagram; FIG. 4a is a block circuit diagram of the phase angle generator 200 used in the device shown in FIG. 2; FIG. 4b is a circuit diagram of the circuit shown in FIG. 4a. FIG. 5 is a graph showing an example of the limiting range of the limit frequency value limiting device used in the present invention, and FIG. 6 is a time table showing the operation of the limit frequency value shown in FIG. FIG. 6 is a block diagram showing a logic circuit when the limiter limits the frequency value to the limit range shown in FIG. 5; 14... Rectifier, 16... Inverter, 18... Induction motor, 26, 28...
- Angular position detection device, 30... Voltage signal generator, 32... Voltage control device, 34...
Frequency control device, 100... Timing pulse generator, 200... Phase angle generator, 300
...Frequency generator, 210...Adder, 212...θa register, 214...
...F2 register, 216...θp register,
218...E register, 220...θ
s register, 222...f1 register, 228
...Suberi frequency value limiting device.

Claims (1)

[Claims] 1 A power supply device that generates variable frequency multiphase alternating current, an induction motor supplied with power from the power supply device, and a power frequency control device that controls the frequency and phase rotation direction of the power supply device, In a feedback control device that controls the speed of an electric motor to perform position control, the power supply frequency control device includes a control operation signal generator that generates a control operation signal determined in relation to an error, and a control operation signal generator that generates a control operation signal determined in relation to an error, and a control operation signal generator that generates a control operation signal determined in relation to an error. When the control operation signal is within the range between the upper limit and the lower limit of the limit value, the control operation signal is output as a slip frequency value signal, and when the control operation signal is larger than the upper limit of the control value, the upper limit of the limit value is outputted. a slip frequency value limiting device that outputs the lower limit of the limit value as the slip frequency value signal when the control operation signal is smaller than the lower limit of the limit value; and a slip frequency value limiting device that outputs the lower limit of the limit value as the slip frequency value signal; a slip frequency value integrator for calculating an instantaneous value; an angular position detecting device for detecting the instantaneous angular position of the induction motor; 1. A control device for an induction motor, comprising: a phase angle calculation device for synthesizing instantaneous phase angle signals.