JPS589320A - Manufacture of silicon thin-film - Google Patents
Manufacture of silicon thin-filmInfo
- Publication number
- JPS589320A JPS589320A JP56105703A JP10570381A JPS589320A JP S589320 A JPS589320 A JP S589320A JP 56105703 A JP56105703 A JP 56105703A JP 10570381 A JP10570381 A JP 10570381A JP S589320 A JPS589320 A JP S589320A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- silicon thin
- film
- plasma
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10P14/3411—
-
- H10P14/24—
-
- H10P14/3442—
-
- H10P14/3444—
Landscapes
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はダイオード、太陽電池、両像形成用光導電体又
は続NIL装置用光電変換素子等に適用することのでき
るシリコン薄膜の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for producing a silicon thin film that can be applied to diodes, solar cells, photoconductors for both image formation, photoelectric conversion elements for continuous NIL devices, and the like.
従来、シリコン薄膜が所期□の目的な達成するために単
独で、又は一般(pin接合素子又はpniI会素子と
して使用されている。このようなpln又はpn接合素
子は4常グロー放電法によりプラズマ雰囲気下にて例え
ば不純物としてB(ホウ素)を添加したpl[シリコン
薄膜を形成し、次で該p型シリコン薄膜上に活性層であ
る添加しない1型シリコン薄膜及びP(リン)を添加し
たn型シリコン薄膜を、又は前記p型シリコン薄膜上に
直接前記nllシリコン薄膜を成長させる二つ又は三つ
の成膜工1mKよって作製されている。別法として最初
にn層膜を、次で111層及びp層膜を又は前記n層膜
上に直接p層膜を成膜する作製方法も又同じように行な
われた。しかしながら、このような成膜方法によって作
製された素子は、既成長の下層膜上に新しい上層を成膜
するlVc下層(既成長)膜の不純物がプラズマ雰囲気
下で放出され、上層のjiK混入するという欠点をもっ
ている。その結果、不純物を含まない基板上に成長させ
た膜に比べ不純物を含む膜上に成長させた膜は、光電気
伝導度及び陽電気伝導度の低下が生じる。このためKj
lに、太陽電池を目的とするpin接合半導体素子を製
造した場合、基板、p層膜、1層膜、n層膜の願に作製
された素子についていえば、1層膜中にp * 111
IIに添加した不純物が混入するために光電気体4度及
び陽電気伝導度が低下するとともに、良好な接合−が形
成されない。他方、基板、n層膜、五層展、p層膜の願
に作製された素子につい(いえば、1階膜中にn層膜に
添加した不純物が混入し、7エルミレベルの位置を移動
させるため、充分な開放電圧を得ることができない。こ
れらのことは結局、光のエネルギー変換効率が低下する
ことを意味し、太陽電池としての性能を低下ぜしめると
同様、憾の諸用途に使用した場合にも性能の低下をもた
らすものであった。Conventionally, a silicon thin film has been used alone or as a general (pin junction element or pniI junction element) to achieve a desired purpose. In an atmosphere, for example, a PL silicon thin film doped with B (boron) as an impurity is formed, and then an undoped type 1 silicon thin film serving as an active layer and an n-type silicon film doped with P (phosphorus) are formed on the p-type silicon thin film. type silicon thin film or the NLL silicon thin film directly on the p-type silicon thin film using two or three 1 mK deposition steps. Alternatively, first the n-layer film and then the 111-layer film are grown. A method of forming a p-layer film or a p-layer film directly on the n-layer film was also carried out in the same way. However, devices fabricated by such a film-forming method are Forming a new upper layer on top of the lVc film has the disadvantage that impurities in the lower (already grown) film are released in a plasma atmosphere and are mixed into the upper layer.As a result, the film grown on a substrate that does not contain impurities A film grown on a film containing impurities has lower photoelectric conductivity and positive conductivity compared to
If a pin junction semiconductor device is manufactured for the purpose of solar cells, if the device is manufactured using a substrate, a p-layer film, a single-layer film, and an n-layer film, p*111 in the single-layer film.
Due to the contamination of the impurities added to II, the photoelectric conductivity and positive electrical conductivity are reduced, and a good bond is not formed. On the other hand, for devices fabricated using a substrate, an n-layer film, a five-layer film, and a p-layer film (for example, impurities added to the n-layer film are mixed into the first-layer film and moved from the 7-hermi level). As a result, it is not possible to obtain a sufficient open-circuit voltage.This ultimately means that the light energy conversion efficiency decreases, which reduces the performance of solar cells and makes them difficult to use for various applications. Even in this case, the performance deteriorated.
本発明者等は、不純物元素を添加したpm[シリコン薄
膜又はn1Mシリコン薄膜を弗素、塩素、臭素、沃素及
び水素の少なくとも同筒の元素のガスのプラズマ放電状
態下におくζ、piI又はn[シリコン薄膜はその表面
から5oooiまでの深さの不純物量が減少し、そして
* p II又はnllシリコン薄膜の不純物が除去さ
れたことによりできたダングリングボンドはプラズマ放
電ガスにより置換され、それによってプラズマ雰囲気下
におけるシリコン薄膜からのこれ以上の不純物を放出さ
せないための障壁層を形成するということを見出した。The present inventors have proposed that a pm[silicon thin film or n1M silicon thin film doped with impurity elements is subjected to a plasma discharge state of a gas containing at least the same number of elements as fluorine, chlorine, bromine, iodine, and hydrogen. The silicon thin film has a reduced amount of impurities at a depth of 5oooi from its surface, and the dangling bonds created by the removal of impurities in the p II or nll silicon thin film are replaced by plasma discharge gas, thereby increasing the plasma It has been discovered that a barrier layer can be formed to prevent further release of impurities from a silicon thin film in an atmosphere.
巣に又、シリコン薄膜からの不純物の滅茶程度及び減少
深さは、真空容器のプラズマ放電時圧力及び時間、並び
にプラズマ放電時力密度を調整することによって種々に
変え得ることが分った。Additionally, it has been found that the degree of destruction and the depth of reduction of impurities from the silicon thin film can be varied by adjusting the pressure and time during plasma discharge in the vacuum vessel, as well as the force density during plasma discharge.
本発@に係る製造方法を実施する際の上記重要なパラメ
ータの一つである放電時圧力itt、5x1 G−”
Torr〜3 Torrに制御されるのが好ましい。The discharge pressure itt, which is one of the important parameters mentioned above when implementing the manufacturing method according to the present invention, is 5x1 G-”
It is preferable to control the temperature between Torr and 3 Torr.
つまり、放電時圧力が1.5810−” Torr以下
であると真空容器内の流れが拡散流となりシリコン薄膜
基板より放出された不純物が再びシリコン薄膜基板へと
混入する可能性が大となるために、真空容器内の流れを
粘性流とするべく放電時圧力は1、5 X I Q−”
Torr以上であることが必要となる。In other words, if the discharge pressure is below 1.5810 Torr, the flow inside the vacuum vessel becomes a diffusion flow, and there is a high possibility that impurities released from the silicon thin film substrate will mix into the silicon thin film substrate again. , to make the flow inside the vacuum container a viscous flow, the pressure during discharge is 1.5
It is necessary that the value is at least Torr.
又1隈としての放電時圧力3Torrは、電極とアース
シールドとの放電を防止するためであり、主に、装置因
子によるものである。又放電電力書度は使川されるブラ
ズiガスの性質により変化するが、0.5〜50 W/
cJamが適蟲である。このような条件下における放電
時間は1秒〜5時間の間で種々に巌えることができる。Further, the pressure at the time of discharge of 3 Torr is for preventing discharge between the electrode and the earth shield, and is mainly due to equipment factors. Also, the discharge power level varies depending on the nature of the Blaz i gas used, but it is 0.5 to 50 W/
cJam is suitable. The discharge time under such conditions can vary from 1 second to 5 hours.
又、放電電力密度と放電時間との関係について言えば、
一般に放電電力密度は原始添加不純物元素の減少深さに
関与し、放電時間は原始添加不純物元素の減少量に@与
するということができる。Also, regarding the relationship between discharge power density and discharge time,
Generally, it can be said that the discharge power density is involved in the depth of reduction of the originally added impurity element, and the discharge time affects the amount of reduction of the originally added impurity element.
又、プラズマ状態にもたらされるプラズマ元素ガスの真
空容器内への流量はプラズマ状態を安定に保つようKl
定されることが必要であり、0.5〜11008CCに
て好結果が得られた。In addition, the flow rate of the plasma element gas brought into the plasma state into the vacuum chamber is adjusted to keep the plasma state stable.
Good results were obtained at 0.5 to 11008 CC.
本発明は以上の如き新しい緒知見に基いてなされたもの
である。即ち、本発明に係るシリコン薄膜の製造方法は
、弗素、塩素、臭素、沃素お□よび水素の少なくとも一
種の元素のガスのグプズi放電状態中Kpmシリコyi
**又はnl[シリコン薄膜をおき、p型又はnllシ
リコン薄膜の表面から5000スまでの任意の深さまで
の不純物量を減少さセかつ不純物が除かれたことkより
できたダンプリン2ボンドをプラズマ放電ガスにより置
換することを顕著な特徴とする。The present invention has been made based on the above-mentioned new findings. That is, the method for producing a silicon thin film according to the present invention provides Kpm silicon yi in a gas discharge state of at least one element of fluorine, chlorine, bromine, iodine, and hydrogen.
** or nl [A silicon thin film is deposited, and the amount of impurities is reduced from the surface of the p-type or nll silicon thin film to an arbitrary depth of 5,000 mm.The dumplin 2 bond produced by removing the impurities is then exposed to plasma. A notable feature is that it is replaced by discharge gas.
従って、本発明に従って製造されたpm!又はn輌シリ
コン薄膜は、人工11において鉄薄膜の上K例えば1層
膜を成膜する場合のように低電力グッズ實放電に晒され
ても薄膜内の不純物を1層膜中へと再放出することはな
い。Therefore, the pm! produced according to the invention! Alternatively, even if a silicon thin film is exposed to a low-power electric discharge, as in the case of forming a single-layer film on top of an iron thin film in an artificial process, the impurities in the thin film will be re-released into the single-layer film. There's nothing to do.
即ち、従来の方法にて作製されたnfij又は9M薄膜
基板上に他の膜をプラズマ雰囲気下で成長させると、こ
の膜中に基板となった膜の不純物を1016原子/cm
”以上含むのに比べ本発明の製造方法で作製されたnl
l又はpW1薄膜を基板とした上に、他の膜を成長させ
た場合には、この膜中への基板となった膜の不純物の放
出量を101@原子/rs”以下に抑制することが可能
である。That is, when another film is grown in a plasma atmosphere on an NFJ or 9M thin film substrate prepared by the conventional method, the impurities of the film used as the substrate are contained in the film at 1016 atoms/cm.
``Nl produced by the production method of the present invention compared to the above
When another film is grown on a 1 or pW1 thin film as a substrate, it is possible to suppress the amount of impurities released into this film from the film that served as the substrate to 101@atoms/rs” or less. It is possible.
従って、本発明の主たる目的は、任意のプラズマ雰囲気
下Kthされても、添加された不純物を外部へと放出し
ない(又は放出しても極めてわずかとされる)pm!又
はnllシリコン薄膜の製造方法を提供することである
。Therefore, the main object of the present invention is to prevent the added impurities from being released to the outside (or even if they are released, it is assumed to be extremely small) even if Kth is performed in any plasma atmosphere. Another object of the present invention is to provide a method for manufacturing an NLL silicon thin film.
本発明の他の目的は、良好な光電気伝導度及び暗電気伝
導度を有し且つ光エネλギ変換効率の向上した太陽電電
、−像形成用光導電体、l1IIIL装置用光電変換素
子又はダイオード等の作製に使用することのできるシリ
コン薄膜の製造方法を提供することである。Another object of the present invention is to provide a solar cell, a photoconductor for image formation, a photoelectric conversion element for an 11IIIL device, or a solar cell having good photoelectric conductivity and dark electric conductivity and improved light energy conversion efficiency. An object of the present invention is to provide a method for manufacturing a silicon thin film that can be used for manufacturing diodes and the like.
本発明に係る製造方法においてはシリコンの単結晶半導
体、及びシラン(81Ha )にドーパントガスを混合
したものを原料ガスとしプラズマ雰囲気下にて任意の基
板上に成膜された非晶質のシリコン半導体等のpif又
はnllシリコン薄膜を使用することができるが、更に
本出願人に係る特許出願(特願昭55−143010号
)K記載されるようなシリコン薄膜、即ち、シラy 8
iH4またはハロゲン化シラン81H,〜、x4〜t
(X:ハロケン元11)のいずれか、またはその2種以
上の混合ガスを原料ガスとし、これにドーパントガスを
混合し、成膜適度を十分に制御し結晶、非晶質混合層を
生成する目的で、前記混合ガスを、へりりム、ネオン、
ア★ゴン等の希オスまたは水素尋で約l対lより大きい
割合で希釈するとと4k、約0.2 W/(J”以上の
プラズマ放電電力密度の電力を投入しながら成膜された
シリコン薄膜をも都合よく適用し得るものである。In the manufacturing method according to the present invention, an amorphous silicon semiconductor film is formed on an arbitrary substrate in a plasma atmosphere using a silicon single crystal semiconductor and a mixture of silane (81Ha) and a dopant gas as raw material gases. In addition, silicon thin films such as those described in the applicant's patent application (Japanese Patent Application No. 55-143010), i.e., Si 8
iH4 or halogenated silane 81H, ~, x4~t
(X: Haloken element 11) or a mixture of two or more thereof is used as a raw material gas, a dopant gas is mixed with this, and a crystalline and amorphous mixed layer is generated by sufficiently controlling the film formation mode. For the purpose of
When diluted with a diluted oxide such as agonist or hydrogen fat at a ratio of about 1:1 or more, silicon is deposited while applying power with a plasma discharge power density of 4k, about 0.2 W/(J" or more). Thin films may also be conveniently applied.
次に、本発明に係るシリコン薄膜の製造方法を実施例k
jlて説明する。Next, the method for manufacturing a silicon thin film according to the present invention will be described in Example K.
I will explain.
実施例1
第1図において、混合容器lを含めた全装置系を油回転
ポンプ2および油拡散lンプ3を使って約10−a″”
I’orrの真空度にし、次でシランボンベ4および水
素ボンベ5、さらにドーパントガス(シボラン又は本ス
フィン)lンべ6または7よりガスを混合容器11C所
要の割合で導入し、混合する。Embodiment 1 In FIG. 1, the entire equipment system including the mixing vessel 1 is pumped approximately 10-a'' using an oil rotary pump 2 and an oil diffusion pump 3.
The degree of vacuum is set to I'orr, and then gases are introduced from the silane cylinder 4, the hydrogen cylinder 5, and the dopant gas (ciborane or sphin) cylinder 6 or 7 at a required ratio into the mixing container 11C and mixed.
混合されたガスは流量計8を通して真空容器9中に一定
流量で導入される。メインパルプ10で操作して真空容
器9中の真空度を真空計11で監視しながら所要の圧力
に維持する。高周波発振@12で電極13および13’
関に高周波電圧を印加してグー−放電を発生させる。基
板15はヒーター14で加熱された基板上に載置され、
ヒーターで所要の温度に加熱されており、この基板15
上にドープされたシリコン薄膜が成膜される。The mixed gas is introduced into the vacuum vessel 9 through the flow meter 8 at a constant flow rate. The main pulp 10 is operated to maintain the required pressure while monitoring the degree of vacuum in the vacuum container 9 with a vacuum gauge 11. Electrodes 13 and 13' with high frequency oscillation @12
A goo discharge is generated by applying a high frequency voltage to the gate. The substrate 15 is placed on a substrate heated by the heater 14,
This substrate 15 is heated to the required temperature with a heater.
A doped silicon thin film is deposited thereon.
本実論例において、原料ガスは84H,s H,=1:
1の混合ガスを用いドーパントとしてシボラン(BII
H・)を8tH,V一対して2%(体積基準)混合した
ものであった。又水素グツズ!雰囲気下にて処理する前
のpliシリコン薄膜の成膜条件はプラズマ被電電力密
度0. I W/cI1m 、原料ガス流量158CC
M、基板温度300℃、成膜圧力S X 10−”7o
rrであった。In this practical example, the raw material gas is 84H,s H,=1:
Siborane (BII) was used as a dopant using a mixed gas of
It was a mixture of 8 tH and 2% (volume basis) of 8 tH and V. Hydrogen stuff again! The deposition conditions for the pli silicon thin film before processing in the atmosphere are a plasma applied power density of 0. I W/cI1m, raw material gas flow rate 158CC
M, substrate temperature 300°C, film formation pressure S X 10-”7o
It was rr.
上記の如くにてレシリコン薄膜を成膜した後再び混合客
gs1を含めた全装置系をボンダ2および3を使って約
10−’ Torrの真空度まで真空にし、水素ボンベ
5より水嵩ガスを管路16を介して直**量計8に供給
し、次で真空容器9中に一定流量尋人する。メインパル
プ10を操作して真空客器9中の真空度を真空計11.
で監視しながらITorr に調整する。次で、高周
波発振器12で電1ii13及び13/関に高周波電圧
13−56メjヘルツを印加して水素プラズマグー−放
電を発生させる。これkよ゛り表面から不純物が除去さ
れ、その結果生じたダングリングボンドが水素により置
換されたpHの非晶質シリコン薄膜が作製された。After forming the resilicon thin film as described above, the entire equipment system including the mixed customer gs1 is again evacuated to a vacuum level of approximately 10-' Torr using bonders 2 and 3, and water bulk gas is piped from the hydrogen cylinder 5. It is fed directly via line 16 to meter 8 and then at a constant flow rate into vacuum vessel 9. Manipulate the main pulp 10 to measure the degree of vacuum in the vacuum chamber 9 with a vacuum gauge 11.
Adjust to ITorr while monitoring. Next, the high frequency oscillator 12 applies a high frequency voltage of 13 to 56 MHz to the voltages 1ii13 and 13/ to generate a hydrogen plasma goo discharge. An amorphous silicon thin film having a pH in which impurities were removed from the surface and the resulting dangling bonds were replaced by hydrogen was fabricated.
水素プラズマ放電条件つまり放電時間を変えて4種のp
l[非晶質シリコン薄膜を作製した。結果は第11HC
示される。この表で、AIが水素グツズマ放電処鳳をし
ない従来の方法により製造したp瀧シリコン薄膜である
。12〜ム5が本発明により製造したpHシリコン薄膜
の実施例であり、水素Aス流量および水素プラズマ放電
時圧力を調整するととにより、装置内の流れを粘性流領
域にし、真空容器の駿及びシリコン薄膜より放出された
ゼ冒ンをシリコン薄膜中に?!混入しないような操作が
なされた。Four types of p were prepared by changing the hydrogen plasma discharge conditions, that is, the discharge time.
l [An amorphous silicon thin film was produced. The result is the 11th HC
shown. In this table, AI is a p-silicon thin film manufactured by a conventional method without hydrogen gas discharge treatment. 12 to 5 are examples of pH silicon thin films produced according to the present invention, and by adjusting the hydrogen A gas flow rate and the pressure during hydrogen plasma discharge, the flow in the device is made into a viscous flow region, and the Is the radiation released from the silicon thin film contained in the silicon thin film? ! Operations were carried out to prevent contamination.
第250は、本発明に従って作製されたシリコン薄膜の
電気伝導度を水素プラズマ処理時間の関数として示すも
のである。第2図から、本発明の製造法により、表面か
らシリコン薄膜中のボロン原子量が減少していることが
考察される。また、8IM8jl定により、本発明によ
るpm薄膜は、表mから10001の深さまでのダーツ
原子が51−に除去されていることが一μされた(籐3
図を参敗せよ)。No. 250 shows the electrical conductivity of silicon thin films made according to the present invention as a function of hydrogen plasma treatment time. From FIG. 2, it can be considered that the amount of boron atoms in the silicon thin film is reduced from the surface by the manufacturing method of the present invention. Furthermore, it was determined by the 8IM8jl determination that the dart atoms from the surface m to a depth of 10001 in the PM thin film according to the present invention were removed to a depth of 51-.
Please refer to the figure).
実施例2
ドーパントとしてホスフィン(Paa)を使用する以外
は実施例1と同様の方法に−Cngのシリコン薄膜を成
績し、次で実施例1と同様の方法にて皺nilシリコン
薄膜に水素プラズマ処理を論した。Example 2 A -Cng silicon thin film was prepared in the same manner as in Example 1 except that phosphine (Paa) was used as the dopant, and then the wrinkled nil silicon thin film was subjected to hydrogen plasma treatment in the same manner as in Example 1. discussed.
8MM8測定により本実@によるnl[薄膜は表面から
5001の深さまで燐原子が完全kWk去されているこ
とが確認された。8MM8 measurements confirmed that the phosphorus atoms were completely removed from the nl thin film from the surface to a depth of 5001 kW.
以上の如くに本発明の製造方法によって製造されたpm
!又はn型のシリコン薄膜は従来の成膜工IIKよって
pnllの又はpin II #) 41合素子な製造
することができることが理解されるであろう。本発明に
より成膜されたpl[(又はnl[)ill上に頴にt
i1m!、n型(又はp If ) Hな成膜して作製
されたpin接合半導体素子は従来のpin級合半纏体
素子よりも良好なpi (又はni )接合を有し、同
様に本発明により成膜されたpH(又はn Ii! )
1M上にn1M(又はp II )膜を成膜したpn
*合半合体導体素子来のpn接合半導体菖子よりも、良
好なpnm合を有する。又pH膜基板に本発明を適用し
、咳基板膜表函から不純物を充分に除去してpillシ
リコン薄膜とすることもでき、この場合にはp1膜上に
nm1iな成膜することによってpin接合牛尋体素子
を作ることもできる。pm produced by the production method of the present invention as described above
! Alternatively, it will be appreciated that n-type silicon thin films can be fabricated using conventional deposition techniques such as pnll or pin II (#) 41 composite devices. On the pl[(or nl[)ill] film formed according to the present invention, it is possible to
i1m! , n-type (or p If ) H films have a better pi (or ni ) junction than the conventional pin-class hybrid semiconductor device, and similarly, the pin junction semiconductor device fabricated by forming n-type (or p If ) H films has a better pi (or ni ) junction than the conventional pin-class hybrid semiconductor device. Membrane pH (or n Ii!)
PN with n1M (or p II ) film deposited on 1M
*It has better pnm matching than the pn junction semiconductor iris which is a hybrid conductor element. In addition, the present invention can be applied to a pH film substrate to sufficiently remove impurities from the pH film surface to form a pill silicon thin film. You can also make Ushihiro body elements.
第1図は本発明に係るシリコン薄膜製造方法を実施する
装置を示す概略図である。
第2wJは本発明に係る製造方法により作製されたシリ
コン薄膜の電気伝導度をプラズマ放電時間の関数として
示すグラフである。
墓3図は本発明に係る製造方法により作製されたシリコ
ン薄膜のSIM8の測定結果を示すグラフである。
1:混合容器
4.5.6,7:ガスがンペ
9二真空容器
13.13’:電極
15:基板FIG. 1 is a schematic diagram showing an apparatus for implementing the silicon thin film manufacturing method according to the present invention. The second wJ is a graph showing the electrical conductivity of a silicon thin film produced by the production method according to the present invention as a function of plasma discharge time. Figure 3 is a graph showing the measurement results of SIM8 of a silicon thin film manufactured by the manufacturing method according to the present invention. 1: Mixing container 4.5.6, 7: Gas pump 92 Vacuum container 13.13': Electrode 15: Substrate
Claims (1)
素、沃素及び水素の群から選択された少なくとも一種の
元素のプラズマ雰囲気下に置き、それKよって前記シリ
コン薄膜の表面から所定の深さにわたって不純物元素の
量を減少させ且つプラズマ元素が咳不純物元素と置換す
るようにしたことを特徴とするシリコン薄膜の製造方法
。 2)弗素、塩素、臭素、沃素又は水嵩ガスのプラズマ放
電時圧力を調整し、容器内の流れを粘性流領域とするこ
とを特徴とする特許請求の範囲第1項記載の製造方法。 3)弗素、塩素、臭素、沃素又は水嵩ガスのプラズマ被
電時圧力は1.5 X 10−”〜3 Torrである
ことを特徴とする特許−求の範囲第2項記載の製造方法
。 4)電力密度を0.5〜s o w7amsの範囲で変
えることによって不純物減少深さを調整することを特徴
とする特許請求の範囲第3項記載の製造方法。 5)不純物量はシリコン薄膜の表面から最大5.000
λの深さにわたって減少することを特徴とする特許請求
の範囲第4項記載の製造方法。 6)シリコン薄膜は単結晶のシリコン半導体である特許
請求の範8第1項記載の製造方法。 7)シリコン薄膜は非晶質のシリコン半導体である特許
請求の範8第1項記載の製造方法。 8)シリコン薄膜は非晶質層中に微結晶粒が混在してい
るシリコン半導体である特許請求の範Ii!1ts1項
記載の製造方法。 9)pal又はnilシリコン薄膜をフッ素、塩素、臭
素、沃素及び水素の群から選択された少なくとも一種の
元素のプラズマ雰囲気下に置き、それKよって前記シリ
コン薄膜の表面から所定の縁さKわたって不純物元素の
量を減少させ且つプラズマ元素が咳不純物元素と置換す
るよ5にし、次で該薄膜上K n M又はPi1シリコ
ン薄膜を成膜すること41−特徴とするシリコン薄膜の
製造方法。 1u)pH又はnalシリコン#膜をフッ素、塩素、臭
素、沃素及び水素の群から選択された少なくとも一穂の
元素のグツズ!11!−気下に置き、それによって−記
シリコン薄膜の表面から所定の深さにわたって不純物元
素の量を減少させ且つプラズマ元素が該不純物元素と置
換するようにし、次で皺薄膜上Ki型シリコン薄l1l
I!爽にnll又はp櫃シリコン薄膜な成膜することを
特徴とするシリコン薄膜の製造方法。[Claims] 1) The pal father places a nil silicon thin film under a plasma atmosphere of at least one element selected from the group of fluorine, chlorine, bromine, iodine, and hydrogen, so that the surface of the silicon thin film is 1. A method for manufacturing a silicon thin film, characterized in that the amount of impurity elements is reduced over a predetermined depth, and plasma elements are substituted for cough impurity elements. 2) The manufacturing method according to claim 1, characterized in that the pressure during plasma discharge of fluorine, chlorine, bromine, iodine, or water gas is adjusted so that the flow within the container is in a viscous flow region. 3) The manufacturing method according to item 2 of the patent-requested scope, characterized in that the pressure when applying the plasma of fluorine, chlorine, bromine, iodine or water bulk gas is 1.5 x 10-'' to 3 Torr. ) The manufacturing method according to claim 3, characterized in that the impurity reduction depth is adjusted by changing the power density in the range of 0.5 to 7 ams. 5) The amount of impurities is determined by the surface of the silicon thin film. up to 5,000
5. A manufacturing method according to claim 4, characterized in that the depth decreases over a depth of λ. 6) The manufacturing method according to claim 8, wherein the silicon thin film is a single crystal silicon semiconductor. 7) The manufacturing method according to claim 8, wherein the silicon thin film is an amorphous silicon semiconductor. 8) Claim Ii! The silicon thin film is a silicon semiconductor in which microcrystalline grains are mixed in an amorphous layer! 1tsThe manufacturing method described in item 1. 9) Placing a PAL or NIL silicon thin film in a plasma atmosphere of at least one element selected from the group of fluorine, chlorine, bromine, iodine and hydrogen, thereby extending a predetermined edge K from the surface of the silicon thin film. 41 - A method for manufacturing a silicon thin film, characterized in that the amount of impurity element is reduced and the plasma element replaces the cough impurity element, and then a K n M or Pi1 silicon thin film is deposited on the thin film. 1u) pH or nal silicon # membrane with at least one ear of elemental goodness selected from the group of fluorine, chlorine, bromine, iodine and hydrogen! 11! - placed under air, thereby reducing the amount of impurity elements over a predetermined depth from the surface of the silicon thin film and allowing plasma elements to replace the impurity elements, and then placing the Ki-type silicon thin film on the wrinkled thin film.
I! A method for producing a silicon thin film, characterized by forming a thin NLL or P silicon film.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56105703A JPS589320A (en) | 1981-07-08 | 1981-07-08 | Manufacture of silicon thin-film |
| US06/394,074 US4490208A (en) | 1981-07-08 | 1982-07-01 | Method of producing thin films of silicon |
| EP82303526A EP0069580B1 (en) | 1981-07-08 | 1982-07-05 | Method of producing thin films of silicon |
| DE8282303526T DE3276280D1 (en) | 1981-07-08 | 1982-07-05 | Method of producing thin films of silicon |
| US06/790,781 US4598304A (en) | 1981-07-08 | 1985-10-23 | Thin film devices of silicon |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56105703A JPS589320A (en) | 1981-07-08 | 1981-07-08 | Manufacture of silicon thin-film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS589320A true JPS589320A (en) | 1983-01-19 |
| JPH0376018B2 JPH0376018B2 (en) | 1991-12-04 |
Family
ID=14414716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56105703A Granted JPS589320A (en) | 1981-07-08 | 1981-07-08 | Manufacture of silicon thin-film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS589320A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6080225A (en) * | 1983-10-11 | 1985-05-08 | Hitachi Ltd | Dry process treatment method and its equipment |
| JPS6347920A (en) * | 1986-08-18 | 1988-02-29 | Hitachi Ltd | Method for manufacturing crystalline semiconductor device |
| JPH08227879A (en) * | 1995-12-18 | 1996-09-03 | Hitachi Ltd | Dry process treatment method and apparatus thereof |
| CN110327475A (en) * | 2019-07-25 | 2019-10-15 | 山东大学齐鲁医院 | A kind of device and method of solid material bactericidal |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54158190A (en) * | 1978-06-05 | 1979-12-13 | Yamazaki Shunpei | Semiconductor device and method of fabricating same |
| JPS55154726A (en) * | 1979-05-22 | 1980-12-02 | Shunpei Yamazaki | Manufacture of semiconductor device |
-
1981
- 1981-07-08 JP JP56105703A patent/JPS589320A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54158190A (en) * | 1978-06-05 | 1979-12-13 | Yamazaki Shunpei | Semiconductor device and method of fabricating same |
| JPS55154726A (en) * | 1979-05-22 | 1980-12-02 | Shunpei Yamazaki | Manufacture of semiconductor device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6080225A (en) * | 1983-10-11 | 1985-05-08 | Hitachi Ltd | Dry process treatment method and its equipment |
| JPS6347920A (en) * | 1986-08-18 | 1988-02-29 | Hitachi Ltd | Method for manufacturing crystalline semiconductor device |
| JPH08227879A (en) * | 1995-12-18 | 1996-09-03 | Hitachi Ltd | Dry process treatment method and apparatus thereof |
| CN110327475A (en) * | 2019-07-25 | 2019-10-15 | 山东大学齐鲁医院 | A kind of device and method of solid material bactericidal |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0376018B2 (en) | 1991-12-04 |
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