[go: up one dir, main page]

JPS578980A - Memory device - Google Patents

Memory device

Info

Publication number
JPS578980A
JPS578980A JP8145580A JP8145580A JPS578980A JP S578980 A JPS578980 A JP S578980A JP 8145580 A JP8145580 A JP 8145580A JP 8145580 A JP8145580 A JP 8145580A JP S578980 A JPS578980 A JP S578980A
Authority
JP
Japan
Prior art keywords
chip
line
address
sent
column address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8145580A
Other languages
Japanese (ja)
Inventor
Takeshi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8145580A priority Critical patent/JPS578980A/en
Publication of JPS578980A publication Critical patent/JPS578980A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Memory System (AREA)

Abstract

PURPOSE:To shorten an access time by accessing a memory chip with a paqe-mode accessing function in page mode and by accessing another chip while column addresses are changed over by one chip. CONSTITUTION:A row address RAS is sent out to an address line 70 and when a row address line 100 falls, each chip latches the row address at the same time. Then, the column address of data in a memory chip 60 is sent to the line 70 and when the column address line of the chip 60 falls, the chip 60 latches the column address. Further, the column address of data in a chip 61 is sent to the line 70 and when a line 111 falls, the chip 61 latches the column address. Data read out of both the chips are alternated by an AND gate 130 with their selection signals 120 and 121 and sent to a readout line 90.
JP8145580A 1980-06-18 1980-06-18 Memory device Pending JPS578980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8145580A JPS578980A (en) 1980-06-18 1980-06-18 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8145580A JPS578980A (en) 1980-06-18 1980-06-18 Memory device

Publications (1)

Publication Number Publication Date
JPS578980A true JPS578980A (en) 1982-01-18

Family

ID=13746869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8145580A Pending JPS578980A (en) 1980-06-18 1980-06-18 Memory device

Country Status (1)

Country Link
JP (1) JPS578980A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01281544A (en) * 1987-12-18 1989-11-13 Philips Gloeilampenfab:Nv Information processing system
JPH032943A (en) * 1989-02-24 1991-01-09 Data General Corp Storage system
JPH06103163A (en) * 1990-10-26 1994-04-15 Samsung Semiconductor Inc Storage device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01281544A (en) * 1987-12-18 1989-11-13 Philips Gloeilampenfab:Nv Information processing system
JPH032943A (en) * 1989-02-24 1991-01-09 Data General Corp Storage system
JPH06103163A (en) * 1990-10-26 1994-04-15 Samsung Semiconductor Inc Storage device

Similar Documents

Publication Publication Date Title
JPS6466899A (en) Memory cell
SE8402598L (en) DATA PROCESSING SYSTEM
JPS54139343A (en) Clock-system memory
JPS5785255A (en) Memory storage for integrated circuit
JPS56156993A (en) Read only memory
MY103962A (en) Multiport memory
JPS578980A (en) Memory device
JPS5746385A (en) Address discrimination method of semiconductor memory
JPS56114199A (en) Nonvolatile semiconductor memory device
KR850008238A (en) Semiconductor memory
JPS55163697A (en) Memory device
JPS5481035A (en) Ic memory unit
JPS5715286A (en) Memory device
JPS5774891A (en) Logical circuit
JPS57182247A (en) Buffer memory device
JPS57127981A (en) Digital signal storage device
KR880002304Y1 (en) DRAM column address selection circuit
JPS56159885A (en) Storage device
JPS5644178A (en) Buffer memory control system
JPS57147183A (en) Shift register
JPS57176464A (en) Data transfer system
JPS5532159A (en) Memory system
JPS55117788A (en) Semiconductor memory unit
JPS5621261A (en) Processing system for memory unit read/write
JPS5538683A (en) Mass-storage static shift register