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JPS568924A - Synchronous type universal counter - Google Patents

Synchronous type universal counter

Info

Publication number
JPS568924A
JPS568924A JP8469179A JP8469179A JPS568924A JP S568924 A JPS568924 A JP S568924A JP 8469179 A JP8469179 A JP 8469179A JP 8469179 A JP8469179 A JP 8469179A JP S568924 A JPS568924 A JP S568924A
Authority
JP
Japan
Prior art keywords
counter
output
type universal
synchronous type
universal counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8469179A
Other languages
Japanese (ja)
Other versions
JPS6217898B2 (en
Inventor
Koji Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP8469179A priority Critical patent/JPS568924A/en
Publication of JPS568924A publication Critical patent/JPS568924A/en
Publication of JPS6217898B2 publication Critical patent/JPS6217898B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To synchronize operation with clocks and also to make a counter output not instantaneous by operating the T input of a T flip-flop without using a reset terminal. CONSTITUTION:A value obtained by subtracting one from externally set value N3 is led to N-1 detecting circuit 4, which decides whether the value of counter 7 coincides with N-1 to output ''1'' when so or ''0'' when not. This output, and respective bits N1, N2, N3 and N4 of N are ANDed to input corresponding control signals S1, S2, S3 and S4 to exclusive-OR gates 2 of respective gates. Counter 7 returns the next ''0'' of N-1 and performs N-scale counter operation.
JP8469179A 1979-07-04 1979-07-04 Synchronous type universal counter Granted JPS568924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8469179A JPS568924A (en) 1979-07-04 1979-07-04 Synchronous type universal counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8469179A JPS568924A (en) 1979-07-04 1979-07-04 Synchronous type universal counter

Publications (2)

Publication Number Publication Date
JPS568924A true JPS568924A (en) 1981-01-29
JPS6217898B2 JPS6217898B2 (en) 1987-04-20

Family

ID=13837684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8469179A Granted JPS568924A (en) 1979-07-04 1979-07-04 Synchronous type universal counter

Country Status (1)

Country Link
JP (1) JPS568924A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58171129A (en) * 1982-03-31 1983-10-07 Matsushita Electric Ind Co Ltd Programmable frequency dividing circuit
JPH01256223A (en) * 1988-03-07 1989-10-12 Digital Equip Corp <Dec> Loadable ripple counter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58171129A (en) * 1982-03-31 1983-10-07 Matsushita Electric Ind Co Ltd Programmable frequency dividing circuit
JPH01256223A (en) * 1988-03-07 1989-10-12 Digital Equip Corp <Dec> Loadable ripple counter

Also Published As

Publication number Publication date
JPS6217898B2 (en) 1987-04-20

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