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JPS5649543A - Method for forming solder bump - Google Patents

Method for forming solder bump

Info

Publication number
JPS5649543A
JPS5649543A JP12412979A JP12412979A JPS5649543A JP S5649543 A JPS5649543 A JP S5649543A JP 12412979 A JP12412979 A JP 12412979A JP 12412979 A JP12412979 A JP 12412979A JP S5649543 A JPS5649543 A JP S5649543A
Authority
JP
Japan
Prior art keywords
film
bump
electrode
solder
foundation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12412979A
Other languages
Japanese (ja)
Inventor
Keiji Miyamoto
Toru Kawanobe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12412979A priority Critical patent/JPS5649543A/en
Publication of JPS5649543A publication Critical patent/JPS5649543A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01951—Changing the shapes of bond pads
    • H10W72/01953—Changing the shapes of bond pads by etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain a bump with high accuracy by a metbod wherein a metal film incompatible with solder is coated at the same time of forming the foundation for the bump, solder plating is carried out in the coated state of the metal film to form spherical solder at an electrode portion and then the metal film is removed by etching together with the bump foundation. CONSTITUTION:An Al electrode 3 is formed on an Si substrate 2 and an oxide film 4 is coated on the substrate 2 including both ends of the electrode 3. A bump foundation film 5 consisting of Cu, Ti is evaporated all over thus obtained surface and a metal film 11 such as Cr, Ti and Al incompatible with solder thereon. After apllying a photoregist film 6 all over that, a hole 6a with a diameter same as that of a bump to be formed is bored at a position above the electrode 3 and the film 11 is removed by etching to expose the film 5 in the bore 6a. Then, an Ni layer 7, an Sn layer 8 and a Pb layer 9 are placed on one another in the bore 6a and the surround film 6 is removed to expose the ends of the left film 11. The layers 7, 8 and 9 are melted to form a bump sphere 10 by the action of surface tension. In such a manner, the extension of the bump sphere 10 is prevented by the presence of the film 11 and finally the films 5 and 11 are removed by etching.
JP12412979A 1979-09-28 1979-09-28 Method for forming solder bump Pending JPS5649543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12412979A JPS5649543A (en) 1979-09-28 1979-09-28 Method for forming solder bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12412979A JPS5649543A (en) 1979-09-28 1979-09-28 Method for forming solder bump

Publications (1)

Publication Number Publication Date
JPS5649543A true JPS5649543A (en) 1981-05-06

Family

ID=14877632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12412979A Pending JPS5649543A (en) 1979-09-28 1979-09-28 Method for forming solder bump

Country Status (1)

Country Link
JP (1) JPS5649543A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4950623A (en) * 1988-08-02 1990-08-21 Microelectronics Center Of North Carolina Method of building solder bumps
US5137845A (en) * 1990-07-31 1992-08-11 International Business Machines Corporation Method of forming metal contact pads and terminals on semiconductor chips
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
US5376584A (en) * 1992-12-31 1994-12-27 International Business Machines Corporation Process of making pad structure for solder ball limiting metallurgy having reduced edge stress
US5767010A (en) * 1995-03-20 1998-06-16 Mcnc Solder bump fabrication methods and structure including a titanium barrier layer
US6409073B1 (en) * 1998-07-15 2002-06-25 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Method for transfering solder to a device and/or testing the device
US6461953B1 (en) 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50155968A (en) * 1974-06-07 1975-12-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50155968A (en) * 1974-06-07 1975-12-16

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4950623A (en) * 1988-08-02 1990-08-21 Microelectronics Center Of North Carolina Method of building solder bumps
US5137845A (en) * 1990-07-31 1992-08-11 International Business Machines Corporation Method of forming metal contact pads and terminals on semiconductor chips
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
US5374893A (en) * 1992-03-04 1994-12-20 Mcnc Apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
US5381946A (en) * 1992-03-04 1995-01-17 Mcnc Method of forming differing volume solder bumps
US5376584A (en) * 1992-12-31 1994-12-27 International Business Machines Corporation Process of making pad structure for solder ball limiting metallurgy having reduced edge stress
US5767010A (en) * 1995-03-20 1998-06-16 Mcnc Solder bump fabrication methods and structure including a titanium barrier layer
US6222279B1 (en) 1995-03-20 2001-04-24 Mcnc Solder bump fabrication methods and structures including a titanium barrier layer
US6409073B1 (en) * 1998-07-15 2002-06-25 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Method for transfering solder to a device and/or testing the device
US6461953B1 (en) 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure

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