JPH1197392A5 - - Google Patents
Info
- Publication number
- JPH1197392A5 JPH1197392A5 JP1997269306A JP26930697A JPH1197392A5 JP H1197392 A5 JPH1197392 A5 JP H1197392A5 JP 1997269306 A JP1997269306 A JP 1997269306A JP 26930697 A JP26930697 A JP 26930697A JP H1197392 A5 JPH1197392 A5 JP H1197392A5
- Authority
- JP
- Japan
- Prior art keywords
- filling
- cavities
- micro
- fine
- ultrafine particles
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
【発明の名称】微細窪みの充填方法[Title of invention] Method for filling fine depressions
【０００１】
【発明の属する技術分野】
本発明は、微細窪みの充填方法に係り、特に半導体素子の配線用溝等の微細窪みに銅（Ｃｕ）等の金属を充填するための充填方法に関する。[0001]
[Technical Field to which the Invention Belongs]
The present invention relates to a method for filling micro-cavities, and more particularly to a method for filling micro-cavities such as wiring grooves of semiconductor elements with metal such as copper (Cu).
【０００８】
本発明は上述の事情に鑑みなされたもので、充填材料として銅又は銅合金等の電気比抵抗の小さい材料を用いることができ、かつ微細な配線用の溝等の微細窪みに銅又は銅合金等の電気比抵抗の小さい材料を充填することができる微細窪みの充填方法を提供することを目的とする。[0008]
The present invention has been made in consideration of the above circumstances, and aims to provide a method for filling fine recesses, which allows the use of a material with low electrical resistivity, such as copper or a copper alloy, as a filling material, and which allows the filling of fine recesses, such as grooves for fine wiring, with a material with low electrical resistivity, such as copper or a copper alloy.
【０００９】
【課題を解決するための手段】
上述した目的を達成するため、本発明の充填方法は、微細窪みを有する基材の表面に超微粒子の材料を供給し、該超微粒子に超音波振動を印加しながら、前記微細窪みへの所定材料の充填を行うことを特徴とするものである。
本発明の充填方法の一態様は、前記微細窪みは、幅が１μｍ以下、アスペクト比が１〜１０であることを特徴とする。
本発明の充填方法の一態様は、前記超音波振動は、周波数が１〜１００ｋＨｚ、振幅が１〜１０００μｍであることを特徴とする。
本発明の充填方法の一態様は、前記超微粒子の平均粒径は３０Å〜０．１μｍであることを特徴とする。
本発明の充填方法の一態様は、前記超微粒子の材料は、銅又は銀又は白金又はこれらの合金からなることを特徴とする。
本発明の充填方法の一態様は、前記微細窪みの表面は、金属窒化物であることを特徴とする。
本発明の充填方法の一態様は、前記材料を微細窪みに充填した後、化学的機械的研磨（ＣＭＰ）により充填された材料の表面を平坦化することを特徴とする。
本発明の充填方法の好ましい態様では、前記基材は半導体基板である。 [0009]
[Means for solving the problem]
In order to achieve the above-mentioned object, the filling method of the present invention is characterized in that ultrafine particle material is supplied to the surface of a substrate having fine depressions, and a predetermined material is filled into the fine depressions while applying ultrasonic vibrations to the ultrafine particles.
In one aspect of the filling method of the present invention, the fine depressions have a width of 1 μm or less and an aspect ratio of 1 to 10.
One aspect of the filling method of the present invention is characterized in that the ultrasonic vibration has a frequency of 1 to 100 kHz and an amplitude of 1 to 1000 μm.
In one embodiment of the filling method of the present invention, the ultrafine particles have an average particle size of 30 Å to 0.1 μm.
In one aspect of the filling method of the present invention, the material of the ultrafine particles is made of copper, silver, platinum, or an alloy thereof.
One aspect of the filling method of the present invention is characterized in that the surface of the fine depression is made of a metal nitride.
One aspect of the filling method of the present invention is characterized in that after the material is filled into the micro-depression, the surface of the filled material is planarized by chemical mechanical polishing (CMP).
In a preferred embodiment of the filling method of the present invention, the substrate is a semiconductor substrate.
【００１０】
また、本発明の充填装置の好ましい態様は、微細窪みを有する基材の表面に超微粒子の材料を供給する供給ノズルと、前記基材又は超微粒子の少なくとも一方に超音波振動を付与する超音波振動子とを備える。[0010]
Furthermore, a preferred embodiment of the filling device of the present invention comprises a supply nozzle for supplying ultrafine particle material to the surface of a substrate having fine recesses, and an ultrasonic vibrator for applying ultrasonic vibrations to at least one of the substrate or the ultrafine particles.
Claims (7)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9269306A JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9269306A JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1197392A JPH1197392A (en) | 1999-04-09 |
| JPH1197392A5 true JPH1197392A5 (en) | 2004-10-14 |
Family
ID=17470512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9269306A Pending JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1197392A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100741040B1 (en) * | 1999-10-15 | 2007-07-20 | 가부시키가이샤 에바라 세이사꾸쇼 | Wiring formation method and device |
| EP1280193B1 (en) * | 2000-05-02 | 2011-06-29 | JGC Catalysts and Chemicals Ltd. | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by the method of manufacturing integrated circuit |
| JP3951750B2 (en) * | 2002-03-07 | 2007-08-01 | セイコーエプソン株式会社 | Substance filling method, film forming method, device and device manufacturing method |
| JP4619050B2 (en) * | 2003-06-30 | 2011-01-26 | 株式会社半導体エネルギー研究所 | Method for manufacturing display device |
| JP4273871B2 (en) | 2003-08-12 | 2009-06-03 | セイコーエプソン株式会社 | Wiring pattern forming method, semiconductor device manufacturing method, electro-optical device, and electronic apparatus |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593952A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Formation of aluminum wiring layer |
| JPH09134891A (en) * | 1995-09-06 | 1997-05-20 | Vacuum Metallurgical Co Ltd | Formation of thin film of semiconductor substrate |
| JP3521200B2 (en) * | 1995-12-12 | 2004-04-19 | 松下電器産業株式会社 | Wiring structure and method of forming the same |
-
1997
- 1997-09-16 JP JP9269306A patent/JPH1197392A/en active Pending
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