JPH1140924A - Novel method of forming fine circuit lines - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a micro circuit by forming a conductive metal layer n a Cu foil, laminating prepregs on the metal layer, etching off the foil, forming a pattern with photoresist, hardening, removing unhardened resist to form trenches, electrodepositing Cu in the trenches, and removing the resist. SOLUTION: This method comprises electrodepositing a conductive metal layer on one surface of a Cu foil, laminating the metal layer using a metal, e.g. Sn resistive against Cu etchants on an insulative board, etching off the Cu foil to expose the metal layer, forming a pattern with a photoresist, hardening the resist, removing non-hardened resist, forming trenches, electrodepositing Cu in the trenches, or electrodepositing Cu, if it cannot be electrodeposited, and removing the resist and removing the conductive metal layer, using an etchant other than Cu.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention relates generally to a method of manufacturing a printed circuit board. In particular, the invention relates to a novel method for forming very fine circuit lines.

[0002]

2. Description of the Related Art In a typical method of manufacturing a printed circuit board, a copper foil is laminated on an insulating substrate (most often a glass-reinforced epoxy resin prepreg), and the laminate is then laminated with the copper foil. In order to convert it to a circuit pattern, it is further processed by selectively removing the copper in portions by chemical etching. While such etching processes are generally satisfactory, it becomes clear that any time finer (narrower) circuit lines are required, they are limited.

[0003] Copper foil is very often treated prior to lamination in order to improve its bonding ability to an insulating substrate. For the purposes of the present application, unless otherwise specified, reference to copper foil should be taken to mean both treated and untreated copper foil interchangeably. .

[0004] The etchant does not actually create side surfaces perpendicular to the circuit lines. Instead, the etchant etched away too much copper at the top of the circuit lines due to the undercut of the resist, and at the bottom of the circuit lines removed less copper and therefore somewhat trapezoidal. It tends to leave circuit lines in shape. As a result, the minimum width of circuit lines is limited by having to account for such non-uniform etching. This problem is discussed in U.S. Pat. No. 5,437,914, which shows that the shape of the etched circuit lines is affected by the shape of the copper foil grain structure. According to the '914 patent, improved etching accuracy is achieved by laminating copper foil to a substrate in the opposite manner to the conventional method, but with its "glossy" surface facing down. there were. Some improved etching factors were obtained, indicating that the sides of the circuit lines were almost vertical.

Another method for improving the accuracy of circuit lines is to use thinner copper foils, since such thin copper foils can be etched quickly with less undercuts. However, such foils are not easy to handle. It has therefore been proposed to deposit on a support sheet a thin layer of copper which can be removed after laminating the copper foil on the substrate. One example is found in U.S. Pat. No. 3,998,601, wherein the copper thickness is 2-12.
μm layers are typically thick copper foils (eg, 35-70 μm).
m) and separated by a release layer. After laminating the composite foil on the substrate, if the supporting copper foil is removed by a mechanical peeling treatment, a thin 2 to 12 μm foil which can be processed into an electronic circuit is left. According to such a method, when the support foil is peeled off and removed, the thin foil can be partly removed.

[0006]

Thus, the present invention seeks to provide a method for solving the above-mentioned etching problem in a completely different way. That is, in making the circuit lines, instead of using the method of etching away the copper foil, instead deposit the circuit lines on a very thin conductive layer in the grooves defined by the resist. It is. This method is particularly advantageous when used to make the outer circuit layers of a multilayer circuit board, but can also be used for intermediate layers or circuit boards with one and two sides.

[0007]

SUMMARY OF THE INVENTION In one aspect, the present invention provides for the application of copper over and over a thin conductive layer in an area defined by a hardened photoresist. The present invention relates to a novel method for forming very narrow circuit lines on a non-conductive substrate. This is made possible by applying a thin layer of a conductive metal, metals or alloys to a non-conductive substrate. The conductive metal, metals or alloys are applied to a sheet of copper foil, which is then laminated to a substrate, with the conductive metal layer interposed between the copper foil and the substrate. . If the copper foil is subjected to a treatment that enhances its bonding ability to the substrate, the conductive metal can be applied to the copper foil either before or after such treatment. During the processing of the circuit board,
The copper foil is etched away, leaving the thin conductive metal in place. A photoresist is then applied, an image is formed, and cured. The uncured resist is removed, thus defining the area or "groove" where the circuit lines are desired. Now that the conductive layers are exposed, it is possible to selectively apply circuit lines in those areas. Finally, the cured photoresist is removed,
Then, when the exposed conductive metal layer is removed by chemical etching, a finished circuit remains.

As will be appreciated by those skilled in the art, the copper foil and conductive metal can be deposited on, but not limited to, the respective surfaces by electrodeposition, chemical vapor deposition, electroless deposition ( It can be applied in any conventional manner, including electroless deposition) and sputtering.

In one preferred embodiment, copper electroless plating is used to coat the conductive metal layer prior to electrodepositing the circuit lines.

[0010] Description of preferred embodiments the present invention comprises a circuit board obtained by the method as the novel method of forming a printed circuit board. While this method uses conventional procedures, it has significant advantages, particularly in that the circuit lines are more accurately defined than in conventional processing. Thus, it is possible to make finer circuit lines, which can be more closely packed in the circuit board.

Electrodeposition of metal onto copper foil is common practice. For example, in the '914 patent, a nodular deposit copper is formed on the glossy (smooth) surface of the copper foil to roughen the copper foil and improve its adhesion to the insulating layer. You. U.S. patent application Ser.
In / 517,321 fine deposits are placed on the copper foil to improve the adhesion, but the measured roughness of the foil remains unchanged. A similar method is disclosed in U.S. Pat. No. 5,482,784.

Omega Electronics (Ohmega E)
A series of patents (eg, US Pat. No. 4,808,967) assigned to US Pat. No. 4,808,967 discuss methods of making resistors on the surface of a printed circuit board. In this method, a layer of nickel-phosphorus is first electrodeposited on the surface of a copper foil, which is then laminated on an insulating substrate. The nickel-phosphorous layer does not act as a general conductive layer, but rather is exposed by selectively etching away the coated copper required for resistors in circuit design. The remaining copper layer is converted into conductive circuit lines by a conventional etching method.

The method of the present invention is distinctly different from conventional circuit board processing methods in which circuit lines are formed by selectively removing copper by etching. As explained above, the chemical etching process has inherent limitations that become particularly troublesome as circuit lines become finer and their pitches become narrower. In the novel method of the present invention, circuit lines are deposited directly into the space created by the use of photoresist, which leaves open trenches that will be filled by electrodeposition of copper. this is,
This is made possible by the conductive layer remaining on the substrate surface when the coated copper foil as a carrier is removed. The method of the present invention also differs from that of the Omega method where the layer on the substrate surface acts as a resistor.

The method of the present invention is illustrated in the block diagram of FIG. 1, which has been applied to the outer layers of a multilayer circuit board. In the first step, the copper foil is passed through a bath of a soluble compound of a conductive metal until the compound is about 0.2-5 μm thick on one of the matte or glossy surfaces of the copper foil. Electrodeposited.
As noted above, both before and after applying the conductive metal, the copper foil may be subjected to a treatment (such as nodular copper) that improves its adhesion to the insulating substrate. The above metals or alloys can be tin, nickel, tin-zinc, zinc-nickel, tin-copper and others, provided that they are used to remove copper during subsequent processes. The premise is that it must be resistant to the etchant. Typical conditions for the electrodeposition process are those industrially employed for applying a protective metal coating to a copper foil.

In a second step, the coated copper foil is applied to an insulative substrate, such as a commonly used glass reinforced epoxy resin, using conventional techniques, with the conductive metal next to the substrate. It is laminated.

The next step is a step of removing the copper foil by etching and embedding a thin layer of conductive metal in the substrate surface. To this end, the etchant is selected from those that remove copper but do not remove the metal of the conductive layer to a significant degree. One example of such an etchant is ammoniacal cupric chloride. In the past, thin copper foil was applied from an aluminum support layer, in which case the aluminum was also removed by etching. Thus, one advantage of the present invention is that it allows copper to be reclaimed and avoids contamination with dissolved aluminum that would occur if aluminum were used instead of copper in the method of the present invention. It is. Once the copper is removed by etching, the conductive metal (or alloy) layer is exposed, ready for photoresist application, image formation and curing.

In the method of the present invention, the uncured photoresist is removed to expose grooves forming circuit lines. Those skilled in the art will recognize that cured photoresist more accurately defines the circuit lines, and that the copper filling the grooves is better than an ideal rectangular circuit line formed by etching away the copper in the exposed areas. It will be clear that this will approach the shape of. This means that a finer circuit line can be formed because the shape of the circuit line is not governed by the etching method. As a result, the new method of the present invention reduces the lines and spacing to about 1 mil (25 μm) instead of 4 mils (100 μm).
Can be reduced to

[0018] Copper is electrodeposited using conventional techniques, such as those often used for copper plating on the outside of multilayer circuit boards. This electrodeposition can be performed when a thin layer of metal embedded in the substrate surface is sufficiently conductive. If electrodeposition is not possible, electroless plating of copper can be used to facilitate electrodeposition of the circuit lines. Copper can be deposited as desired at a predetermined thickness up to the height of the photoresist, which defines the shape of the groove. Conventional electrodeposition conditions are used.

At this point, the formation of the circuit lines has been completed. The remaining steps are to remove the photoresist by conventional means,
Then, the exposed conductive metal layer is removed using an etchant such as cupric acid chloride or sulfuric peroxide.

As will be readily apparent to those skilled in the art, certain steps of the present invention (eg, as illustrated in FIG. 1) are performed in any order that is industrially feasible. be able to. In particular, the subsequent steps of applying the conductive metal to the laminate can be performed in any manner operable by an operator.

The present invention has particular value when making the outer layers of a multilayer circuit board. Multilayer circuit boards generally have holes that connect the outer layer and the intermediate layer where copper is electrolessly plated,
Next, circuit lines are formed by electroplating. An exemplary method is shown in the block diagram of FIG. The copper foil is laminated on the intermediate circuit layer using the intervening layer of the prepreg, but the copper foil is not removed by etching. Copper is deposited on the copper foil using electroless plating and below the holes connecting the layers. A resist is then applied and copper circuit lines are electrodeposited. At this point, the excess copper foil must be removed by etching. However, those circuit lines and plated holes must be protected by a process of electrodepositing a resistive metal such as tin. At this time,
The resist is removable and the exposed copper foil is etched. As can be appreciated, such a step is
The sides of the circuit lines are also not protected by tin to be joined. In the present invention, there is no need to apply tin, since it is only necessary to remove the thin conductive layer (this can be done very quickly). Importantly, there is no substantial solution deposition cost required to apply and remove the tin layer.

FIG. 3 illustrates circuit lines formed by conventional etching methods on the outer layers of a multilayer circuit board in comparison with essentially rectangular lines formed using the method of the present invention. is there. Conventional circuit lines are significantly undercut after their formation (the top surface is protected with a tin coating) due to the need to etch away the copper foil.

The method of the present invention allows for more accurate creation of circuit lines, thus eliminating the need for circuit designers to compensate for the etching inaccuracies inherent in circuit line formation. This means that the resulting circuit can be smaller and more compact. The method of the present invention uses a method familiar to circuit board manufacturers and does not require significant changes to the technology. In fact, the production process is expected to be simplified when employing the method of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram of the method of the present invention applied to a multilayer circuit board.

FIG. 2 is a block diagram of a conventional method for a multilayer circuit board.

FIG. 3 shows a cross-sectional view of a normal circuit line in a multilayer circuit line in comparison with such a circuit line of the present invention.

Claims (10)

[Claims] 1. A method comprising: (a) applying on a sheet of copper foil a layer of conductive metal (s) resistant to an etchant used to remove copper; b) laminating the conductive metal-containing sheet of copper foil of step (a) with a prepreg or film substrate; and (c) etching the copper foil from the laminate made in step (b) by etching the conductive metal. Embedding (one or more) into the surface of the prepreg or film substrate; and (d) placing the conductive metal (s) produced in step (c) and the substrate on a substrate. Cover and apply photoresist,
Forming and curing the image; (e) removing the uncured photoresist of step (d) leaving grooves with the exposed conductive metal (s); (f) of step (e). Exposed conductive metal (one or more)
(G) removing the cured photoresist of step (d) to expose the conductive metal (s), and applying the exposed conductive metal (1). Forming a circuit line on the substrate by etching away the seed or seeds. 2. The method according to claim 1, wherein the layer of conductive metal has a thickness of 0.2 to 5 μm. 3. applying a conductive metal to the copper foil by an electrodeposition method;
The method of claim 1. 4. The method according to claim 1, wherein the conductive metal is applied to the copper foil by a chemical vapor deposition method. 5. The method according to claim 1, wherein the conductive metal is applied to the copper foil by an electroless deposition method. 6. The method according to claim 1, wherein the conductive metal is applied to the copper foil by a sputtering method. 7. The conductive metal is tin, nickel, tin-zinc,
The method of claim 1, wherein the method is selected from the group consisting of zinc-nickel and tin-copper. 8. A laminate comprising a substrate on which circuit lines are formed according to the method of claim 1, 2, 3, 4, 5, 6, or 7. 9. The laminate of claim 8, wherein the substrate is an intermediate layer of a multilayer circuit board. 10. The circuit board according to claim 1, 2, 3, 4, 5,
A copper foil to be used when produced by the method according to 6 or 7.