JPH11298857A - Image decoding apparatus for decoding an image so as to give another use to a frame area occupying a large area in a storage device, and a computer-readable recording medium storing an image decoding program - Google Patents

Abstract

(57) Abstract: Provided is an image decoding device which can secure a work area for storing various data including OSD data in a memory without sacrificing image quality. When a request is made to secure a storage area for OSD data, a data reduction control unit discards a macroblock located at a predetermined position on the display screen. OSD
The data access unit 63 stores the OSD in the area where the discarded macroblock is to be written in the frame storage device.
Write data. Only when the securing of the OSD data storage area is required in this way, an area corresponding to a predetermined portion of the display screen in the frame storage device is assigned to the OSD data storage area, so that image quality does not deteriorate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image decoding apparatus, and more particularly to an improvement for improving the efficiency of memory use.

[0002]

[Prior Art] Moving Picture Expert Group 2 (MPEG2)
The standard has gained high support from engineers around the world as an international standard technology for video compression. Especially in the image coding processing by the inter-frame bidirectional prediction method, since the image is compressed based on the correlation with the image to be displayed in the past and the future, the compression ratio is extremely high, and the moving image is recorded on the recording medium. It shows its true value when it is recorded and carried, or when it is transmitted to a remote place through a communication medium.

[0003] On the other hand, under the brilliant achievement of realizing a high compression ratio, there has been some whispering among engineers about the complexity and large scale of the image decoding device. This is picture data (generally Bi
It is called a directionally Predictive (B) picture. )
When decoding the image, the image decoding apparatus must refer to the image to be displayed in the past and the image to be displayed in the future from the B picture, so that the decoded image and the image to be referred to at the time of decoding are This is because it is necessary to individually develop the frame memory, and the frame memory becomes large. The frame memory is a memory area for storing pixel data for one screen to be displayed in one frame, and the pixel data written in the frame memory is synchronized with a horizontal synchronization signal in the display, for example, in a horizontal area of 720 pixels. The data is read out on a line basis of pixels × one pixel and converted into a video signal.

FIG. 27 shows an example of an SD-RAM in which three frame memories are secured. In this figure, 2Bank × 2
It is assumed that SD-RAM with 048 rows x 256 columns is used. In addition to the B picture, the types of picture data include Intra (I) pictures coded by the intra-frame coding method, and Predictive (P) pictures coded by the inter-frame forward prediction coding method. The SD-RAM has three frame memories for storing the decoded image for each type of coding scheme.

More specifically, the non-reference image data frame memory in FIG. 1 stores decoded B pictures. The reference image data A frame memory and the reference image data B frame memory store decoded I pictures or P pictures. These frame memories occupy an area of 2 Bank × 608 rows × 256 columns in the SD-RAM, and the decoded picture data stored in the reference image data A frame memory and the reference image data B frame memory is It is referred when decoding a picture.

In the prior art described above, since a large area on the SD-RAM is allocated to the three frame memories, a work area (work area) other than the frame memory has a margin to be allocated on the SD-RAM. There is a problem that there is no. Here, a typical work area other than the frame memory is a work area used for storing data for an on-screen display (OSD). What is OSD?
A character font or computer graphics that is overlaid on a moving image in accordance with an operator's instruction. A counter for displaying the current time and an image decoding device such as "play", "stop", "record", etc. It is used when displaying the processing content being performed on the display screen. This OS is also used when drawing menus to accept input from the operator.
D is used.

[0007] SD-RAM has room for storing OSD data
If it does not exist, additional memory must be added to secure the OSD data storage area. If such expansion is impractical, memory mapping as shown in FIG. 28 may be performed. FIG. 28 corresponds to FIG.
The non-reference image data frame memory that occupied the area of 2 Bank x 608 rows x 256 columns is changed to 2 Bank x 507 rows x 256
Reduced to the size of a column, 2Bank created by the reduction
A free area of × 101 rows × 256 columns is allocated to the OSD data storage area.

[0008] Such B picture reduction measures focus on the characteristic that B pictures are not referenced. In other words, if I-pictures and P-pictures stored in the frame memory are reduced, the picture quality degradation may affect the picture quality of other picture data referring to these picture data. Since the B-picture is not referred to at the time of decoding, the deterioration of the picture quality of the B-picture does not affect the picture quality of other picture data. Therefore, it is considered that the reduction of the occupied area of the B picture in the frame memory is more likely to allow image quality degradation than the reduction of the occupied area of the I picture or P picture. Is smaller than the frame memory of the picture data of the type.

As a method of reducing the size of a B picture, there is a method of generating (sub-sampling) color difference data constituting the B picture at intervals. In general, human eyes can recognize the fineness of luminance with high accuracy, but the recognition accuracy of fineness of color difference is not so high. On the basis of such human visual characteristics, data reduction as described above has been realized.

[0010]

However, when a sub-sample of only the color difference of a B picture is performed, the image quality of a period in which an I picture or a P picture is displayed and a period in which a B picture is displayed are displayed. The consistency of the data is deteriorated. That is, the image quality is not deteriorated during the period in which the I picture and the P picture are displayed, but is deteriorated only in the period in which the B picture is displayed. Both periods and bad periods will appear on the screen. In particular, when a moving image is recorded on a recording medium and carried, or when transmitted distantly through a communication medium, in order to obtain a high compression ratio, many images in the moving image are encoded into B pictures, and I and P pictures are encoded. Since the number of images to be encoded is small, the image quality of these many B pictures deteriorates, giving the operator an impression that the image quality of the entire moving image is poor.

Here, in many reproducing apparatuses, a storage area for OSD data is required when an OSD is displayed in accordance with an instruction from an operator. Since the OSD is displayed according to an instruction from the operator, the area for the OSD data needs to be secured only when the OSD data display is requested, but in the related art, the work area is always secured. However, there is a problem that the image quality of the B picture is sacrificed more than necessary.

[0012] It is an object of the present invention to provide an operating system without sacrificing image quality.
It is an object of the present invention to provide an image decoding apparatus which can secure a work area for storing various data including D data on a memory.

[0013]

An object of the present invention is to provide an image decoding apparatus which decodes a plurality of picture data contained in a video stream one by one according to an instruction from a host device and writes the decoded picture data to a storage device. So,
Here, the plurality of picture data includes a plurality of types of picture data having different encoding schemes, and the storage device stores a plurality of frames of decoded picture data, in which the latest one is written by type. Decoding means for decoding a plurality of pieces of picture data included in the video stream one by one while referring to other decoded picture data stored in the frame area. When the picture data is decoded, the picture data is overwritten with the decoded picture data already written in the frame area. When the host device issues a request to secure a work area in the storage device, a predetermined type A part of the picture data before decoding by the decoding means, or a predetermined type of picture data And a region allocating unit for allocating, to the work area, a partial region in a frame region in which a decoded part of the above and overwritten by the overwriting unit is to be written.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, an MPEG stream reproducing apparatus provided with an image decoding apparatus will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of an MPEG stream reproducing apparatus. In the figure, a playback device includes an AV decoder 21 corresponding to an image decoding device, and an SD-RAM.
22 and a host microcomputer 23.

The SD-RAM 22 has an area of 2 Bank × 2048 rows × 256 columns. 512 bytes of these areas
Is called a page area. FIG. 2 is a diagram showing the memory allocation of the SD-RAM 22. In this figure, an encoded stream buffer area 51, a reference image data A frame memory 52,
A reference image data B frame memory 53 and a non-reference image data frame memory 54 are allocated.

The coded stream buffer area 51 is an area for storing an MPEG stream input from the outside without decoding. Here, the MPEG stream is a bit stream including a plurality of elementary streams. The elementary stream includes a video stream and an audio stream, and the data structure of the video stream is shown in FIG.

FIG. 3 is a diagram showing a data structure of a video stream. The video stream has been compressed based on the spatial frequency components of the image. In such an image compression method, several pixels on the screen are used as one compression unit.
The smallest compression unit is called a block. A block is a group of pixels consisting of 8 pixels vertically and 8 pixels horizontally. The next smallest block in the compression unit is the MB (macroblock) shown in the fifth row of FIG. 3, which is composed of 16 pixels vertically by 16 pixels horizontally. During normal encoding,
Using this macroblock as a coding unit, information compression based on temporal correlation between images is performed. At the time of decoding, motion compensation of the inter-frame prediction method is performed using the macro block as a decoding unit.

The first row of the figure shows the structure of a video stream. In this figure, the video stream is group of
It consists of multiple pictures (GOPs). The second row in the figure is G
3 shows the configuration of the OP. GOP is composed of three types of picture data (I, P,
B), and an I picture always exists at the beginning.

The third row in the figure shows the structure of picture data. The picture data includes a picture header and a plurality of slices. The fourth row in the figure shows the configuration of the slice. A slice has a slice header and a plurality of macroblocks. The fifth row in the figure shows the configuration of a macroblock. The macro block has a macro block header and is composed of 16 × 16 pixel data.
Here, the 16 × 16 pixel data has four luminance blocks composed of 8 × 8 luminance data, and a blue difference block (Cb block) composed of 8 × 8 blue difference data
And a red color difference block (Cr block) composed of 8 × 8 vertical red color difference data. Here, the number of pieces of luminance data included in a macroblock is 16 × 16, but the number of chrominance data included in a macroblock is 8 × 8 is that the chrominance data is This is because the resolution of data is not required as much as the data, and the number of color difference data is reduced to reduce the data size of the macroblock.

The picture header, slice header, and macroblock header in the figure include various data such as information on motion compensation. Among them, the picture header in the present embodiment is particularly referred to in this embodiment.
e Coding Type, Slice Start C in slice header
ode, Macroblock Addres in macroblock header
s Increment.

The Picture Coding Type (PCT) indicates whether the picture data including the header is an I picture, a B picture, or a P picture. By referring to the PCT, it can be determined whether the picture data including the header forms a B picture, an I picture, or a P picture. Slice Start Code (SSC) is a 4-byte code indicating the start of a slice, and the last 1 byte
Indicates the vertical position of the slice.

Macroblock Address Increment (MBAI) is
What is represented by the first slice and the other slices are different. That is, the MBAI for the macroblock at the beginning of the slice is such that the macroblock at the beginning of the slice is
The position of one line from the left of the screen in one line is expressed using absolute coordinates on the screen. The MBAI for other macroblocks indicates the number of skips from the previous macroblock. That is, when a plurality of macroblocks are continuous but some of them are missing, the macroblock located immediately after the missing portion
MBAI is used to indicate the number of the missing macroblock.

By referring to the above SSC and MBAI, it is possible to know where the main body of the macroblock following this header is located in the picture data. Reference image data A frame memory 52, reference image data B frame memory 53, non-reference image data frame memory 54
Is composed of an area of 2 Bank × 608 rows × 256 columns, and stores pixel data of one screen obtained by decoding an I picture, a P picture, and a B picture.

The decoded picture data in these frame memories is read out to the line buffer memory 140 in a predetermined order, and is converted into a video signal by the video output unit 108. The “predetermined order” is called a display order, which is different from the order (encoding order) of the picture data in the video stream. Reference image data A
The provision of the frame memory 52, the reference image data B frame memory 53, and the non-reference image data frame memory 54 also means that the encoding order is switched to the display order.

Here, how a plurality of picture data included in the GOP are stored in the reference image data A frame memory 52, the reference image data B frame memory 53, and the non-reference image data frame memory 54 in the frame memory. explain. FIG. 16 is a diagram illustrating the correspondence between a plurality of pieces of picture data included in a GOP and a frame memory. In FIG. 16A, the GOP contains picture data I1, B
2, B3, P4, B5, B6, P7, B8, B9. FIG.
Arrows in (a) and (b) of FIG. 16 indicate the relationship between the referenced picture data and the referenced picture data during decoding. Referring to this arrow,
It can be seen that the picture data I1 and P0 are referenced when decoding the picture data B2, the picture data I1 and P0 are also referenced when decoding the picture data B3, and the picture data I1 is referenced when decoding the picture data P4.

These picture data are stored in a reference image data A frame memory 52, a reference image data B frame memory 53, and a non-reference image data frame memory 54, as shown in FIG. The reference picture data A frame memory 52 stores an I picture I1 and a P picture P7, and the reference picture data B frame memory 53 stores a P picture
It can be seen that P4 and I picture I10 are stored. The B picture B2, B3, B5, B
6, B8 and B9 are stored.

FIG. 16D shows FIGS. 16A and 16B.
Picture data I1, B2, B3, P4, B5, B6, P7, B shown in (b)
FIG. 9 is a diagram showing the order in which 8, B9 are displayed.
Referring to FIG. 16D, the picture data I1 located at the top of the GOP is displayed after the picture data B2 and B3, and the picture data P4 located before the picture data B5 and B6 is the picture data. It is displayed after B5 and B6.

In each of these frame memories, one page area stores a plurality of luminance data for two macroblocks or a set of blue difference data and red difference data for four macroblocks. Address of the page area storing each macroblock (BANK address-RO
W address) is calculated by applying the X and Y coordinates of the macroblock on the display screen to a predetermined arithmetic expression. Storage address of each pixel data (BANK address-RO
W address−COLUMN address) is also calculated by applying the X and Y coordinates of the pixel on the display screen to a predetermined arithmetic expression.

FIG. 4 shows the contents of the frame memory after the ROW address 0000_0000 storing the luminance data as an example of the frame memory, and the ROW address 1 storing the color difference data.
FIG. 5 shows the contents of the frame memory after 000_0000. In FIG. 4, in the page area of bank 0-ROW address 0000_0000, rectangular areas (0,0) to (15,31) with the upper left vertex being (0,0) and the lower right vertex being (15,31) (Corresponding to the hatched area h1 in the example of FIG. 6).
In the page area of bank 1-ROW address 0000_0000, luminance data of rectangular areas (16,0) to (31,31) where the upper left vertex is (16,0) and the lower right vertex is (31,31) In the example of FIG. 6, it corresponds to the hatched area h2).

In FIG. 5, bank 0-ROW address 1000
In the page area of _0000, the upper left vertex is (0,0), the lower right vertex is (7,31), the rectangular area (0,0) to (7,31) blue difference data, and the upper left vertex is (0,0) and the red difference data of the rectangular areas (0,0) to (7,31) with the lower right vertex being (7,31) (corresponding to the hatched area h31 in the example of FIG. 7). ) Is stored, and in the page area of bank 1-ROW address 1000_0000, rectangular areas (8,0) to (15,31) in which the upper left vertex is (8,0) and the lower right vertex is (15,31). 31) stores red difference data and blue difference data (corresponding to a hatched area h32 in the example of FIG. 7).

The host microcomputer 23 performs main control in the stream reproducing device. In the main control, when an MPEG stream is input from outside the device, the host microcomputer 23 instructs the AV decoder 21 to decode the MPEG stream. In addition, when the operator performs an operation to display the OSD, an area securing request signal is output to the AV decoder 21 in an on-demand manner to request the area securing of the OSD data storage area. When the AV decoder 21 secures an area in the SD-RAM 22, a LookUp Table to be written to the secured area
(LUT) and transfer OSD data.

The LUT includes a plurality of entry data.
Each entry data is a mixture of the luminance data to be assigned to one pixel in the OSD, the red difference data to be assigned to the one pixel, the blue difference data to be assigned to the one pixel, and the OSD as a display image at any ratio. And a mixing ratio α indicating whether to output. In each entry data in the LUT, values of luminance data, blue difference data, and red difference data are set so as to express unique colors such as red, blue, green, and yellow, and the respective values are different from each other.

The OSD data includes OSD image data and a command. This command includes the vertical and horizontal sizes when the OSD image data is expanded, coordinate information indicating the coordinates to be overlaid on the screen, the entry address of the LUT, and the start address of the OSD image data. Here, the OSD image data is data in which predetermined bits are assigned to each pixel, and image contents are represented by setting the bit values of the predetermined bits. The bit length of the predetermined bit indicates the number of colors when drawing a pixel, for example,
If the predetermined bit is one bit, each pixel of the OSD image data is colored using two colors.If the predetermined bit is two bits, four colors are used, and if the predetermined bit is four bits, one pixel is used.
Each pixel of the OSD image data is colored using six colors.

The entry address of the LUT is associated with each value of a predetermined bit. When displaying a pixel to which the value is assigned, the luminance data, the blue color difference data, and the red color difference data of any entry data of the LUT are displayed. Indicates whether each pixel is colored using data. For example, in the OSD image data, it is assumed that a character “P” as shown in FIG. 14 is drawn by a sequence of “01”. A pixel whose 1 bit is set to "0" indicates that the pixel is set to the background color.
The pixel for which is set to "1" indicates that the pixel is set to the foreground color. Here, bit “0” is associated with an entry address of entry data having green luminance data, blue difference data, and red difference data, and bit “1” is yellow luminance data, blue difference data, red Assuming that the character "P" shown in FIG. 14 is associated with the entry address of the entry data having the difference data, the character "P" shown on the screen is displayed in yellow with a green background.

The host microcomputer 23 operates as described above.
When the OSD data is transferred, the OSD data is notified to the AV decoder 21 as to whether the OSD data is displayed in a transparent or non-transparent manner. In this embodiment, the opaque OSD data is
An OS where the mixture ratio α in the entry data specified by multiple entry addresses is all set to 100%
D data, and transparent OSD data refers to OSD data in which at least one or more of the mixture ratios α in all entry data specified by a plurality of entry addresses is set to 99% or less.

The AV decoder 21 outputs in this manner.
When the LUT and the OSD data are written into the SD-RAM 22, the head address of the write destination area on the frame memory 54 and the data length of the LUT and the OSD data are output from the AV decoder 21. Hold. Or later,
Until the operator instructs to delete the OSD, the host microcomputer 23 continuously outputs the area reservation request signal.

Conversely, when only the reproduction of the moving image is instructed by the operator and it is not necessary to secure the OSD data storage area, the host microcomputer 23 does not instruct the area reservation.
When the host microcomputer 23 attempts to read the OSD data, the OSD data read instruction, the start address of the OSD data read destination, the data length, and the like are set based on the start address of the empty area output as described above. To the AV decoder 21.

In this embodiment, the host microcomputer 23
Is issued when storing an OSD, an area reservation request signal, in addition, when there is a possibility that not all the memory required for image decoding processing can be reserved due to the memory usage status of other processing in the stream reproduction device, and It may be output when it is necessary to secure a new memory in order to cause the stream reproducing device to execute the additional function.

The AV decoder 21 decodes an MPEG stream input from outside the device and outputs it as a video signal and an audio signal. FIG. 8 is a diagram showing the internal configuration of the AV decoder 21. As shown in FIG. 8, the AV decoder 21 includes an external I / O unit 100, a stream input unit 101, a host buffer memory 102, a bit stream FIFO 10
3. Setup unit 104, code conversion unit 105, Pixel calculation unit 106, motion compensation unit 107, video output unit 108, audio output unit 109, SD-RAM control unit 111, I / O
It comprises a processor 113 and a line buffer memory 140.

When the host microcomputer 23 outputs the OSD data, the external I / O unit 100 writes the OSD data into the host buffer memory 102 once, and then transfers the OSD data to the OSD data area secured on the SD-RAM 22. In addition, in response to a read instruction from the host microcomputer 23, the OSD data is read and output to the host microcomputer 23. When an MPEG stream is extracted from a recording medium or a communication medium and input to the AV decoder 21, the stream input unit 101
The MPEG stream is separated into a video elementary stream (video stream) and an audio elementary stream (audio stream) and written into the host buffer memory 102.

The host buffer memory 102 stores the elementary stream written by the stream input unit 101. The SDRAM control unit 111
MP stored in the host buffer memory 102 so far
The I / O processor 113 transfers the EG stream to the SD-
When the RAM control unit 111 is instructed, the MPEG stream is DMA-transferred to the encoded stream buffer area 51. The undecoded data in the bit stream FIFO 103
SD-RAM control unit 1 according to the remaining amount of MPEG stream
11 is a bit stream FI for the elementary stream.
Read to FO103. Furthermore, SD-RAM control unit 111
Is between the motion compensation unit 107 and the reference image data A frame memory 52 to the non-reference image data frame memory 54.
DMA transfer, DMA transfer from the reference image data A frame memory 52 to the non-reference image data frame memory 54 and the OSD data storage area to the line buffer memory 140,
DMA from LUT to LUT-RAM in OSD data storage area of RAM
And transfer.

The bit stream FIFO 103 takes in the elementary stream stored in the coded stream buffer area 51. Bitstream FIFO10
Reference numeral 3 holds the captured elementary stream in a first-in first-out manner. Of the elementary streams held in this manner, the video stream is output to the code conversion unit 105, and the audio stream is output to the Setup unit 1.
04.

The setup unit 104 includes a bit stream FIFO
If the elementary stream held in the video stream 103 is a video stream, it waits until the header section is expanded by decoding by the code conversion section 105. When the header is decompressed, the header is analyzed to extract a motion vector. Thereafter, while variable code length decoding, inverse quantization, inverse discrete cosine transform, motion compensation, and the like are being performed, decoding processing of the audio stream is performed.

When the macroblock is output, the code conversion unit 105 performs variable code coding on the four luminance blocks Y0, Y1, Y2, and Y3 and the two color difference blocks Cb and Cr included in the macroblock. Perform long decoding. Pixel operation unit 10
Numeral 6 performs inverse quantization and inverse discrete cosine transform on the four luminance blocks subjected to variable code length decoding and the two chrominance blocks.

The motion compensator 107 includes a Pixel calculator 106
When the inverse quantization and the inverse discrete cosine transform are performed, the reference image data corresponding to the luminance block and the chrominance block subjected to these processes is stored in the reference image data A frame memory 52 and the reference image data B frame in the SD-RAM 22. The pixel calculation unit 106 reads the data from the memory 53, performs half-pel processing on each of them, and averages the results.
Motion compensation by adding the output from Thereafter, the result of the motion compensation is written to any one of the reference image data A frame memory 52 to the non-reference image data frame memory 54 of the SD-RAM 22.

The line buffer memory 140 is an SD-RAM 2
It is a buffer for storing two lines of pixel data read from the second reference image data A frame memory 52 to the non-reference image data frame memory 54. The video output unit 108 receives the two lines of pixel data read into the line buffer memory 140, the one line of OSD data, and the entry data from the LUT RAM, and inputs a predetermined enlargement ratio and a mixture of each data. By performing filtering in accordance with the rate α, the signal is converted into a video signal and output to an externally connected display device such as a television receiver.

FIG. 9 is a diagram showing the internal configuration of the video output unit 108. In the figure, the video output unit 108 is provided with two horizontal filters 71 and 7 that perform line-by-line filtering based on the scaling ratio (SRC) of the image to be displayed.
2 (Horizontal Filter), a vertical filter 73 (Vertical Filter) for filtering between lines, and a mixer 7 for mixing pixel data of each line with a background color (BGColor).
4 (Blend BGColor), the OSD data read from the line buffer memory 140, and the LUT stored in the LUT-RAM
OSD generator 75 (OSD Generat
or) and a mixer 76 (Blend OSD) for mixing pixel data and OSD in line units.

Since the mixing ratio α of the transparent OSD data is 99% or less, the mixing ratio for the invisible portion of the output pixel data of the mixer 74 in FIG. 9 is set to 1% or more. Filtering is performed by the unit 76. Since the mixing ratio α of the non-transparent OSD data is 100%, the mixing ratio for the invisible portion of the output pixel data of the mixer 74 is set to 0%, and
6 performs filtering.

The audio output unit 109 is provided for the setup unit 10
4 receives the audio data decoded through the SD-RAM 22-host buffer memory 102, converts it into an audio signal, and outputs it to a speaker device connected to the outside of the device. The I / O processor 113 executes a plurality of tasks by time division multiplexing by assigning a plurality of tasks in the AV decoder to a plurality of threads.

In the present embodiment, these tasks perform decoding load reduction processing of decoding processing, OSD data storage area securing processing, and DMA transfer control between memories. When these processing contents are assigned to the I / O processor 113, the functional configuration of the AV decoder 21 is as shown in FIG. FIG.
The I / O processor 113 functionally comprises an output image management unit 61, an on-demand area reservation unit 62, an OSD data access unit 63, a data reduction control unit 64, and a display line reading unit 67. Is functionally composed of a motion compensation processing unit 65 and a decoded pixel writing unit 66.

The output image management unit 61 calculates the vertical width-horizontal width and coordinates of a part of the decoded picture data stored in the frame memory which is not displayed and cannot be seen by the operator (hereinafter referred to as an invisible part). Information is stored. The invisible part includes a part where the OSD data is overlaid and a part where the display is impossible due to the performance of the display.

For example, it is assumed that a video signal output from the AV decoder 21 is displayed on the display device as shown in FIG. In this case, the former part (OS
The portion where D is overlaid) corresponds to O in FIG.
SD "PLAY" and OSD "12/18 21:36:58" are areas to be overlaid. The latter part (part that cannot be displayed due to the performance of the display) is a range of 16 pixels vertically and 16 pixels horizontally located at the periphery of the picture data in FIG. 11B. The reason why the peripheral portion in the figure is set as the invisible portion is that, in a display device for receiving a television broadcast, color fringing or the like appears at such a peripheral portion, so that the image decoding device may avoid outputting the image. Because there are many.

Since the display coordinates and the height and width are included in the OSD data command, the position of the invisible part appearing by the OSD is determined based on the display coordinates and the OSD height and width included in the command. Specifically, the height-width and coordinate information are calculated. FIG. 12 is a diagram showing an OSD indicating a character string “PLAY”, and FIG. 13 is a diagram showing the OSD “PLAY”.
It is a figure showing an invisible part which appears by overlaying.

As shown in FIG. 12, when the OSD is displayed in (USx, USy) and its length and width are (length_u2, width_u1), the output image management unit 61 uses these as coordinate information of the invisible part. Hold. In this embodiment, the OS
It is assumed that the size of the D data is an integral multiple of 16 × 16 pixels, and the invisible portion is managed with a macroblock as a minimum unit.

The on-demand area reservation section 62 issues an instruction to reserve an OSD data storage area to the host microcomputer 23.
Then, the OSD data storage area is secured. The area secured by the on-demand area securing unit 62 includes an area corresponding to the area where the OSD is overlaid in the frame memory and an area corresponding to the area where display is impossible due to the performance of the display. . By allocating these areas to the OSD data storage area, the on-demand area reservation section 62 can secure the OSD data storage area only with the memory used for the decoding process without performing additional memory.

Here, the portion where the OSD is overlaid will be described in more detail. As mentioned above, those of transparent color,
There is an opaque color, and the host microcomputer 23 notifies which of these OSD data is to be displayed. The on-demand area securing unit 62 manages a free area corresponding to transparent OSD data and a free area corresponding to opaque OSD data by different management methods.

In the portion of the picture data where the opaque OSD is overlaid, both the luminance data and the color difference data do not appear on the display screen. Therefore, the opaque OSD
Are managed as empty areas, both of the area occupied by the luminance data and the area occupied by the color difference data.
Conversely, the on-demand area securing unit 62 manages only the occupied area of the color difference data as a free area for the portion where the transparent OSD is overlaid. Here, the reason why the method for reducing only the color difference data is adopted in the on-demand area securing unit 62 is as follows. That is, the luminance data indicating the outline of the picture data can be clearly recognized by the human eye even if the transparent OSD is overlaid, whereas the color OSD of the transparent color is
Is overlaid, it is difficult to estimate the color. As described above, the importance of the color data is low in a portion where the OSD is to be overlaid, and a large uncomfortable feeling is not felt even if the color of the portion to be overlaid is a single color.

The reason why the OSD data storage area can be secured in such a free area is as follows. That is, the macro block has a large data size and must be stored in a continuous area, whereas the OSD data has a small size and the commands included in the OSD data need not be stored in a continuous area. . That is, it has the property that it may be stored in a distributed manner. Therefore, it is possible to sufficiently store even an empty area that appears intermittently in the frame memory.

It is to be noted that there are sub-images such as subtitles in addition to OSD data to be overlaid on the moving image, and the display position, display content, and display range of the sub-image change every moment. . The area where the position and size change like this is
Not suitable for use as OSD data storage area. Further, in the reference image data A frame memory 52-reference image data B frame memory 53, an area corresponding to the invisible part
Not suitable for OSD data storage area. This is because an I-picture-P-picture always refers to an invisible part when decoding other picture data, and the lack of such data lowers the performance of the decoding process.

Further, it is desirable to perform a process of permitting the erasure of the OSD only during the period in which the I picture-P picture is displayed, and prohibiting the erasure of the OSD in the period in which the B picture is displayed. The on-demand area reservation unit 62 outputs the area reservation request signal from the host microcomputer 23.
Only when requested to secure the OSD data storage area,
A table in which the free area information indicating the start address of the free area, the continuous length of the free area, and the position information of the macroblock corresponding to the invisible part is generated and held. More specifically, the on-demand area securing unit 62
Calculates the position information of the macroblock corresponding to the invisible part based on the coordinate information of the invisible part and the height-width width managed by the output image management unit 61 and registers them in a table. FIG. 15 shows an example of the free area management table in the frame memory. In FIG. 15, this table includes macroblock position information and address information. In the figure, the macroblocks located at (i0, j0) to (i44, j0) are located in the invisible region,
ngth45 × 512 size, from page_addressC0 to Length45 × 5
Twelve sizes are occupied, indicating that these areas are allocated to the OSD data storage area.

In the first embodiment, the size of the invisible portion is set to an integral multiple of the macroblock, so that an OSD data storage area of 1/2 or 1/4 of the page area can be obtained. And Here, the correspondence between the position information of the macro block and the address of the empty area is shown in FIG.
This will be described with reference to FIG. In FIG. 17, one square indicates a macroblock, and a hatched portion indicates an invisible portion. Position information (i, j) indicating a relative position from the upper left of the screen is assigned to these macroblocks.

Then, the macroblock located in the invisible part has position information of (0,0) (1,0) (2,0) (0,1) (1,1) (2,
1). Assuming that the occupied area of the macroblock indicated by these pieces of position information is an unused area and the size of the page area in which the macroblock is stored is 512 bytes, the macroblock corresponds to the macroblock located at (i, j) in the frame memory. The address of the unused area is calculated by the following equation. ADDij = ROW address + COLUMN address ROW address = 512 × i + α × (W / 16) × 512 bytes COLUMN address = β × 512 bytes where α = integer part of j / Pnum β = decimal part of j / Pnum W: Picture data Width (720 pixels) 16: Number of pixels located in one row in macroblock Pnum: Number of macroblocks that can be stored in page area Luminance data Pnum = 2 Chrominance data Pnum = 4 i, j ≧ 0 , 256 bytes can be used from the start address expressed by the above equation, and 128 bytes can be used from the start address expressed by the above equation for the color difference data.

The correspondence between the coordinates of the pixels and the addresses includes those described in JP-A-6-189298 and JP-A-8-294115. Other methods may be applied as long as the above arrangement is uniquely determined. The OSD data access unit 63 has a LUT
When the host microcomputer 23 instructs writing of the OSD data, the LUT and the OSD data are transferred from the outside, and the transferred LUT and the OSD data are managed by the on-demand area securing unit 62. In addition to writing to one of a plurality of free areas, the head address of the written free area and the data length are returned to the host microcomputer 23. As a result, the host microcomputer 23 transfers the transferred LUT and O
It is possible to know in which area of the SD-RAM 22 the SD data has been stored.

When the host microcomputer 23 outputs the OSD data read instruction, the start address of the OSD data read destination, and the data length, the OSD data access unit 63 reads the OSD data stored after the start address. read out.
When the host microcomputer 23 issues an instruction to secure the OSD data storage area, the data reduction control unit 64 determines that the macro block of the picture data of the B picture to be written to the frame memory from now on,
Discard the macro block whose D data storage area is the storage destination. Thereafter, while the OSD data storage area is secured in the frame memory by the on-demand area securing section 62, the OSD data stored in the OSD data storage area is not overwritten so that the OSD data stored in the OSD data storage area is not overwritten. The macro block to be written to the frame memory and the macro block having the OSD data storage area as a storage destination continue to be discarded. There are various methods for discarding macroblocks. Among them, the method that most contributes to the efficiency improvement of the entire image decoding apparatus is a method for discarding macroblocks that have not been decoded yet.

More specifically, the data reduction control unit 64
First refers to the Picture Coding Type in the picture header of the input undecoded MPEG stream picture data to determine whether the input undecoded picture data is an I picture, a P picture, or a B picture. Judge,
When the input undecoded picture data is an I picture or a P picture, the picture data is transferred from the host buffer memory 102 to the encoded stream buffer area 51. If the input undecoded picture data is a B picture, the data reduction control unit 64 checks the SSC included in each slice with the position information of the invisible part, and determines that the slice including the macroblock of the invisible part is not. Determine which one is. For the undecoded slice including the invisible part, the MBAI of each macroblock is collated with the position information of the invisible part to determine which macroblock corresponds to the invisible part. Macroblocks that do not correspond to invisible parts are transferred from the host buffer memory 102 to the coded stream buffer area 51 by the SD-RAM control unit 11.
1 for the undecoded macroblock corresponding to the invisible part,
ADo not transfer. By omitting the DMA transfer for the undecoded macroblock corresponding to the invisible part, the undecoded macroblock corresponding to the invisible part is discarded in the host buffer memory 102.

Here, the invisible portion is a portion on which the OSD is overlaid, and when the OSD is a transparent color, the data reduction control unit 64 determines whether only the color difference data is included in the macroblock corresponding to the invisible portion of the non-reference image data. Is discarded, and all the luminance data is transferred from the host buffer memory 102 to the encoded stream buffer area 51.

For example, when one of the invisible parts is the one shown in FIG. 13, the data reduction control unit 64
MB152, MB153, MB154, MB155 are host buffer memory 10
Wait for input to 2. If entered, Figure 1
8, the data reduction control unit 64 discards these macroblocks MB152, MB153, MB154, and MB155 in the host buffer memory 102, and macroblocks MB150 and MB151 located immediately before the invisible part. The SD-RAM control unit 111 performs DMA transfer so that the macroblocks MB156, MB157, and MB158 located immediately after the invisible part are stored adjacently in the encoded stream buffer area 51. In FIG. 18, the first row shows a macro block MB.
150, MB151, MB152, MB153, MB154, MB155, MB156, MB157, MB15
8 is shown, but in the second row, macroblocks MB150, M
B151, MB156, MB157, MB158 are shown. This is SD-R
This indicates that the coded stream buffer area 51 in the AM 22 stores a macroblock sequence excluding the macroblocks MB152, MB153, MB154, and MB155.

By discarding the undecoded macroblocks as described above, the number of macroblocks to be decoded is reduced, the decoding load on the code conversion unit 105-Pixel operation unit 106 is reduced, and the host buffer associated with the decoding is reduced. Memory 102-SD-RAM22, SD-RAM22-bit stream FI
It is also possible to reduce the transfer amount and the frequency of the DMA transfer between the FO 103, the SD-RAM 22 and the motion compensation unit 107. This reduces the amount of decoding processing in the image decoding device.
The power consumption can be reduced, and the decrease in the number of DMA transfers associated with the decoding process allows other DMA transfers, especially the writing of externally input LUTs and OSD data to the SD-RAM 22 to be written.
High-speed DMA transfer can be realized. Furthermore, electromagnetic wave radiation in the image decoding device can be reduced.

In this embodiment, the function of analyzing the macroblock header and the slice header is provided by the I / O processor 1.
The data reduction control unit 64 provided in the I / O processor 113 and included in the I / O processor 113 detects a macroblock located in an invisible part in the host buffer memory 102. However, the function of analyzing the macroblock header and the slice header as described above is generally provided in the code conversion unit 105, and if it is not desirable to provide such an analysis function in the I / O processor 113, Conversion unit 1
At 05, it is also possible to detect a macroblock located in an invisible part and discard it.

The motion compensation processing section 65 reads out from the reference image data A frame memory 52 and the reference image data B frame memory 53 in the SD-RAM 22, performs half-pel processing on each of them, and averages the results to Pixel.
Motion compensation is performed by adding the output from the operation unit 106. Thereafter, the result of the motion compensation is output to the decoded pixel writing unit 66.

The decoded pixel writing section 66 has a pointer indicating the head address of the page area to be stored, and
The decoded macroblocks output one after another from the motion compensation processing unit 65 are sequentially written in the page area. FIG.
(A) is a figure which shows the brightness data writing by the decoded pixel writing part 66. In the figure, the decoded pixel writing unit 6
Reference numeral 6 denotes the luminance data constituting the two macroblocks MB0 and MB44 arranged in the vertical direction by arrows (0) (1) (2) (3) ... (29) (30)
Write to the frame memory as shown in (31). Similarly, the pixel data constituting the two macro blocks MB1 and MB45 arranged in the vertical direction are indicated by arrows (32) (33) (34) (35) ... (61) (62) (63)
Write to the frame memory as shown in FIG. The writing of pixel data as described above is realized by the decoded pixel writing unit 66 causing the SD-RAM control unit 111 to perform a DMA transfer called a linear addressing mode. Here, the linear addressing mode refers to an address increment method in which addresses are sequentially incremented.

It should be particularly noted that the decoded pixel writing unit 66
Is that, when the macroblock immediately before the invisible part is stored in the page area, a process of skipping the storage destination of the macroblock is performed so that the macroblock immediately after the invisible part adjacent to the macroblock is stored. . Specifically, upon storing a macroblock other than the invisible part, the decoded pixel writing unit 66 increments the pointer, advances the write destination address, and sets the decoded macroblock to the address indicated by the pointer. Write. After that, when the macro block located immediately before the invisible part is output and stored in the page area, the storage destination address is advanced to the head address of the page area where the macro block immediately after the invisible part is to be stored, and a pointer is stored. Restarts the increment of.

The page area P15 in the fourth row of FIG.
0, P151, P152, P153 ... P157 and P158 are macro blocks MB
150, MB151, MB152, MB153,... Are page areas for storing MB157 and MB158, respectively. Here, the undecoded macroblock MB150 shown in the second row is read and decoded, and then written into the page area P150 indicated by the pointer. When the writing is completed, the pointer is incremented, and the write destination address is advanced to the start address of P151. After that, when the macro block MB151 located immediately before the invisible portion is output and the macro block is stored, the storage destination address is advanced to the top address of the page area P156, and the increment of the pointer is restarted. As a result, as shown in the fourth row, the macro blocks MB152, MB153, MB
The areas P152, P153, P154, and P155 in which 154 and MB155 are to be stored are secured as free areas, and can be used as OSD data storage areas.

When writing a macroblock located in the s-th column (s ≧ 0) in the horizontal direction, the offset for the macroblock in the s-th column is the macroblock located from the left edge of the screen to the macroblock. Determined by the number of blocks. Since the size of the page area is 512 bytes, when writing a macroblock located in the s-th column in the horizontal direction, it is sufficient to write the macroblock from the address obtained by adding (512) × sByte to the line head address containing the macroblock .

The display line reading section 67 reads the pixel data stored in the frame memory into the line buffer memory 140 line by line and transfers it to the video output section 108. Therefore, the display line reading unit 67 has a pointer indicating the reading destination, and reads out the pixel data stored in each page area line by line while updating the pointer. FIG. 19B shows the display line reading unit 6.
7 is a diagram showing an example of pixel data reading by No. 7; FIG. In this figure, in order to read the pixel data in the first row of each macro block, the pixel data is indicated by arrows (0) (1) (2) (3).
What is necessary is just to read as shown in 4). Then, to read the second and third rows of each macro block,
(45) (46) (47) ... (89), Arrow (90) (91) (92) ... (134)
What is necessary is just to read as shown in FIG. Such readout of pixel data on a row-by-row basis is referred to as a video-out mode.
This is realized by causing the SD-RAM control unit 111 to perform the A transfer. Here, the video-out mode means that the address is incremented sequentially, 512 bytes in 16 byte units.
Address increase method that adds an offset of

What should be particularly noted in this embodiment is the OSD data area provided in the partial area corresponding to the invisible part in the non-reference image data frame memory 54. Here, the OSD data is opaque (mixing rate of OSD data α
Is 100%), the mixing ratio of the decoded image in the invisible part is set to 0%, and the content of the invisible part is not displayed at all by the filter in the video output unit 108. Therefore, even if the OSD data area exists in the frame memory, and the data inside the OSD data area does not make any sense as an image, the contents of such an OSD data area are regarded as OSD data with a mixing ratio of 0%. Is mixed with
It has no effect on the output video signal and no such content appears on the screen. Therefore, even if one line of data including the contents of the OSD data area is collectively read out to the line buffer memory 140 without being distinguished from the pixel data located before and after the OSD data area, there is no obstruction on the screen. No garbage is displayed.

The display line reading section 67 is provided with a transparent OS
When the D data is to be displayed, the pixel data is read out from the macroblock immediately before the invisible portion at the stage when the pixel data is read out in units of rows in the same manner as the other portions, but the chrominance data is invisible. The OSD data storage area secured in the area corresponding to the part is skipped, and single color or gray scale data is supplied to the line buffer memory 140 instead of the color difference data of the invisible part corresponding to the OSD data area. Specifically, when a line to be read next overlaps an invisible part, pixel data is read up to immediately before the invisible part. Subsequently, the pixel data is read immediately after the invisible part, and for the invisible part, single color or gray scale data assigned to the color difference data corresponding to the invisible part is supplied to the line buffer memory 140.

A specific example of the processing of the display line reading section 67 will be described with reference to FIG. In the page areas P150, P151, P152, P153... Shown in the fourth row of FIG. 18, macroblocks are stored in the page areas P150 and P151 in P157 and P158,
In the page areas P156, P157, P158, macro blocks MB156,
MB157 and MB158 are stored. The page areas P152, P153, P154, and P155 located therebetween are used as OSD data storage areas.

When one line of pixel data is read from these areas, the pixels of the macro blocks MB150 and MB151 are read from the page areas P150 and P151 line by line. afterwards,
The read destination indicated by the pointer is advanced from the page area P151 to the start address of the page area P156, and pixel data indicating the same line after the macroblocks MB156, MB157, MB158 is read line by line. Further, the display line reading unit stores the line buffer memory 1 corresponding to the color difference data of the invisible part.
A single color or gray scale data is supplied to the area within 40.

As a result, as shown in the fifth row of FIG. 18, data of a single color or gray scale is stored in a portion corresponding to an invisible portion in the line buffer memory 140. Thereafter, referring to the flowchart, the data reduction control unit 64, the decoded pixel writing unit 66,
The processing contents of the display line reading unit 67 will be described.

First, the processing contents of the data reduction control unit 64 will be described with reference to the flowchart of FIG. In this flowchart, the data reduction control unit 64 first waits for a picture header to be newly stored in the host buffer memory 102 in step S1. If it is stored, the process proceeds to step S2. In step S2, it is determined whether the newly stored picture header indicates a B picture. If it indicates an I picture or a P picture, in step S3 the host buffer memory 10
2 is transferred to the encoded stream buffer area 51, and the area on the host buffer memory 102 occupied by the transferred picture data is released to a free area. After the release, the process shifts to step S1 to wait for the picture header of the picture data to be stored in the host buffer memory 102. If a part of the stream is newly input from outside after the release of the free area, the input part is written to the free area.

Here, the header of the picture data is detected, and if the header indicates a B picture, the flow shifts to step S13. Step S13 is an entry step of the loop processing, in which a leading slice is selected from among a plurality of slices included in the B picture and is set as a target of the first loop processing. The first loop processing covers the processing from step S4 to step S12, steps S17 to S18, and the slice selected in step S13 is the target of this loop processing.

First, in step S4, the data reduction control unit 64 detects the slice header of the first slice included in the B picture from the host buffer memory 102, and determines in step S5 whether the SSC in the slice header corresponds to an invisible part. I do. If not,
In step S6, the data reduction control unit 64 stores the slice having the header in the host buffer memory 102.
To the coded stream buffer area 51, and releases the area on the host buffer memory 102 occupied by the transferred slice in step S7 to an empty area, and then proceeds to step S14.

If it is determined that the SSC in the slice header corresponds to the invisible part, the flow shifts to step S15. Step S15 is an entry step of the second loop processing, in which the head one of the plurality of macroblocks included in the slice is selected and set as the target of the second loop processing. The second loop processing repeats the processing from step S8 to step S12 and the processing from step S17 to step S18, and the macro block selected in step S15 is subjected to this loop processing.

First, in step S8, a macroblock header is detected, and in step S9, it is determined whether the MBAI in the header of the macroblock corresponds to an invisible part. If not, the macro block having the header is transferred to the coded stream buffer area 51 in step S10, and the area in the host buffer memory 102 occupied by the transferred macro block in step S11 is released to a free area. After doing
Move to step S16.

If it is determined in step S9 that the MBAI in the header of the macroblock corresponds to the invisible part, in step S17, the data reduction control unit 64 determines whether the invisible part corresponds to the transparent OSD. . If not, the process skips step S18 and moves to step S12. If so, the process proceeds directly to step S18. In step S18, the data reduction control unit 64 transfers only the luminance data of the macroblock corresponding to the invisible part to the encoded stream buffer area 51.

In step S12, the macroblock corresponding to the invisible part is stored in the coded stream buffer area 5
After releasing the area occupied by the macroblock to a free area without transferring to step S1, the process proceeds to step S16.
Step S16 is a conditional branch step with step S15 as a branch destination. The conditions for this branch are
This means that there remains a macroblock that has not yet been selected in step S15. If the condition is satisfied, the process proceeds to step S15, where the next-order macroblock in the slice is selected. If the condition is not satisfied, step S14 is performed. Move to

Step S14 is a conditional branching step with step S13 as a branch destination. The condition for this branch is that there remains a slice that has not yet been selected in step S13. If the condition is satisfied, the flow proceeds to step S13 to cause the next slice in the picture data to be selected. Only when the condition is not satisfied, the process proceeds to step S1. By such a conditional branch, all slices included in the B picture determined to be a B picture in step S2 are subjected to the processing in steps S4 to S12 and steps S15, S17, and S18. When the condition is not satisfied and the process proceeds to step S1, the process waits for storing a picture header in step S1.

Next, the processing contents of the decoded pixel writing section 66 will be described with reference to the flowchart of FIG. In step S21, the decoded pixel writing unit 66 determines whether the next macroblock to be written to the reference image data B frame memory 53 is a macroblock located immediately after the invisible part. If not, the macro block is transferred to the page area indicated by the pointer in step S20. Subsequently, in step S22, a predetermined offset is added to the pointer indicating the write destination. Here, the predetermined offset indicates an amount of data to be skipped in order to indicate a page area for storing the next macroblock, and corresponds to the data amount of one macroblock.

If it is determined in step S21 that it is, an offset corresponding to the invisible part is added to the pointer indicating the write destination in step S23. Next, the processing contents of the display line reading section 67 when the OSD data of the transparent color is stored in the OSD data area will be described with reference to the flowchart of FIG. The display line reading unit 67 first stores the line designated by the pointer in step S30, that is, the line buffer memory 14
It is determined whether the line to be read to 0 overlaps the invisible part on which the transparent OSD is to be overlaid. If they do not overlap, the line to be read next to the line buffer memory 140 is transferred to the line buffer memory 140 in step S32, the pointer is set to the next line in step S33, and the process proceeds to step S30. If they overlap, step S30 to step S30
Then, in step S31, among the lines to be read next to the line buffer memory 140, the pixel data rows located before the invisible part and the pixel data rows located after the invisible part are individually stored in the line buffer memory 140. To the line buffer memory 140 instead of the color difference data of the invisible portion corresponding to the OSD data area.

As described above, according to the present embodiment, only when the OSD is requested by the operator, the part invisible to the operator is discarded, so that the work area is secured without deteriorating the image quality. be able to. Therefore, the AV decoder 21 can display the OSD without adding a memory. In addition, when securing the storage area for the OSD data, a part of the undecoded MPEG stream is reduced, so that the load of the decoding process can be reduced, and the speed of the decoding process can be increased, the power consumption can be reduced, and other processes can be performed. It is possible to increase the speed of processing involving DMA transfer, for example, the writing processing of OSD data.

Although the data reduction control unit 64 discards the data before decoding, the code conversion unit 105 and the Pixel operation unit 10
6 may perform decoding of the macroblock, and the decoded macroblock may be discarded. In addition, in the above description, the B-picture is used as an example of the image data to be reduced. However, any image data that is not referred to in the subsequent image decoding processing can be similarly implemented. .

(Second Embodiment) In the first embodiment, an area corresponding to an invisible part is managed as an empty area. However, the second embodiment is an implementation of a method for filling such an empty area. It is a form. Here, as shown in FIG. 23A, a plurality of macro blocks are stored in the frame memory.
(1) (2) (3) ~ (14) (15) (16) are stored, and data A, B, C, D ~ I, J, K, L are stored in the area following the frame memory. It is assumed that it is stored.

Assuming that there is an invisible part in the frame memory as shown in FIG. 10, macro blocks (7), (11), (15),
The macroblocks (8), (12), and (16) located from the third position from the top to the first position from the left are shifted so as to fill the invisible portion. Then, as shown in FIG. 23B, of the area occupied by the data A, B, C, D, E, F to I, J, K, L, the area lower than the area occupied by the data I, J An empty area appears to the left of the area occupied by the data C, D, G, H, K, and L.

Assuming that the number of macroblocks located at the i-th invisible portion from the top and the 0th to j-1th from the left is Nij, the i-th macroblock from the left and the 0th to jth macroblock from the left are stored. The storage address ADDij in the SD-RAM is given by the following equation. ADDij = ROW address + COLUMN address ROW address = 512 × i + α × (W / 16) × 512 byte COLUMN
Address = β × 512 bytes W: Width of picture data (720 pixels) α = {integer part of (j-Nij) / Pnum} β = {decimal part of (j-Nij) / Pnum} i, j ≧ 0 Nij ≦ j Pnum: Number of macroblocks that can be stored in the page area Luminance data Pnum = 2 Color difference data Pnum = 4 A method of calculating a read destination address when displayed will be described. Here, the X coordinate axis is arranged in the rightward direction of the screen, and the Y coordinate axis is arranged in the downward direction of the screen.

When converted into a pixel unit up to the third macroblock located from the top, reading of pixel data up to the 48th row is similar to that of the first embodiment in that the offset of the X coordinate is added to the start address of the frame memory. An address obtained by adding the offset for the Y coordinate is set as the start address. After the third macroblock from the top, as in the first embodiment, when converted into pixel units, the reading of the pixel data in the 48th row and thereafter is equivalent to the pixel data in the 0th to 31st columns and the 32nd column. The read destination address is different from the pixel data located thereafter.

For the pixel data located in the 0th to 31st columns, an address obtained by adding the offset for the X coordinate and the offset for the (Y coordinate−number of unnecessary macroblocks × 16) rows to the frame memory start address. Start address.
For the pixel data located in the 32nd and subsequent columns, an address obtained by adding an offset for the X coordinate and an offset for the Y coordinate to the frame memory start address is set as the start address.

As described above, according to the present embodiment, it is possible to collect free space areas that appear in the frame memory at one place, and secure a larger OSD data storage area. (Third Embodiment) In the first embodiment, the size of an invisible part is set to an integral multiple of a macroblock, and an OSD data storage area of 1/2 or 1/4 that of a page area can be obtained. However, in the third embodiment, the size of the invisible portion is freely determined.

Therefore, in the third embodiment, FIG.
(A), three empty areas as shown in FIGS. 24 (b) and 24 (c) appear on the frame memory. The contents of these free areas are shown below. (1) As shown in FIG. 24A, a macroblock completely covered by an invisible part corresponds to a free area of an integer multiple of 256 bytes or 128 bytes.

(2) As shown in FIG. 24 (b), when there is a line completely covered by an invisible part, 16 bytes
A free area having a data size of × number of lines appears.
(3) As shown in FIG. 24 (c), when there is a row that is partially covered by an invisible part, empty areas corresponding to the covered data appear at intervals.

In the free space of the pattern (3), since the free space of less than 16 bytes appears at intervals, the utility is low. Therefore, in this embodiment, the free space of (1) and (2) is used as the OSD data storage area. . Subsequently, in the third embodiment
The configuration of the AV decoder 21 will be described. In the AV decoder 21 according to the third embodiment, the data reduction control unit 64 and the decoded pixel writing unit 66 are improved as described below.

The data reduction control unit 64 checks the coordinate information of the invisible part, the SSC included in the slice, and the MBAI included in the macroblock in the same procedure as described in the first embodiment, and 24, discard these macroblocks, discriminate macroblocks partially including an invisible part as shown in FIG. 24B, and determine the position information of those macroblocks in the decoded pixel writing unit 6.
Send to 6.

The decoded pixel writing unit 66 writes the decoded macro block in the reference image data area in the same procedure as described in the first embodiment, and writes the invisible part notified from the data reduction control unit 64. Is written by a special process. Hereinafter, FIG.
The special processing will be described with reference to FIGS. 25 (a) and 25 (b). Here, it is assumed that a macroblock partially including an invisible part is shown in FIG. FIG.
In part (d) of FIG. 4A, the invisible part does not partially overlap with the macroblock in the part A, but the invisible part overlaps in a part of the macroblock in the parts B and C.

FIG. 25A and FIG. 25B show FIG.
It is a figure which shows how the B and C parts shown to (d) write in a frame memory. How the portion B shown in FIG. 25A is written to the non-reference image data frame memory 54 will be described. In FIG. 25A, the upper left coordinate of the slice is (SSx, SSy).

First, the SD-RAM control unit 111 is caused to perform DMA transfer so that macroblocks from the slice head (SSx, SSy) to immediately before the invisible part (USx-1, SSy + 15) are written. Subsequently, among the macroblocks overlapping the invisible part, the non-reference image data frame memory extends from the upper left coordinate (USx, SSy) of the first macroblock to the immediately preceding coordinate (USx + 15, USy-1) of the invisible part. Then, the SD-RAM control unit 111 is caused to perform a DMA transfer so as to write the data into the RAM.

The upper left coordinates of the second macroblock (USx +
16, SSy), the coordinates immediately before the invisible part (USx + 15 + 16, USy-1)
Up to the upper left coordinate of the third macro block (USx + 32, SSy)
From the top left coordinates (USx + 16 × (y-1), SSy) of the y-th macroblock to the coordinates immediately before the invisible part (USx + 15 + 32, USy-1) Write up to + 15 + 16 × (y-1), USy-1) to the non-reference image data frame memory 54
Causes the SD-RAM control unit 111 to perform DMA transfer.

Finally, the SD is written so that macroblocks from immediately after the invisible part (UEx + 1, SSy) to the end of the slice are written.
-Have the RAM control unit 111 perform a DMA transfer. Next, how to write the portion C shown in FIG. 25B into the non-reference image data frame memory 54 will be described. FIG.
In 5 (b), the upper left coordinate of the slice is set to (SSx, SSy).

First, the SD-RAM control unit 111 is caused to perform DMA transfer so as to write macroblocks from the slice head (SSx, SSy) to immediately before the invisible part (USx-1, SSy + 15). A macroblock in which the first to middle rows are hidden by an invisible part will be described. From the coordinates immediately after the invisible part (USx, USy + 1), the end coordinates of the macroblock (USx + 1
5, SSy + 15) are written in the reference image data B frame memory 53.

In the second macro block, from the coordinates (USx + 16, USy + 1) immediately after the invisible part to the end coordinates (USx + 15 + 16, SSy + 15) of the macro block, the third macro block From the coordinates (USx + 32, USy + 1) immediately after the invisible part to the end coordinates (USx + 15 + 32, SSy + 15) of the macro block,
From the coordinates (USx + 16 × (y-1), USy + 1) immediately after the invisible part in the y-th macroblock, the end coordinates of the macroblock (USx + 15 + 16 × (y-1), SSy + 15 ) Are written in the reference image data B frame memory 53.

Finally, write the macroblock from immediately after the invisible part (UEx + 1, SSy) to the end of the slice.
Causes the SD-RAM control unit 111 to perform DMA transfer. Next, reading of pixel data in the video-out mode will be described. Since other data is stored in the invisible part, the invisible part cannot be read out like other areas. Therefore, DMA transfer is performed in the video-out mode so as to skip the invisible part.

FIG. 26 is a diagram showing how pixel data is read from the A, B, and C portions shown in FIG. For lines that do not include invisible parts,
Transfers one line, but if it contains an invisible part,
The transfer is performed twice before the invisible part and immediately after the invisible part. Immediately before the invisible part from the slice start (SSx, SSy) (US
The SD-RAM control unit 111 performs a DMA transfer of pixel data up to x-1, USy). Then immediately after the invisible part (UEx +
The SD-RAM control unit 111 performs a DMA transfer of pixel data from (1, USy) to the end of the slice (SEx, USy).

In this embodiment, as in the first embodiment, it is also possible to arrange the empty area at a location (address) corresponding to the invisible part, as in the second embodiment. It is also possible to collect the empty areas by packing the pixel data located in the, and to secure a large continuous empty area. As described above, according to the present embodiment, even an invisible part smaller than the size of a macroblock is used as an OSD data storage area.
More data storage areas can be secured.

Finally, the procedures of the data reduction control unit 64, the motion compensation processing unit 65, and the decoded pixel writing unit 66 shown in the first to third embodiments (flow charts of FIGS. 20, 21 and 22). -Chart procedure) may be realized by a machine language program, and this may be recorded on a recording medium to be distributed and sold. Such a recording medium includes an IC card, an optical disk, a floppy disk and the like, and the machine language program recorded on these is used by being installed in a general-purpose computer. Such a computer implements the functions of the image decoding apparatus described in the embodiment by sequentially executing the installed machine language programs.

[0114]

As described above, according to the image decoding apparatus of the present invention, a plurality of picture data included in a video stream are decoded one by one according to an instruction from a host apparatus, and the decoded picture data is decoded. An image decoding device for writing to a storage device, wherein the plurality of picture data includes a plurality of types of picture data having different encoding schemes, and the storage device includes decoded picture data. Has a plurality of frame areas in which the latest one is written for each type, and refers to other decoded picture data stored in the frame area, and a plurality of picture data included in the video stream are read one by one. Decoding means for decoding, and when the new picture data is decoded, the picture data is already written in the frame area. Overwriting means for overwriting the decoded picture data, and when the host device issues a request to secure a work area in the storage device, it is a part of the picture data of a predetermined type and is not decoded by the decoding means. Or an area allocating means for allocating, to a work area, a partial area in a frame area in which a picture or a decoded part of predetermined type picture data before overwriting by the overwriting means is to be written. Is achieved by

According to the present image decoding apparatus, only when the host device requests the securing of the work area, a part of the picture data is discarded, and the discarded part is moved to the partial area on the frame area where the discarded part is to be stored. Since the area is secured, even if a part of the image is lost, the overall image quality of the picture data does not deteriorate. Therefore, the host device can activate the additional function without adding a memory.

When the decoding data is reduced by reducing a part of the picture data before decoding, unnecessary decoding processing can be omitted, and the decoding processing can be speeded up and power consumption can be reduced. Becomes Here, the host device outputs host data to be written to the storage device together with the output of the reservation request, the picture data includes a plurality of pieces of pixel data for one display screen, and the area allocating unit includes: An area storage unit that stores position information indicating a predetermined part, and decoding of pixel data included in picture data before decoding and positioned at the predetermined part, or
A prohibition section for prohibiting overwriting of pixel data included in the decoded picture data and located at the predetermined site, and a partial area on a frame area to which a predetermined type of picture data is to be written; The apparatus may further include a first writing unit for writing host data output by the host device in an area corresponding to the above predetermined part.

Here, the reservation request includes a request to continuously reserve a work area for a predetermined period, and the prohibiting section prevents the host data written in the partial area by the first writing section from being overwritten. Prohibition of decoding of pixel data included in picture data before decoding and located at the predetermined portion, or prohibition of overwriting of pixel data included in decoded picture data and located at the predetermined portion. May be continued during the predetermined period.

Here, the area storage section may store position information indicating a peripheral portion of the display screen as position information of the predetermined portion. According to this image decoding device, the predetermined portion is a peripheral portion of the picture data, and such a peripheral portion often does not appear on the display screen. Operator need not be conscious.

Here, the work area reservation request is issued when writing on-screen display data to the work area, and the host device outputs the on-screen display data to be stored in the storage device together with the reservation request, and The area storage unit may store position information indicating a part assigned to the on-screen display data on the display screen as position information indicating a predetermined part.

According to this image decoding apparatus, the predetermined part is:
The OSD is a part to be pasted, and such a part is not visible on the display screen. Therefore, even if this part is missing, the operator does not need to be aware of such a missing part.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an MPEG stream reproducing device.

FIG. 2 is a diagram showing memory allocation of an SD-RAM 22.

FIG. 3 is a diagram showing a data structure of a video stream.

FIG. 4 is a diagram showing contents of a page area storing luminance data.

FIG. 5 is a diagram showing the contents of a page area storing color difference data.

FIG. 6 is a diagram showing luminance data stored in one page area.

FIG. 7 is a diagram illustrating color difference data stored in one page area.

FIG. 8 is a diagram showing an internal configuration of the AV decoder 21.

FIG. 9 is a diagram showing an internal configuration of a video output unit 108.

FIG. 10 is a diagram functionally showing an internal configuration of an AV decoder 21.

FIG. 11A is a diagram illustrating an example of a display screen of a display device. FIG. 12B is a diagram illustrating an example of an invisible portion on the display screen illustrated in FIG.

FIG. 12 is a diagram showing a portion to which an OSD is attached.

FIG. 13 is a diagram showing macro blocks hidden by the OSD.

FIG. 14 is an OSD in which a character “P” is drawn using a sequence of “01”
FIG. 3 is a diagram showing image data.

FIG. 15 is a diagram showing a free area management table in a frame memory including macroblock position information and address information.

16A to 16D are diagrams illustrating how a plurality of pieces of picture data are stored in the frame memories 52 to 54.

FIG. 17 is a diagram illustrating an example for calculating an address from position information of a macroblock.

FIG. 18 is a diagram illustrating a process in which macroblocks are discarded.

19A is a diagram showing pixel data writing by a decoded pixel writing unit 66. FIG. FIG. 7B is a diagram illustrating an example of pixel data reading by the display line reading unit 67.

FIG. 20 is a flowchart showing processing contents of a data reduction control unit 64;

FIG. 21 is a flowchart showing processing contents of a decoded pixel writing unit 66;

FIG. 22 is a flowchart showing processing contents of a display line reading section 67;

23A shows a case where a plurality of macroblocks (1) (2) (3) to (14) (15) (16) are stored in a frame memory, and data A, B, C, D〜I, J,
It is a diagram assuming a case where K and L are stored. (B) Of the area occupied by the data A, B, C, D, E, F to I, J, K, L, the data C, D,
FIG. 11 is a diagram illustrating a state in which an empty area appears on the left side of an area occupied by G, H, K, and L.

FIG. 24A is a diagram showing a macro block completely covered by an invisible part. (B) is a diagram showing a macroblock in which a line completely covered by an invisible portion exists. (C) is a diagram showing a macroblock in which a row partially covered by an invisible portion exists. (D) It is explanatory drawing which shows the process of the decoded pixel writing part 66 at the time of writing A part, B part, and C part in a page area.

FIG. 25 (a) is a diagram showing an example of writing pixel data to the B section shown in FIG. 24 (d). FIG. 25 (b) is a diagram illustrating an example of writing pixel data to the C section illustrated in FIG. 24 (d).

FIG. 26 is a diagram showing how pixel data is read from the A, B, and C parts shown in FIG.

FIG. 27 is a diagram illustrating an example of an SD-RAM in which three frame memories are secured.

FIG. 28 shows a non-reference image data frame memory of 2 Bank × 5
FIG. 14 is a diagram illustrating an example of a case where the size is reduced to 07 rows × 256 columns, and an area resulting from the reduction is assigned to an OSD data storage area.

[Explanation of symbols]

 23 Host microcomputer 51 Encoded stream buffer area 54 Non-reference image data frame memory 61 Output image management unit 62 On-demand area reservation unit 63 Data access unit 64 Data reduction control unit 65 Motion compensation processing unit 66 Decoded pixel writing unit 67 Display line reading unit 100 External I / O unit 101 Stream input unit 102 Host buffer memory 105 Code conversion unit 106 Pixel calculation unit 107 Motion compensation unit 108 Video output unit 109 Audio output unit 111 SDRAM control unit 113 I / O processor 140 Line buffer memory

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Eiji Nishida, Inventor 1006 Kazuma Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (30)

[Claims] 1. An image decoding apparatus which decodes a plurality of picture data included in a video stream one by one according to an instruction from a host device and writes the decoded picture data to a storage device. Contains a plurality of types of picture data with different encoding methods, the storage device is decoded picture data,
The image decoding apparatus has a plurality of frame areas for writing the latest ones by type, and the image decoding apparatus includes a plurality of pictures included in the video stream while necessary referring to other decoded picture data stored in the frame areas. Decoding means for decoding data one by one; overwriting means for overwriting the decoded picture data already written in the frame area with new picture data when new picture data is decoded; When a request for securing a work area is issued to the device, a portion of the predetermined type of picture data which is not decoded by the decoding unit, or
An image decoding apparatus, comprising: a region allocating unit that allocates, to a work area, a partial region in a frame region in which a pre-decoded portion of picture data of a predetermined type that has not been overwritten by overwriting means is to be written. . 2. The host device outputs host data to be written to a storage device together with an output of a reservation request. The picture data includes a plurality of pixel data for one display screen. An area storage unit for storing position information indicating a predetermined part on the screen, decoding of pixel data included in the picture data before decoding and located in the predetermined part, or included in the decoded picture data A prohibition unit that prohibits overwriting of pixel data that is located at the predetermined part, and a partial area on a frame area where a predetermined type of picture data is to be written. 2. The image decoding apparatus according to claim 1, further comprising a first writing unit for writing the host data output by the host device. 3. The reservation request includes a request to continuously reserve a work area for a predetermined period, and the prohibiting unit prevents the host data written in the partial area by the first writing unit from being overwritten. Prohibition of decoding of pixel data included in picture data before decoding and located at the predetermined portion, or prohibition of overwriting of pixel data included in decoded picture data and located at the predetermined portion. 3. The image decoding apparatus according to claim 2, wherein the process is continued during the predetermined period. 4. The image decoding apparatus according to claim 3, wherein the area storage unit stores position information indicating a peripheral portion of a display screen as position information of the predetermined part. 5. A request for securing a work area is issued when writing on-screen display data to the work area, and the host device outputs on-screen display data to be stored in a storage device together with the secure request. The image decoding apparatus according to claim 3, wherein the area storage unit stores position information indicating a part assigned to the on-screen display data on a display screen as position information indicating a predetermined part. 6. The on-screen display data includes image data to be overlaid on a screen, a vertical and horizontal size when the data is expanded, and coordinate information indicating coordinates to be overlaid on the screen. Along with the request for securing a work area, the vertical / horizontal size and the coordinate information are notified to an area allocating unit. The image decoding apparatus according to claim 5, further comprising the position information calculation unit that calculates position information indicating the position information and writes the position information to the area storage unit. 7. The on-screen display data includes a transparent color data and an opaque color data. Decoded picture data written in a frame area includes luminance data for one screen, color difference data, The area allocating means further specifies an area occupied by the color difference data, which is a partial area on the frame area, for the transparent on-screen display data, and for the opaque on-screen display data, A region specifying unit for specifying a region occupied by the luminance data and the color difference data, which is a partial region on the frame region, wherein the first writing unit turns on the region specified by the region specifying unit. Screen display data is written, and the image decoding device sequentially writes pixel data rows for the width of the display screen in a frame area. Horizontal reading means for reading from the pixel data, converting means for converting the read pixel data row into a video signal, and reading when the read pixel data row overlaps the transparent on-screen display data. 7. The image decoding apparatus according to claim 6, further comprising: an image data supply unit that supplies predetermined data to the conversion unit instead of the color difference data of the overlapping portion in the pixel data row. 8. The horizontal reading means, when a pixel data row to be read next overlaps with a predetermined portion on the display screen, a pixel data row located ahead of the predetermined portion and / or the predetermined pixel data line. 8. The image decoding apparatus according to claim 7, wherein pixel data rows located behind said part are sequentially read. 9. The undecoded picture data includes a plurality of slice data, and each slice data includes a slice header and pixel data for m rows × n columns (m and n are integers of 1 or more). ), The slice header indicates the arrangement destination of the pixel data, and a buffer memory for sequentially storing a plurality of slice data input from the outside of the apparatus, and the slice data stored in the buffer memory are sequentially transferred to the decoding means. The area allocating unit includes a first detecting unit that detects slice data whose arrangement destination indicated by a slice header matches a predetermined portion on the display screen. An undecoded slice located immediately before a predetermined portion on the display screen and an undecoded slice located immediately after a predetermined portion on the display screen are continuous. The image decoding apparatus according to claim of claims 3, wherein the controlling the transfer means to be transferred from the buffer memory to the decoding means. 10. The slice data has a plurality of macroblocks, and each macroblock includes a macroblock header and s rows × t
(S is an integer of 1 or more that satisfies the relationship of s ≦ m, and t is an integer of 1 or more that satisfies the relationship of t ≦ n), and the macro block header is the arrangement of the pixel data. The area allocating means includes a second detection unit that detects a macroblock in which an arrangement destination indicated in a macroblock header matches a predetermined portion on the display screen; An undecoded macroblock located immediately before a predetermined portion on the display screen and an undecoded macroblock located immediately after a predetermined portion on the display screen are successively transferred from the buffer memory to the decoding means. 10. The image decoding device according to claim 9, wherein the transfer means is controlled in such a manner. 11. A pointer holding unit for holding a storage destination address indicating a storage destination of a newly decoded decoded macroblock, and a pointer holding unit when the decoding of the macroblock is completed. And a second writing unit for writing the newly decoded macroblock in the storage address held by the pointer. When the macroblock is written, the data of the macroblock is stored in the storage address held by the pointer holding unit. The image decoding apparatus according to claim 10, further comprising: an incrementer that adds an offset corresponding to the length. 12. A decoded macroblock located immediately before a predetermined portion on the display screen and a decoded macroblock located immediately after a predetermined portion on the display screen are transferred to decoding means, and the incrementer Is a macro block to be stored next is a macro block located immediately after a predetermined portion on the display screen,
An offset corresponding to a data length of a predetermined portion on the display screen is added to a storage destination address held by a pointer holding unit, and the second writing unit adds the display to the storage destination address to which the offset has been added. 12. The image decoding apparatus according to claim 11, wherein a macroblock located immediately after a predetermined portion on the screen is written. 13. When the macroblock decoded by the decoding unit includes pixel data overlapping with the predetermined portion, the prohibition unit may include a plurality of pixel data located ahead of the predetermined portion and / or 13. The image decoding apparatus according to claim 12, wherein the overwriting means is controlled to sequentially write a plurality of pixel data located behind a predetermined part in a frame area corresponding to a picture type. 14. The predetermined type of picture data includes:
4. The image decoding apparatus according to claim 3, wherein the image data is picture data encoded by an inter-frame bidirectional prediction method. 15. The prohibition unit, when new picture data is decoded by a decoding unit,
The overwriting means is controlled to sequentially write a plurality of pixel data located before the predetermined portion and / or a plurality of pixel data located behind the predetermined portion in a frame area corresponding to a picture type. The image decoding device according to claim 3. 16. A computer-readable recording medium storing an image decoding program for decoding a plurality of picture data included in a video stream one by one according to an instruction from a host device and writing the decoded picture data to a storage device. In the image decoding program, the plurality of pieces of picture data here include a plurality of types of picture data having different encoding schemes, and the storage device is decoded picture data,
The image decoding program has a plurality of frame areas in which the latest one is written for each type, and the image decoding program refers to other decoded picture data stored in the frame area, and a plurality of picture data included in the video stream. A new picture data is decoded, and when new picture data is decoded, an overwrite step of overwriting the picture data with decoded picture data of the same type already written in the frame area, and a host device Issues a request to secure a work area in the storage device, a portion of the predetermined type of picture data before being decoded by the decoding step, or a portion of the predetermined type of decoded picture data of the picture data. The part in the frame area where the one before overwriting by the overwrite step should be written And a region allocating step of allocating a divided region to a work area. 17. The host device outputs host data to be written to a storage device together with an output of a reservation request, the picture data includes a plurality of pixel data for one display screen, and the area allocating step includes decoding Decoding of pixel data included in the previous picture data and located at a predetermined portion on the display screen, or
A prohibition sub-step of prohibiting overwriting of pixel data included in the decoded picture data and located at the predetermined site; and a partial area on a frame area where predetermined-type picture data is to be written. 17. The recording medium according to claim 16, comprising: a first writing sub-step of writing host data output by a host device to a portion corresponding to the predetermined portion on a screen. 18. The securing request includes securing a work area continuously for a predetermined period, and the prohibiting sub-step includes overwriting host data written in a partial area by the first writing sub-step. The pixel data included in the pre-decoded picture data and located at the predetermined portion is prohibited from decoding, or the pixel data included in the decoded picture data and located at the predetermined portion is not 18. The recording medium according to claim 17, wherein overwriting prohibition is continued during the predetermined period. 19. The recording medium according to claim 18, wherein the position information of the predetermined portion is a peripheral portion of a display screen. 20. The work area reservation request is issued when writing on-screen display data to the work area, and the host device outputs on-screen display data to be stored in a storage device together with the reservation request, 19. The recording medium according to claim 18, wherein the predetermined part is a part allocated to the on-screen display data on a display screen. 21. The on-screen display data includes image data to be overlaid on a screen, a vertical and horizontal size when the data is expanded, and coordinate information indicating coordinates to be overlaid on a screen. Along with a request for securing a work area, the vertical and horizontal sizes and the coordinate information are notified to an area allocating step, and the area allocating step is performed based on the vertical and horizontal sizes notified by the host device and the coordinate information. 21. The recording medium according to claim 20, further comprising the position information calculating sub-step of calculating position information indicating the following. 22. The on-screen display data includes transparent color data and opaque color data. Decoded picture data written in a frame area includes luminance data for one screen, chrominance data, and the like. The area assigning step further includes: for transparent on-screen display data, specifying a partial area on the frame area occupied by the color difference data, and for opaque on-screen display data, And an area specifying sub-step for specifying an area occupied by luminance data and chrominance data, which is a partial area on the frame area, wherein the first writing sub-step is specified by the area specifying sub-step. Writing on-screen display data in the area, the image decoding program displays A horizontal reading step for sequentially reading pixel data rows for the width of the surface from the frame area; a converting step for converting the read pixel data rows into a video signal; and an on-screen display data in which the read pixel data rows are transparent. 22. An image data supply sub-step of supplying predetermined data to the conversion step in place of the color difference data of the overlapped portion in the read pixel data row when the image data overlaps with the pixel data row. Recording medium. 23. The horizontal reading step, wherein, when a pixel data row to be read next overlaps with a predetermined portion on the display screen, the pixel data line located ahead of the predetermined portion and / or 23. The recording medium according to claim 22, wherein the pixel data rows located behind the portion are sequentially read. 24. The undecoded picture data includes slice data composed of a plurality of m rows × s columns of pixel data. Each slice data includes a slice header and m rows × n columns of pixel data. (M and n are integers of 1 or more), and the slice header indicates an arrangement destination of the pixel data.The computer that reads the image decoding program sequentially stores a plurality of slice data input from outside the computer. A transfer step of sequentially transferring slice data stored in the buffer memory to a decoding step; and an arrangement destination indicated in a slice header matches a predetermined portion on the display screen. A first detection sub-step of detecting slice data that is present, wherein the prohibition sub-step is performed on the display screen. The transfer step is controlled such that the undecoded slice located immediately before the predetermined part and the undecoded slice located immediately after the predetermined part on the display screen are continuously transferred from the buffer memory to the decoding step. 19. The recording medium according to claim 18, wherein: 25. The slice data has a plurality of macroblocks, and each macroblock includes a macroblock header and s rows × t
(S is an integer of 1 or more that satisfies the relationship of s ≦ m, and t is an integer of 1 or more that satisfies the relationship of t ≦ n), and the macro block header is the arrangement of the pixel data. Wherein the area allocation step includes a second detection sub-step of detecting a macro block whose arrangement destination indicated in the macro block header matches a predetermined portion on the display screen; In the step, an undecoded macroblock located immediately before a predetermined portion on the display screen and an undecoded macroblock located immediately after a predetermined portion on the display screen are sequentially transferred from the buffer memory to the decoding step. 25. The recording medium according to claim 24, wherein a transfer step is controlled so as to be performed. 26. The overwriting step, wherein the computer that reads the image decoding program includes a pointer holding unit that holds a storage destination address indicating a storage destination of a newly decoded macroblock. When the decoding of the macroblock in the decoding step is completed, a second writing sub-step of writing the newly decoded macroblock to the storage destination address held by the pointer holding unit; 26. The recording medium according to claim 25, further comprising an increment step of adding an offset corresponding to the data length of the macroblock to the storage destination address held by the holding unit. 27. An undecoded macroblock located immediately before a predetermined portion on the display screen and an undecoded macroblock located immediately after a predetermined portion on the display screen continuously from the buffer memory to the decoding step. And the incrementing step includes: when a macro block to be stored next is a macro block located immediately after a predetermined portion on the display screen,
Adding an offset corresponding to a data length of a predetermined portion on the display screen to a storage destination address held by a pointer holding unit; and the second writing sub-step includes: adding the offset to the storage destination address to which the offset has been added. 27. The recording medium according to claim 26, wherein a macro block located immediately after a predetermined portion on the display screen is written. 28. The prohibition sub-step includes: when pixel data overlapping with the predetermined portion exists in the macroblock decoded in the decoding step, a plurality of pixel data located ahead of the predetermined portion and / or 28. An overwriting step is controlled to sequentially write a plurality of pixel data located behind the predetermined part in a frame area corresponding to a picture type.
The recording medium according to the above. 29. The predetermined type of picture data includes:
The recording medium according to claim 28, wherein the recording medium is picture data encoded by an inter-frame bidirectional prediction method. 30. The prohibition sub-step includes: when new picture data is decoded in a decoding step, a plurality of pixel data located before the predetermined portion and / or a plurality of pixel data located behind the predetermined portion. 29. The recording medium according to claim 28, wherein the overwriting step is controlled so that data is sequentially written in a frame area corresponding to a picture type.