JPH11219879A - Electron beam exposure method and electron beam exposure apparatus - Google Patents

Abstract

(57) [Problem] To perform both exposure of CP and VSB without deteriorating the resolution due to beam blur, and improve the throughput by sufficiently taking advantage of CP exposure. SOLUTION: In an electron beam exposure method for forming a pattern by using both a CP method and a VSB method, the maximum usable current amount at which the beam blur due to Coulomb repulsion and electron optical system aberration in each exposure becomes equal to or less than an allowable value is determined. Under the conditions of the first step to be determined and the maximum usable current amount determined by the first step, the writing time of the target pattern is calculated using the current density and the beam size as parameters, and the writing time is minimized. A second step of determining a current density and a beam size to be performed; a third step of adjusting electron beam conditions to the current density and the beam size determined by the second step;
Under the electron beam conditions adjusted by the third step, C
And a fourth step of exposing the pattern while switching between P exposure and VSB exposure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lithography technique using an electron beam, and more particularly to a character projection method (CP method) for simultaneously exposing repetitive patterns and a variable shaped beam drawing method (VSB) for writing a pattern with a shaped beam. The present invention relates to an electron beam exposure method for exposing a pattern on a wafer by using the method, and an electron beam exposure apparatus for realizing the method.

[0002]

2. Description of the Related Art In recent years, large-scale semiconductor integrated circuits (LSIs)
Exposure apparatuses using charged particle beams such as electron beams have come to be used in practice with the increase in the density of light. Such an electron beam exposure apparatus is an apparatus that uses a variable shaped beam to deflect and scan a charged particle beam on a sample surface to draw a pattern, and has a pattern generation function for creating a pattern called hardware from software pattern data. Device. However, since the above-described electron beam exposure apparatus draws a pattern by connecting rectangular or triangular shots, generally, as the pattern size decreases, the number of exposure shots per unit area increases and the throughput decreases.

On the other hand, most semiconductor devices which require an ultrafine pattern, such as a 256-Mbit DRAM, are fine, but most of the area to be exposed is a repetition of a basic pattern. The basic unit pattern is 1 regardless of its own complexity.
If it can be generated by shots, it becomes possible to expose such a pattern at a constant throughput regardless of the fineness. Therefore, in addition to an exposure method using a variable shaped beam, a transmission mask having a basic pattern (hereinafter, referred to as a character aperture) is irradiated with an electron beam to generate a basic pattern in one shot and connect the patterns. Exposure apparatuses equipped with a character projection type drawing method that achieves a realistic throughput by repeatedly exposing a pattern by exposure are being put to practical use.

The wafer writing time of the electron beam exposure apparatus is as follows:
Roughly, it is represented by the product of the shot time and the number of shots.
If the resist sensitivity is increased, the current density is increased and the shot time is reduced, and the beam size is increased and the number of shots is reduced, the writing time can be reduced. Several μm as described above
In the character projection (CP) method in which the basic pattern is repeatedly transferred, the number of shots can be reduced, so that the throughput is higher than in the variable shaped beam (VSB) method.

Although the CP method is certainly an attractive method, the amount of current used in one shot is larger than that of the VSB method, so that beam blur due to Coulomb repulsion increases. Even if an attempt is made to form a critical layer pattern of a 256 Mbit DRAM or the like using CP exposure and VSB exposure, the amount of current at which the pattern blur is less than an allowable value is obtained.
And resists currently in practical use (sensitivity: 18 μC /
cm ² ), although excellent resolution is satisfied, the merit (high throughput) of CP exposure hardly appears.

[0006]

As described above, the conventional CP
In the electron beam exposure method for forming a fine pattern on a wafer by using both the method and the VSB method, when the current amount is such that the pattern blur is equal to or less than an allowable value, the excellent resolution of a resist currently in practical use will be reduced. However, there is a problem that the merit (high throughput) of CP exposure hardly appears.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to perform both exposure of CP and VSB without deteriorating resolution due to beam blur. Another object of the present invention is to provide an electron beam exposure method capable of sufficiently improving the throughput by sufficiently taking advantage of CP exposure, and an electron beam exposure apparatus that can be used for the method.

[0008]

(Structure) In order to solve the above-mentioned problem, the present invention employs the following structure. (1) An electron beam exposure method in which a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. A first step of determining a maximum usable current amount at which a beam blur due to electron Coulomb repulsion and electron optical system aberration is equal to or less than an allowable value, and under a condition of the maximum usable current amount determined by the first step, A second step of calculating a writing time of the target pattern by using the current density and the beam size as parameters, determining a current density and a beam size that minimize the writing time, and a current density determined by the second step. 3rd to adjust electron beam condition to beam size
And a fourth step of exposing the pattern while switching between the CP exposure and the VSB exposure under the electron beam conditions adjusted in the third step.

(2) A method in which pattern transfer to the same photosensitive material is performed by both light exposure using a photomask and electron beam exposure, and pattern transfer at least equal to or less than the resolution limit of light exposure is performed by electron beam exposure. With regard to pattern transfer performed by electron beam exposure, a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaping beam. In the beam exposure method, a first step of determining a maximum usable current amount at which a beam blur due to electron Coulomb repulsion and electron optical system aberration in each of the exposures is equal to or less than an allowable value, and a maximum step determined by the first step. When drawing the target pattern using the current density and beam size as parameters under the conditions of the available current Is calculated, and a second step of determining the current density and the beam size to the shortest of the image drawing time,
A third step of adjusting the electron beam conditions to the current density and the beam size determined in the second step, and CP exposure and VS under the electron beam conditions adjusted in the third step.
And a fourth step of exposing the pattern while switching the B exposure.

Here, preferred embodiments of the present invention include the following. (a) In the first step, the beam blur due to the Coulomb repulsion of the electrons and the aberration of the electron optical system includes the beam blur due to the fluctuation of the focal position. (b) In the second step, the relationship between the maximum usable current, the current density, and the beam size is expressed by the following equation.
However, the proportional coefficient k is 0 <k ≦ 1. Maximum usable current = k · (current density) · (beam size) ² (c) The value of the proportional coefficient k can be changed for each device or for each layer constituting the device. (d) The current density and beam size determined in the second step can be changed for each device to be drawn or for each layer constituting the device.

(3) In the electron beam exposure method, a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. A first step of determining the maximum amount of current used in the electron optical system so that the electron coulomb repulsion in the CP exposure and the beam blur due to the electron optical system aberration are equal to or less than an allowable value, and the electron Coulomb repulsion in the VSB exposure And a second step of determining the maximum amount of current used in the electron optical system so that the beam blur caused by the aberration of the electron optical system is equal to or less than an allowable value. And a maximum current amount determined in the third step of separating the data into the VSB exposure pattern data. A fourth step of determining the current density and the maximum beam size so that the processing time when the CP exposure is performed using the CP exposure pattern data created in the third step is minimized; and Under the maximum amount of current determined by the step, the VS generated by the third step
A fifth step of determining the current density and the maximum beam size so that the processing time when VSB exposure is performed using the B exposure pattern data is minimized, and a fourth step for the wafer coated with the photosensitive material. Using the current density and the maximum beam size determined by the third step,
A sixth step of performing CP exposure using the pattern data for exposure, and a VSB exposure performed on the wafer by the third step using the current density and the maximum beam size determined in the fifth step. VS using pattern data
And a seventh step of performing B exposure.

(4) A method in which pattern transfer to the same photosensitive material is performed by both light exposure using a photomask and electron beam exposure, and pattern transfer at least equal to or less than the resolution limit of light exposure is performed by electron beam exposure. In pattern transfer performed by electron beam exposure, a repetitive pattern is transferred using a character mask (CP exposure), and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaping beam. A beam exposure method, a first step of determining a maximum amount of current used in an electron optical system so that Coulomb repulsion of electrons in the CP exposure and beam blur due to electron optical system aberration are equal to or less than an allowable value; The beam blur caused by electron Coulomb repulsion and electron optical system aberration during exposure should be below the allowable value. A second step of determining the maximum amount of current used in the electron optical system, a third step of separating design pattern data to be formed on the wafer into CP exposure pattern data and VSB exposure pattern data, Under the maximum amount of current determined in the first step, the current density and the maximum beam size are adjusted so that the processing time when the CP exposure is performed using the CP exposure pattern data created in the third step is minimized. The processing time when the VSB exposure is performed using the VSB exposure pattern data generated in the third step under the fourth step to be determined and the maximum current amount determined in the second step is minimized. A fifth step of determining the current density and the maximum beam size as described above, and using the current density and the maximum beam size determined in the fourth step for the wafer coated with the photosensitive material. A sixth step of performing CP exposure using the CP exposure pattern data created in the step, and a third step using the current density and the maximum beam size determined in the fifth step for the wafer. And a seventh step of performing VSB exposure using the VSB exposure pattern data created in the step.

Here, preferred embodiments of the present invention include the following. (a) In the first and second steps, the beam blur due to the Coulomb repulsion of the electrons and the aberration of the electron optical system includes the beam blur due to the fluctuation of the focal position. (b) When calculating the writing time in the fourth and fifth steps, the relationship between the maximum usable current amount, the current density, and the beam size is expressed by the following equation. Where the proportional coefficient k is
0 <k ≦ 1. Maximum usable current = k · (current density) · (beam size) ² (c) The value of the proportional coefficient k can be changed for each device or for each layer constituting the device. (d) The beam size determined by the fourth and fifth steps is:
It can be changed for each device for drawing or for each layer constituting the device.

(E) While changing the conditions of the electron beam exposure apparatus between the current density and the maximum beam size determined in the fourth step and the current density and the maximum beam size determined in the fifth step, the CP exposure method And VSB exposure method.

(F) The conditions of the electron beam exposure apparatus are adjusted by setting the current density and the maximum beam size determined in the fourth step, and then the CP exposure is performed, and then the conditions are determined in the fifth step. VSB exposure after the current density and the maximum beam size are set and adjusted. (g) Adjusting the conditions of the electron beam exposure apparatus to the current density and the maximum beam size determined in the fifth step, performing VSB exposure, and then performing the current density determined in the fourth step After setting and adjusting the maximum beam size, CP exposure is performed.

(H) The irradiation doses of the CP exposure and the VSB exposure are the same. (i) The irradiation doses of the CP exposure and the VSB exposure are different. (j) Bake the wafer between each step of CP exposure and VSB exposure. (k) When detecting the position of a mark formed on a wafer and aligning a pattern to be drawn, CP exposure and VS
Use the same mark for B exposure.

(L) A pattern OR operation is performed on the CP exposure pattern and the VSB exposure pattern separated in the third step, and the irradiation amount for correcting the proximity effect using the resultant pattern is calculated. Calculate the control value. (m) calculating a dose control value for correcting the proximity effect using the pattern data before being separated in the third step; (n) CP exposure pattern and VS separated in the third step
A figure OR operation is performed on the pattern for B exposure, and a pattern obtained as a result of black and white reversal processing is used to perform auxiliary exposure to correct the proximity effect. (o) Correcting the proximity effect by performing auxiliary exposure using a pattern obtained by inverting the pattern before being separated in the third step into black and white.

(5) An electron beam exposure apparatus for transferring (CP exposure) a repetitive pattern using a character mask and writing (VSB exposure) using a variable shaped beam for a pattern without repetition or a pattern with few repetitions. Means for determining the maximum usable current amount such that the beam blur due to electron Coulomb repulsion and electron optical system aberration in each of the exposures is equal to or less than an allowable value, and a current density and a current density from the determined maximum usable current amount. Means for calculating the writing time of the device with the beam size as a parameter, means for determining the current density and beam size to minimize the writing time, and means for adjusting the electron beam conditions to the determined current density and beam size. And switching between CP exposure and VSB exposure using the adjusted current density and beam size to form a pattern. Characterized by comprising and means.

(6) A method in which pattern transfer to the same photosensitive material is performed by both light exposure using a photomask and electron beam exposure, and pattern transfer at least equal to or less than the resolution limit of light exposure is performed by electron beam exposure. An electron beam exposure apparatus for transferring (CP exposure) a repetitive pattern using a character mask and drawing (VSB exposure) a pattern without repetition or a pattern with few repetitions using a variable shaped beam. Means for determining the maximum usable current amount such that the beam blur due to electron Coulomb repulsion and electron optical system aberration during exposure is equal to or less than an allowable value; and from the determined maximum usable current amount, a current density and a beam size. Calculate the writing time of the device as a parameter and determine the current density and beam size to minimize the writing time. C using means, and means for adjusting the electron beam conditions on the determined current density and beam size, the current density and the beam size the adjusted that
Means for switching between P exposure and VSB exposure to form a pattern.

(7) In an electron beam exposure apparatus, a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. First current amount determination means for determining the maximum amount of current used in the electron optical system so that the Coulomb repulsion of the electrons in the CP exposure and the beam blur due to the electron optical system aberration are equal to or less than an allowable value; Second current amount determining means for determining the maximum amount of current used in the electron optical system so that the beam blur due to Coulomb repulsion and electron optical system aberration is equal to or less than an allowable value, and design pattern data to be formed on the wafer. Is the pattern data for CP exposure and V
CP exposure is performed using the CP exposure pattern data created by the data separation unit under the maximum current amount determined by the first current amount determination unit and the data separation unit that separates the data into SB exposure pattern data. The first current density / beam size determining means for determining the current density and the maximum beam size so as to minimize the processing time in the case, and the maximum current amount determined by the second current amount determining means A second current density / beam size determining means for determining a current density and a maximum beam size so as to minimize the processing time when VSB exposure is performed using the VSB exposure pattern data created by the separating means; Using the current density and the maximum beam size determined by the first current density / beam size determination means for the wafer coated with
First exposure means for performing CP exposure using the CP exposure pattern data created by the data separation means, and current density and maximum beam determined by the second current density / beam size determination means for the wafer. Using the size,
A second exposure unit for performing VSB exposure using the VSB exposure pattern data created by the data separation unit.

(Operation) According to the present invention, by selecting the current density and the beam size to desired values, the beam blur of both the CP and VSB exposures becomes less than an allowable value within a certain depth of focus. A device pattern in which a CP and a VSB pattern are mixed in a chip can be drawn without deteriorating the resolution and increasing the throughput at that time. Furthermore, in the same-layer mix-and-match lithography method using light and EB, by selecting the current density and beam size in EB to desired values, the CP within a certain depth of focus is obtained.
And VSB, the beam blur of both exposures is equal to or less than the allowable value, so that the same effect as above can be obtained.

Further, by determining the maximum usable current value in consideration of the beam blur due to the focus position fluctuation, it is possible to form a pattern with higher accuracy. Furthermore, by adopting a relational expression between the maximum usable current value and the beam size and current density in consideration of the character aperture ratio that differs for each device or each layer constituting the device, the effective current amount actually irradiated by the character beam Becomes the maximum usable current amount. Therefore, it is possible to increase the throughput to the maximum.

According to the present invention, the current density and the beam size are independently set to desired values in the CP exposure and the VSB exposure, so that the CP and the VSB can be controlled within a constant depth of focus.
Since the beam blur of both exposures is less than the allowable value, EB lithography can be performed on a device pattern in which a CP and a VSB pattern are mixed in a chip without deteriorating the resolution and maximizing the throughput at that time. Furthermore, in the same layer mix-and-match lithography method using light and EB, by setting the current density and beam size in EB to desired values independently in CP exposure and VSB exposure, within a certain depth of focus. Since the beam blur of both the CP and VSB exposures is equal to or less than the allowable value, the same effect as described above can be obtained.

In addition, the writing method is switched according to the pattern to be written, and the apparatus is designed to use the maximum beam size and the current density selected so that the resolution and throughput are maximized for each of the CP method and the VSB method. By switching the setting conditions, it is possible to obtain the maximum throughput in each exposure method.

Further, the EB exposure step is a CP exposure step and a VS exposure step.
B exposure step, before each exposure step, by setting the conditions of the exposure apparatus so that the maximum beam size and current density selected to maximize the resolution and throughput, respectively. Even with an exposure apparatus that requires a relatively long time to change the exposure apparatus conditions, it is possible to realize the maximum throughput in each exposure method.

Further, the EB exposure step is a CP exposure step and a VS exposure step.
Separation into B exposure process and sharing by multiple exposure devices for each exposure process realizes maximum throughput for each exposure method even if the exposure device takes a long time to change drawing conditions It is possible to

Further, by baking the wafer between the CP exposure step and the VSB exposure step, even if a relatively long time lag occurs between each exposure step, the resolution and dimensional accuracy of the pattern deteriorate. Can be prevented. Further, by detecting the same alignment mark in the CP exposure step and the VSB exposure step and correcting the drawing position,
There is no deterioration in pattern connection accuracy between exposure steps.

Also, the proximity effect correction is performed on a pattern obtained by combining the CP exposure pattern and the VSB exposure pattern, that is, a dose correction calculation is performed on the combined pattern, or an auxiliary exposure pattern is generated from the combined pattern. By performing the auxiliary exposure, the proximity effect between the two exposure patterns can be appropriately corrected, and the finishing accuracy of the pattern can be improved.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing an embodiment of the present invention,
The results of examining the relationship between the current and resolution using an electron beam exposure system (Toshiba: EX-8D; character projection / variable shaped beam method, maximum beam size: 1 μm □) are described. .

FIG. 2 shows that the current density is 10 to 40 A / cm ^2.
And the focal position is changed for each current density, and the L / L of the 0.15 μm rule
Draw S pattern (use resist: Shipley SA
L606, film thickness of 500 nm) and how the finished dimensions change. In this figure, the horizontal axis represents the amount of current, and the vertical axis represents the amount of variation from the reference dimension. This figure shows the relationship between the amount of current and the amount of fluctuation when a depth of focus of 5 μm is secured.

The allowable value of the finished dimensional variation of 0.15 μmL / S is defined as, for example, Tmax−Tmin <5 nm (3% of C
D), the maximum current amount in CP exposure (aperture ratio 50%) with a beam size of 1 μm □ is 185 nA, and a current amount larger than this may cause large beam blur and the dimensional variation may not fall within a predetermined value. I understand. On the other hand, since the current amount is smaller in the VSB exposure than in the CP exposure, it can be seen that a pattern with less beam blur and high resolution can be formed. Therefore, in an electron beam exposure apparatus having both the functions of the CP method and the VSB method, the dimensional change due to the beam blur in both exposures is within an allowable value within a certain depth of focus (although the value changes according to the beam size). If you try, you will find that the maximum amount of current that can be used is determined.

As a result, even if an attempt is made to form a pattern of a critical layer of a 256 Mbit DRAM or the like using the CP exposure and the VSB exposure, as described above, the amount of current is such that the pattern blur is equal to or less than an allowable value, and The resist currently in practical use (sensitivity: 8 μC / cm ² ) satisfies the excellent resolution, but hardly shows the merit of the CP exposure.

In order to solve such a problem, the present inventors have proposed the same-layer mix-and-match lithography using light and EB (Japanese Patent Application Nos. 9-46683 and 9-46367).
-46808). FIG. 1 is a diagram showing the basic concept of the same-layer mix-and-match lithography system. In the figure, 1 is a stepper using Deep-UV light or the like, 2 is a character projection type electron beam exposure apparatus, 3
Is a resist coating / developing device, and 4 is a transport mechanism for transporting the resist between the devices 1, 2 and 3 in an atmosphere controlled atmosphere in order to process the resist by an inline process.
Is a wafer as a sample. In this method, all the patterns that can be resolved by light exposure are formed by light exposure, so the pattern area of EB exposure is greatly reduced. Patterns that cannot be resolved by light exposure are formed by EB exposure, so high resolution Therefore, a pattern with high throughput and high resolution can be formed.

However, even in this method, the drawing time of the electron beam exposure apparatus must be greatly reduced in order to improve the throughput as much as possible. For this reason, even in the mix-and-match lithography of the same layer, a character projection (C) in which a basic pattern of several μm is repeatedly transferred for electron beam exposure.
An exposure apparatus having both the P) method and the variable shaped beam (VSB) method must be used.

The relationship between drawing time, beam size, and current density of an electron beam exposure apparatus having both the CP system and the VSB system will be described. The writing time when both the CP method and the VSB method are combined and writing is performed with the same current density is expressed by the following equation.

T = T _CP + T _VSB = (D / J + T _S ) (N _CP + N _VSB ) + T _OH where D: Irradiation amount J: Current density T _S : Shot positioning time N _CP : Number of CP shots N _VSB : VSB Shot number T _OH : Overhead time (main deflection positioning time, stage turning time, wafer load / unload, etc.).

Among these parameters, the one that changes depending on the beam size S is the current density J and the number of shots N.
_CP and Ν _VSB . Therefore, the writing time T is also affected by the beam size S, and it is necessary to optimize the beam size S to obtain the highest throughput.

FIG. 3 is a diagram showing the relationship between the beam size S, the current density J and the beam irradiation time D / J when the current amount is limited. The horizontal axis represents the beam size S, the left vertical axis represents the current density J, and the right vertical axis represents the beam irradiation time D / J. The current density J is inversely proportional to the beam area, that is, inversely proportional to the square of the beam size S. Therefore, as the beam size S increases, the beam irradiation time D / J increases in proportion to the square of the beam size S.

On the other hand, the number of shots decreases as the beam size S increases. However, the decreasing tendency differs between the number of _CP shotsＶCP and the number of VSB shots 減少_VSB . FIG. 4 is a diagram illustrating the beam size dependence of the number of CP shots Ν _CP and the CP writing time T _CP . The CP method is
Since the pattern within the beam size is collectively exposed, the number of CP shots Ν _CP changes in inverse proportion to the beam area, that is, the square of the beam size S. As described above, since the beam irradiation time D / J is proportional to the square of the beam size S, the total beam irradiation time (D / J) · ΝCP of the _{CP method} is constant without depending on the beam size. However, since the beam positioning time is proportional to the number of shots N _CP , the writing time T _CP of the CP method asymptotically decreases as the beam size increases.

On the other hand, the number of shots of the _{VSB methodΝVSB} is
The reduction rate is smaller than that of the CP method and depends on the pattern. FIG. 5 is a diagram illustrating the beam size dependence of the number of VSB shots N _VSB and the VSB drawing time T _VSB . In particular, when the beam size exceeds the pattern design rule, the reduction rate of the number of shots / _VSB is very small. Further, in the case of a wiring pattern, it is inversely proportional to the beam size, but in the case of a contact hole, it is constant without depending on the beam size at all. Therefore, the reduction rate of the number of shots Ν _VSB is lower (S ^k : k ≦ 1) than the increase rate (S ² ) of the beam irradiation time, so that the VSB writing time T _VSB
Will increase as the beam size S increases.

That is, the drawing time T _CP and VSB of the CP method
It can be seen that the drawing time T _{VSB of the} method shows the opposite tendency. Therefore, the ratio between the number of CP shots N _CP and the number of VSB shots N _VSB changes depending on the pattern to be actually drawn. Therefore, it is important to select the beam size S and the current density J so as to obtain the maximum throughput. .

Hereinafter, details of the present invention will be described with reference to the illustrated embodiment. (First Embodiment) FIG. 6 is a flow chart for explaining an electron beam exposure method used in mix-and-match lithography of the same layer according to a first embodiment of the present invention.

FIG. 7 shows an electron beam exposure apparatus used to carry out the electron beam exposure method of the present invention. Electron gun 1
The electron beam 102 emitted from the first condenser lens (CL1) 103 and the second condenser lens (C
In L2) 130, the current density and the Koehler illumination conditions are adjusted to uniformly illuminate the first shaping aperture 104. The image of the first shaping aperture 104 is formed on the second shaping aperture 107 by the projection lens 106. The degree of optical overlap between the two apertures 104 and 107 is controlled by the shaping deflector 105. As a result, it is possible to select a character to be used for the CP exposure and generate a variable shaped beam to be used for the VSB exposure. The shaping deflection mechanism includes a shaping deflector 105, a shaping deflection amplifier 1
16, a pattern data decoder 115 for sending deflection data to the deflection amplifier 116.

The image formed by the optical overlap between the first shaping aperture 104 and the second shaping aperture 107 is
08 and the objective lens 110, the sample 111
Imaged on top. The position of the electron beam 102 on the sample surface is set on the sample 111 by the objective main deflector 109.

The position of the electron beam 102 on the sample 111 is determined by a drawing data generator (not shown) for transmitting position data and a main deflection amplifier 119 for applying a voltage to the main deflector.
Is controlled by The sample 111 is a Faraday cup 113
The sample 111, the Faraday cup 113, or the mark stand 112 for electron beam size measurement can be selected by moving the movable stage 114 together with the mark stand 112 for electron beam size measurement. Heavy metal particles 122 are arranged on the mark table 112.

When the position of the electron beam on the sample 111 is moved, a blanking amplifier 120 and a blanking electrode 1 are placed so that unnecessary portions on the sample 111 are not exposed.
At 08, the electron beam 102 is deflected to cut the electron beam 102 so as not to reach the sample surface. The control of the deflection voltage to the blanking electrode 108 is controlled by a blanking amplifier 120. All of these data are stored in the pattern data memory 117.

The pattern drawing method will be described below with reference to the flowchart of FIG. The above-mentioned FIG. 2 is obtained in advance using the maximum beam size of the electron beam exposure apparatus to be used, and the maximum current amount is determined in advance (step 1). In this embodiment, it is assumed to be 185 nA from the above experimental results.

Next, with respect to the device pattern to be drawn, a pattern to which the character projection (CP) method is applied and a pattern to which the variable shaped beam (VSB) method is applied have respective beam sizes with a constant current amount. Then, it is examined how the writing time changes when writing is performed by changing (and also changing the current density) (step 2). That is, the throughput is estimated.

In this embodiment, the case of the gate layer of the RISC processor will be described as an example. RISC
The character projection method is applied to the cache memory part of the processor (however, the number of characters that can be used is five when the maximum beam size is 5 μm □), and pattern separation for optical / EB mix-and-match for other logic circuit areas After applying the processing, the pattern separated as the EB drawing pattern is drawn by the VSB method. The results are shown in FIGS.

FIG. 8 shows the dependence of the number of shots on the beam size, and FIG. 9 shows the dependence of the writing time per chip on the beam size. The drawing time of the VSB method and the CP method is
This shows the opposite beam size dependence. The reason is as described above. Also, it can be seen that the total drawing time T mainly depends on the VSB drawing time T _VSB . In order to achieve the shortest writing time, the beam size S must be 1 μm square.
You have to set it to At this time, the current density J is 37 A / cm ² .

Based on the result, the column settings (beam size and current density) of the electron beam exposure apparatus are adjusted so that the current conditions are satisfied (step 3). The beam size can be controlled by adjusting the opening size of the first shaping aperture 104 or the opening size of the second shaping aperture 107 to a desired size.

FIG. 10 is a diagram for explaining a method of adjusting the current density. The electron gun 101 of the apparatus shown in FIG.
Is a part of the first forming aperture 104 extracted from FIG. Here, the condenser lens unit is constituted by a two-stage lens of a first condenser lens 103 and a second condenser lens 130 so that the condenser lens unit can realize a zoom lens function. That is, the first condenser lens 103 and the second condenser lens 103 are moved so that the crossover image formed at the position of the blanking aperture 131 does not move.
By adjusting the excitation of the condenser lens 130,
The amount of current passing through the first shaping aperture 104 can be controlled to an arbitrary value.

Finally, the wafer 5 on which the resist has been applied by the resist coating / developing apparatus is carried to the transport mechanism 4, and a device pattern is formed on the entire surface of the wafer 5 while switching between CP and VSB exposure (step 4).

With the electron beam exposure apparatus adjusted as described above, only the EB pattern separated for light and EB is drawn by the same layer mix and match. When exposure is completed,
The wafer 5 is returned to the resist coating / developing device 3 and developed to complete the pattern formation.

FIG. 11 shows that the mix-and-match method of the same layer is applied to the gate layer of the RISC processor, and the beam size and the current density are adjusted based on the present embodiment. This is the result of trial calculation of the throughput as obtained. Total beam current I = 185 nA, dose D = 5 μC / cm ² ,
The shot positioning time T _S = 120 nsec, and 80 chips are drawn on an 8-inch wafer.

The drawing throughput in the case where the drawing is performed by using the optimum beam size of 1 μm □ can be improved by a factor of two or more when the beam size is not adjusted, for example, as compared with the case of using the 5 μm □ beam. I understand. In addition, compared to the case where pattern formation is performed only by electron beam lithography without performing mix-and-match of the same layer, a throughput improvement of about 35% can be obtained. Further, according to such a drawing method, a device pattern in which a CP and a VSB pattern are mixed in a chip can be drawn without deterioration in resolution.

As described above, according to the present embodiment, by selecting the current density and the beam size to desired values, the beam blur of both the CP and VSB exposures becomes less than the allowable value within a certain depth of focus. In addition, a device pattern in which a CP and a VSB pattern are mixed in a chip can be drawn without deteriorating the resolution and maximizing the throughput at that time.

(Second Embodiment) FIG. 12 is a flow chart for explaining an electron beam exposure method used in mix-and-match lithography of the same layer according to a second embodiment of the present invention.

The electron beam exposure apparatus used to carry out the electron beam exposure method of the present invention is the same as that shown in FIG. Hereinafter, the pattern drawing method will be described with reference to the flowchart of FIG. The above-mentioned FIG. 2 is obtained in advance using the maximum beam size of the electron beam exposure apparatus to be used, and the maximum current amount is determined in advance (step 1). In this embodiment, the maximum current amount of the VSB method is 1.25 μA, and the maximum current amount of the CP method is 300 nA (VS
Suppose about 1/4 of the B method).

Next, the device pattern to be drawn is separated into a portion to which the CP method is applied and a portion to which the VSB method is applied (step 2). In this embodiment, the RISC
The case of the gate layer of the processor will be described as an example. CP in the cache memory of the RISC processor
After applying the method (however, the number of characters that can be used is assumed to be 5 in the case of the maximum beam size of 5 μm □), the pattern separation process for the optical / EB mix and match is applied to the other logic circuit areas, and then the EB The pattern separated as the drawing pattern is drawn by the VSB method.

Next, for each of the patterns to be drawn by the CP method and the VSB method, how the drawing time changes when the beam size is changed while the current amount is constant (and the current density is changed together). Check (step 3).
The result of examining the gate layer of the RISC processor is
As shown in FIGS.

FIG. 13 shows the beam size dependence of the number of shots, and FIG. 14 shows the beam size dependence of the writing time per chip. From FIG. 13, it can be seen that the reduction rate of the number of shots when the beam size becomes large is larger in the CP system than in the VSB system. As described above, since the beam size dependency of the number of shots differs between the two exposure methods, the beam size dependency of the writing time also has a different tendency. Further, FIG. 14 shows that the writing time of the CP method tends to decrease as the shot size increases, and that the writing time becomes shorter as the beam size increases.

In general, the maximum beam size that can be realized by an exposure apparatus is restricted by the apparatus configuration. Therefore, the maximum beam size is assumed to be 5 μm square here, and this size is used in CP drawing. At this time, the current density is 2.4 A / cm ² . On the other hand, the writing time of the VSB method tends to be downwardly convex, and the beam size is 2.
The minimum value is obtained at 5 μm square. At this time, the current density is 40
A / cm ² .

Based on the result, the setting of the electron optical system (beam size and current density) of the electron beam exposure apparatus is adjusted according to each drawing method, and the pattern is exposed.
First, the setting (beam size and current density) of the electron optical column of the electron beam exposure apparatus is adjusted so as to satisfy the first exposure condition (step 4). The beam size can be controlled by adjusting the opening size of the first shaping aperture 104 or the opening size of the second shaping aperture 107 to a desired size.

Next, the wafer 5 on which the resist has been applied by the resist coating / developing apparatus is carried to the transfer mechanism 4, and the entire surface of the wafer 5 is exposed to a device pattern by the first exposure method (step 5). After the pattern exposure by the first exposure method is completed, the setting (beam size and current density) of the electron optical column of the electron beam exposure apparatus is adjusted, and the second
(Step 6). Finally, the device pattern is exposed on the entire surface of the wafer 5 by the second exposure method (Step 7).

The electron beam exposure apparatus EX-8D manufactured by Toshiba
In this case, the time required for adjusting the exposure conditions is about 10 minutes. Each time one wafer is exposed, the CP condition and VSB
Exposure can be performed by switching the conditions, but the time for adjustment for each wafer is added, so that the throughput is reduced. Therefore, for example, when drawing processing is performed on 24 sheets as one batch, all the wafers are first exposed under the first exposure condition, and then the exposure apparatus is adjusted to the second exposure condition, and then the second exposure is performed. Exposure under conditions is efficient.

According to the drawing method composed of the above-described procedures, light and light are mixed and matched in the same layer using an electron beam exposure apparatus having a mechanism as shown in FIG. EB carved for EB
The pattern is drawn by the CP method and the VSB method, respectively. When the exposure is completed, the wafer 5 is returned to the resist coating / developing device 3 and is developed to complete the pattern formation.

Next, the mix-and-match method of the same layer is applied to the gate layer of the RISC processor, and the beam size and the current density are adjusted based on the present embodiment.
A description will be given of the results of trial calculation of the throughput when drawing is performed so that the maximum throughput can be obtained by electron beam exposure in each of the VSB method and the CP method. As described above, the total beam current amount is I = 1.25 μm in the VSB method.
A, I = 300 nA in the CP system. Further, a dose amount D = 5 μC / cm ² and a shot positioning time T _S = 12
It is assumed that 80 chips are drawn on an 8-inch wafer at 0 nsec. FIG. 15 shows a throughput calculation result when the drawing method according to the present embodiment is applied. For comparison, VSB / CP under the CP exposure condition which is a conventional drawing method is used.
The throughput for both exposures is also plotted.

The throughput when the logic circuit portion is drawn by the VSB method has a maximum value of 17 sheets / hour when exposed using a beam size of 2.5 μm square. Also,
The throughput when the cache memory unit is drawn by the CP method has a maximum value of 28 sheets / hour when the exposure is performed using the beam size of 5 μm □. At this time, if it takes 10 minutes to adjust the drawing conditions as described above, the remaining 50
The number of wafers for which pattern formation can be completed by performing both VSB exposure and CP exposure per minute is less than nine. On the other hand, VSB / CP under the CP exposure condition which is the conventional drawing method is used.
The drawing throughput in the case of performing both exposures is only 5 sheets / hour even when the exposure is performed using the optimum beam size of 1 μm square.

As described above, according to the present embodiment, by selecting different values for the current density and the beam size for each of the CP and VSB exposures, the CP is obtained within a certain depth of focus.
And the maximum current value at which the beam blur of both exposures VSB and VSB is equal to or less than the allowable value. Therefore, a device pattern in which a CP and a VSB pattern are mixed in a chip can be drawn without deteriorating the resolution and maximizing the throughput at that time.

(Third Embodiment) FIG. 16 is a flowchart for explaining an electron beam exposure method used in mix-and-match lithography of the same layer according to a third embodiment of the present invention. FIG. 17 shows a same-layer mix-and-match lithography system used for carrying out the electron beam exposure method of the present invention. Note that the basic configuration of the electron beam exposure apparatus 2 used here is the same as that shown in FIG.

Next, a pattern drawing method will be described with reference to the flowchart of FIG. Steps 1 to 3 are completely the same as those in the second embodiment, and thus description thereof is omitted here.

In the present embodiment, after step 3, the settings (beam size and current density) of the electron optical system of the plurality of electron beam exposure apparatuses 2 are adjusted according to the respective drawing methods of VSB / CP (step 3). 4). For example, the electron optical system of the electron beam exposure apparatus 2a is set to the VSB condition, and the electron optical system of the electron beam exposure apparatus 2b is set to the CP condition, and is adjusted. The method for adjusting the beam size and the current density is the same as the method described in the second embodiment, and thus will not be described here.

Next, after exposing the device pattern to the entire surface of the wafer 5 coated with the resist by the resist coating / developing device 3 by the excimer exposure device 1, the electron beam exposure device 2
A wafer 5 is selected as a, and a logic circuit pattern is exposed on the entire surface of the wafer 5 by the VSB method (step 5). VSB
After the pattern writing by the method is completed, the wafer 5 is subsequently carried to the electron beam exposure apparatus 2b, and the entire surface of the wafer 5 is exposed to the cache memory pattern by the CP method (Step 6). In step 6, when the pattern drawing by the VSB method is completed, the wafer 5 is returned to the resist coating / developing apparatus 3 once, subjected to PEB (Post Exposure Bake), and then transferred to the electron beam exposure apparatus 2b. Alternatively, the cache memory pattern may be exposed on the entire surface of the wafer 5 by the CP method.

If overlay drawing on the underlying pattern is required, use of the same alignment marks in step 5 and step 6 improves the overlay accuracy. At the time of overlay drawing, an alignment mark formed in advance on the wafer 5 is detected, and the device pattern is drawn based on the mark position as a reference. When drawing using different exposure apparatuses in Steps 5 and 6, if the same alignment mark is detected and a device pattern is drawn based on the mark position, the pattern is drawn in Steps 5 and 6. Can be accurately performed.

The EB pattern separated for light and EB by the same layer mix-and-match by the drawing method composed of the procedures described above is used for the CP system and the VSB system using separate electron beam exposure apparatuses. To draw. When the exposure is completed, the wafer 5 is returned to the resist coating / developing device 3 and is developed to complete the pattern formation.

Next, the mix-and-match method of the same layer is applied to the gate layer of the RISC processor, and the beam size and the current density are adjusted based on the present embodiment.
A description will be given of the results of trial calculation of the throughput when drawing is performed so that the maximum throughput can be obtained by electron beam exposure in each of the VSB method and the CP method. As in the second embodiment described above, the total beam current amount can be calculated as follows:
1.25 μA, I = 300 nA in the CP method. Further, it is assumed that a dose amount D = 5 μC / cm ² , a shot positioning time T _S = 120 nsec, and 80 chips are drawn on an 8-inch wafer. The throughput calculation result when the drawing method according to the present embodiment is applied is as shown in FIG.

The throughput when the logic circuit portion is drawn by the VSB method has a maximum value of 17 sheets / hour when exposed using a beam size of 2.5 μm □. Also,
The throughput when the cache memory unit is drawn by the CP method has a maximum value of 28 sheets / hour when the exposure is performed using the beam size of 5 μm □. Therefore, when two exposure apparatuses are used, the rate is determined by VSB exposure, and the drawing throughput is 17 pages / hour. On the other hand, when both VSB / CP exposure is performed under the CP exposure condition, which is a conventional writing method, the writing throughput per exposure apparatus is 5 even if the exposure is performed using the optimal beam size of 1 μm □. Sheet/
It is only an hour, and it is 10 sheets / hour even if two units are used.

As described above, according to the present embodiment, by selecting different values for the current density and the beam size for each of the CP and VSB exposures, the CP can be set within a certain depth of focus.
And the maximum current value at which the beam blur of both exposures VSB and VSB is equal to or less than the allowable value. Therefore, a device pattern in which a CP and a VSB pattern are mixed in a chip can be drawn without deteriorating the resolution and maximizing the throughput at that time.

In addition, since each type of exposure is performed using an exposure apparatus which has been set to optimal conditions,
The time for setting the conditions of the exposure apparatus can be omitted, and the drawing throughput can be further improved.

The present invention is not limited to the above embodiments. In the embodiment, the electron beam exposure method and system in the mix-and-match of the same layer have been described. However, the present invention is also effective for only the electron beam exposure method or the electron beam exposure system. Further, in the third embodiment, an example in which the drawing in the VSB method is performed first and the drawing in the CP method is performed later has been described, but it goes without saying that there is no problem even if the drawing is performed in the reverse order. In addition, various modifications can be made without departing from the scope of the present invention.

[0082]

As described above in detail, according to the present invention, in an electron beam exposure method for forming a pattern by using a character projection (CP) method and a variable shaped beam (VSB) method, it is possible to reduce the coulomb repulsion of electrons and Determine the maximum amount of current to be used in the electron optical system so that the beam blur due to the electron optical system aberration is below the allowable value, and the current density and beam to minimize the writing time of the target pattern under the condition of the maximum usable current amount After determining the size, adjusting the electron beam conditions to the determined current density and beam size, and exposing the pattern while switching between the CP exposure and the VSB exposure under the electron beam conditions, both the CP and VSB exposures are performed. This method can be performed without deteriorating the resolution due to beam blur, and the advantages of CP exposure can be fully achieved to improve throughput. It can be achieved to become.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic concept of a same-layer mix-and-match lithography system.

FIG. 2 is a diagram showing a change in a finished dimension with respect to a current amount when an L / S pattern of a 0.15 μm rule is drawn by the VSB and CP methods.

FIG. 3 is a diagram showing a relationship between a beam size S, a current density J, and a beam irradiation time D / J when a current amount is limited.

FIG. 4 is a diagram showing the beam size dependence of the number of CP shots Ν _CP and the CP writing time T _CP .

FIG. 5 shows the number of VSB shots N _VSB and VSB drawing time T
FIG. 5 is a diagram showing the beam size dependence of _VSB .

FIG. 6 is a view showing a processing procedure of an electron beam exposure method according to the first embodiment.

FIG. 7 is a view showing an example of an electron beam exposure apparatus used for carrying out the first embodiment.

FIG. 8 is a view showing the relationship between the number of shots and the beam size when the cache memory unit is drawn by the CP method and the logic circuit unit is drawn by the VSB method.

FIG. 9 is a diagram illustrating a relationship between a writing time and a beam size when a cache memory unit is drawn by a CP method and a logic circuit unit is drawn by a VSB method;

FIG. 10 is a diagram showing the principle of a condenser lens system capable of adjusting a current density.

FIG. 11 is a diagram illustrating a relationship between a drawing throughput converted into an 8-inch wafer and a beam size when a cache memory unit is drawn by a CP method and a logic circuit unit is drawn by a VSB method.

FIG. 12 is a view showing a processing procedure of an electron beam exposure method according to the second embodiment.

FIG. 13 is a diagram showing the relationship between the number of shots and the beam size when the cache memory unit is drawn by the CP method and the logic circuit unit is drawn by the VSB method.

FIG. 14 is a diagram showing a relationship between a drawing time per chip and a beam size when a cache memory unit is drawn by a CP method and a logic circuit unit is drawn by a VSB method.

FIG. 15 is a diagram showing a throughput calculation result when a drawing method based on the second embodiment is applied.

FIG. 16 is a view showing a processing procedure of an electron beam exposure method according to the third embodiment.

FIG. 17 is a diagram showing a same-layer mix-and-match lithography system used to carry out the third embodiment;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 excimer exposure machine (optical stepper) 2 CP-EB exposure machine (electron beam exposure apparatus) 3 resist coating / developing apparatus 4 transport mechanism 5 wafer 101 electron gun 102 electron beam 103, 106, 108 , 110, 130 ... Lens 104, 107, 131 ... Aperture 108 ... Blanking electrode 105, 109 ... Deflector 111 ... Sample 112 ... Mark table 113 ... Faraday cup 114 ... Movable stage 115 ... Pattern data decoder 116, 119, 120 ... Amplifier 117: Pattern data memory 121: Crossover 122: Heavy metal particles 123: Detector

Continued on the front page (72) Inventor Waka Sugihara 33, Shinisogo-cho, Isogo-ku, Yokohama-shi, Kanagawa Pref.

Claims (12)

[Claims] 1. An electron beam exposure method wherein a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. A first step of determining a maximum usable current amount at which a beam blur due to electron Coulomb repulsion and electron optical system aberration in exposure is equal to or less than an allowable value, and a condition of the maximum usable current amount determined in the first step. A second step of calculating a writing time of the target pattern by using the current density and the beam size as parameters, determining a current density and a beam size that minimize the writing time, and a current determined by the second step. A third step of adjusting the electron beam conditions to the density and the beam size, and a CP under the electron beam conditions adjusted by the third step. A fourth step of exposing a pattern while switching between exposure and VSB exposure. 2. A method according to claim 1, wherein pattern transfer to the same photosensitive material is performed by both light exposure using a photomask and electron beam exposure, and pattern transfer at least equal to or less than the resolution limit of light exposure is performed by electron beam exposure. Regarding pattern transfer performed by electron beam exposure, repetitive patterns are transferred using a character mask (CP exposure)
An electron beam exposure method in which a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam, wherein beam blur due to electron Coulomb repulsion and electron optical system aberration in each of the exposures is less than an allowable value. A first step of determining a maximum usable current amount to be determined, and calculating a writing time of the target pattern using the current density and the beam size as parameters under the condition of the maximum usable current amount determined in the first step. A second step of determining a current density and a beam size that minimizes the writing time; a third step of adjusting electron beam conditions to the current density and the beam size determined in the second step; And a fourth step of exposing the pattern while switching between the CP exposure and the VSB exposure under the electron beam conditions adjusted in the third step. An electron beam exposure method, comprising: 3. An electron beam exposure method wherein a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. A first step of determining the maximum amount of current used in the electron optical system so that the Coulomb repulsion of the electrons in the exposure and the beam blur due to the electron optical system aberration are equal to or less than an allowable value, and the Coulomb repulsion of the electrons in the VSB exposure and A second step of determining the maximum amount of current to be used in the electron optical system so that the beam blur due to the electron optical system aberration is equal to or less than an allowable value;
A third step of separating the pattern data for P exposure and the pattern data for VSB exposure, and the CP exposure pattern data created in the third step under the maximum amount of current determined in the first step. A fourth step of determining the current density and the maximum beam size such that the processing time when the CP exposure is performed is minimized;
Under the maximum current amount determined in the step, the current density and the maximum beam size are determined so that the processing time when VSB exposure is performed using the VSB exposure pattern data created in the third step is minimized. A fifth step of using the current density and the maximum beam size determined in the fourth step for the wafer coated with the photosensitive material, and using the CP exposure pattern data created in the third step. A sixth step of performing CP exposure by using the current density and the maximum beam size determined in the fifth step for the wafer, and using the VSB exposure pattern data created in the third step. And a seventh step of performing VSB exposure. 4. A method for transferring a pattern to the same photosensitive material by both light exposure using a photomask and electron beam exposure, and transferring at least a pattern less than the resolution limit of light exposure by electron beam exposure. In pattern transfer performed by electron beam exposure, a repetitive pattern is transferred using a character mask (CP exposure), and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaping beam. In the exposure method, a first step of determining a maximum current amount to be used in the electron optical system so that Coulomb repulsion of electrons in the CP exposure and a beam blur due to an electron optical system aberration are equal to or less than an allowable value, and the VSB exposure So that the beam blur due to electron Coulomb repulsion and electron optical system aberration at A second step of determining the maximum amount of current used in the optical system, the design pattern data to be formed on the wafer C
A third step of separating the pattern data for P exposure and the pattern data for VSB exposure, and the CP exposure pattern data created in the third step under the maximum amount of current determined in the first step. A fourth step of determining the current density and the maximum beam size such that the processing time when the CP exposure is performed is minimized;
Under the maximum current amount determined in the step, the current density and the maximum beam size are determined so that the processing time when VSB exposure is performed using the VSB exposure pattern data created in the third step is minimized. A fifth step of using the current density and the maximum beam size determined in the fourth step for the wafer coated with the photosensitive material, and using the CP exposure pattern data created in the third step. A sixth step of performing CP exposure by using the current density and the maximum beam size determined in the fifth step for the wafer, and using the VSB exposure pattern data created in the third step. And a seventh step of performing VSB exposure. 5. In the step of determining the maximum usable current amount at which the beam blur due to electron Coulomb repulsion and electron optical system aberration is equal to or less than an allowable value, a focal position is set for electron Coulomb repulsion and beam blur due to electron optical system aberration. The exposure method according to any one of claims 1 to 4, wherein a beam blur based on the fluctuation of the light amount is included. 6. A relation between the maximum usable current amount, the current density, and the beam size when the drawing time is calculated from the maximum usable current amount using the current density and the beam size as parameters is represented by the following expression. The electron beam exposure method according to claim 1, wherein: Maximum usable current amount = k · (current density) · (beam size) ² However, the proportionality coefficient k is 0 <k ≦ 1, and the value can be changed for each device or for each layer constituting the device. 7. The method according to claim 1, wherein the current density and the beam size determined from the maximum usable current amount can be changed for each device to be drawn or for each layer constituting the device. Or the electron beam exposure method. 8. The condition of the electron beam exposure apparatus is determined by comparing the current density and the maximum beam size determined in the fourth step with the fifth
5. The electron beam exposure method according to claim 3, wherein the exposure is performed by mixing the CP exposure method and the VSB exposure method while switching the current density and the maximum beam size determined in the step. 9. The condition of the electron beam exposure apparatus is set to the current density and the maximum beam size determined in the fourth step, adjusted, CP exposure is performed, and then determined in the fifth step. 5. The electron beam exposure method according to claim 3, wherein VSB exposure is performed after setting and adjusting the current density and the maximum beam size. 10. The VSB exposure is performed after adjusting the conditions of the electron beam exposure apparatus to the current density and the maximum beam size determined in the fifth step, and then performing the VSB exposure, and then determining in the fourth step. 5. The electron beam exposure method according to claim 3, wherein the CP exposure is performed after setting and adjusting the current density and the maximum beam size. 11. CP exposure by using at least two electron beam exposure apparatuses and adjusting at least one electron beam exposure apparatus to the current density and the maximum beam size determined in the fourth step. 5. The method according to claim 3, wherein an electron beam exposure apparatus different from the former is set to the current density and the maximum beam size determined in the fifth step to perform adjustment and perform VSB exposure. Electron beam exposure method. 12. An electron beam exposure apparatus, wherein a repetitive pattern is transferred (CP exposure) using a character mask, and a pattern without repetition or a pattern with few repetitions is drawn (VSB exposure) using a variable shaped beam. Means for determining the maximum usable current amount so that the beam blur due to electron Coulomb repulsion and electron optical system aberration in each of the exposures is equal to or less than an allowable value, and the current density and the beam are determined from the determined maximum usable current amount. Calculating the writing time of the device with the size as a parameter, means for determining the current density and beam size to minimize the writing time, and means for adjusting the electron beam conditions to the determined current density and beam size, A method of forming a pattern by switching between CP exposure and VSB exposure using the adjusted current density and beam size. An electron beam exposure apparatus comprising: a step;