JPH11219099A - Simulator - Google Patents

Abstract

(57) [Summary] [PROBLEMS] When there are a plurality of types of operation cycles of a real machine to be simulated, various delays occur in the output time depending on the input timing, but a simulation that can faithfully simulate this response delay. Perform the operation. SOLUTION: The calculation cycle of the simulation calculation computer is set to the cycle of the greatest common divisor of the calculation cycle of the real machine to be simulated, and each time the timing of the simulation calculation cycle matches the timing of the calculation cycle of the real machine, A simulation operation corresponding to the operation of the real machine at the above-mentioned timing is executed. As shown in (1), (2), and (3) in the figure, devices A, B,
If each of the operation cycles of C is 100, 150, and 200 msec, the simulation operation cycle of (4) is changed to the greatest common divisor of 50 msec.
The calculation A, B, and C corresponding to the devices A, B, and C are performed and output at the timing that matches the calculation cycle of the actual machine.
As a result, a simulation operation close to the response delay of the actual machine can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a simulator for simulating the operation and behavior of a nuclear power plant, a thermal power plant and the like.

[0002]

2. Description of the Related Art For example, FIG.
No. 6 discloses a conventional distributed plant simulator.
Denotes a teaching processing unit, 62 denotes a CRT, and 63 denotes a shared memory network.

Next, the operation will be described. A plurality of model calculation computers 51 to 57 installed are provided with a plurality of models (for example, a simulation model of a nuclear reactor, a simulation model of a steam generator, a turbine (Simulation calculation model, etc.).

In a plant simulator, a plurality of model groups exchange operation results with each other to simulate the behavior of the entire plant. That is, each computer stores data to be shared between the computers in the shared memory, and when the shared data is required, each computer does not store the data in the shared memory in the memory of its own computer, but stores the data in the shared memory network 63. Order through. The display of the simulation result and the operation of the operator such as the instructor are CRT6.
2 and transmitted to each model calculation processing computer via the teaching processing unit 61.

Here, the control / protection / sequence operation simulation function for simulating the operation of the plant control / protection / sequence device is operated collectively on one computer. The protection / sequence was configured to be commonly executed.

[0006]

Since the conventional simulator is configured as described above, the control / protection / sequence simulating operation function is performed irrespective of the operation cycle of the control / protection / sequence device which the simulator is trying to simulate. Is executed at a constant calculation cycle.

However, like a recent nuclear power plant,
When a digital device is applied to the control, protection, and sequence calculations as a real machine, the calculation of each device executes a fixed-cycle process of executing the control, protection, and sequence calculations at a fixed calculation cycle for each device. However, their operation periods are not always the same. In other words, even if the control operation is performed in various operation cycles in the actual machine, the conventional simulator executes the simulation operation in one operation cycle, so that there is a problem that the simulation operation is not accurate. Was.

In some cases, the operation result of a certain digital device is used by another device, and the delay time from inputting a signal from a plant to finally outputting a signal to a plant or a monitoring device is as follows: The input signal is dependent on the timing and is complicated, causing various delay times. Therefore, unlike the conventional plant simulator, all control, protection and sequence calculations are executed at a fixed calculation cycle, and the delay time is not taken into account. There was a problem that simulation was impossible.

The present invention has been made to solve the above-described problem. When there are a plurality of operation cycles in an actual machine, a simulated operation is performed with a delay time approximate to the delay time caused by these operations. The aim is to get a simulator.

[0010]

Means for Solving the Problems (1) A simulator according to the present invention is a simulator for performing various simulations and the like of a plant by a computer for performing plant operation training and behavior evaluation. When there are a plurality of types of operation periods, the operation period of the simulated operation is set to the period of the greatest common divisor of the plurality of operation periods of the real machine, and each time the timing of the simulated operation period matches the timing of the operation period of the real machine, A simulation operation corresponding to the operation of the real machine at the above-mentioned timing is executed.

(2) In the above (1), the result of the simulated operation is output with a predetermined time delay.

(3) Further, in the above (1), a delay time distribution pattern in which the respective delay times of a plurality of operations in the actual machine are associated with the frequencies thereof is obtained in advance, and when the simulation operation is executed, A random number is generated from a random number generator, a delay time corresponding to the random number is derived on the distribution pattern, and a simulation result is output with the delay time delayed.

(4) In the above (1), statistical values such as an intermediate value, a median value, an average value, and a maximum value of each delay time of a plurality of calculations in the actual machine are calculated as the delay time of the simulation result output. It was done.

(5) In the above (3), the distribution pattern uses a normal distribution curve pattern similar to the distribution pattern of the actual machine instead of the distribution pattern obtained from the actual machine.

(6) In the above (1), a normal distribution curve similar to the delay time distribution pattern in which each delay time of a plurality of calculations in the actual machine is associated with the frequency thereof is obtained in advance and simulated. The delay time of the calculation result output is a statistical value such as an intermediate value, a median value, an average value, and a maximum value of the normal distribution curve.

(7) In a distributed simulator in which various simulations of a plant are shared by a plurality of computers in order to perform plant operation training and behavior evaluation, when there are a plurality of types of operation cycles in the simulations, the same The simulation is executed by assigning a computer for each calculation cycle.

(8) In any one of the above items (1) to (7), an emulation function for converting a program used in an actual machine into a simulation calculation program is provided.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a timing chart showing an execution sequence of a digital device of an actual machine and a simulation computer of a simulator. FIG. 2 is a timing chart showing the delay time of the operation of the actual digital device and the execution sequence of the simulation computer of the conventional simulator. The configuration of this embodiment is the same as that of the conventional FIG.

In FIG. 1, (1) shows the execution timing of the digital device A of the real machine to be simulated, (2) shows the execution timing of the digital device B of the real machine to be simulated,
(3) shows the operation execution timing of the digital device C of the actual machine to be simulated, and (4) shows the control / protection / sequence simulation execution timing of the simulator in the first embodiment. Note that the simulation calculation of (4) corresponds to the processing in the sequence calculation processing computer 53 of FIG. 2A is a diagram for explaining the delay time of the operation of the actual digital device, and FIG. 2B shows the operation of the simulation computer of the conventional simulator.

In general, a digital device used for controlling a plant executes a data input / calculation / output process within a certain period of time, and executes a fixed cycle operation for repeatedly executing the same process in the next cycle. doing. The operation cycle of a digital device used in an actual plant is determined by the operation function and the operation amount executed by the device, and the operation period is often different for each device.

In FIG. 2A, when a change 1 and a change 2 are input at the timing shown in FIG. 2 to the digital device which operates in the operation cycle A, the operation for the change 1 is performed within the cycle. The output 2 is performed and the output 1 is sent. Since the change 2 is already being calculated in the first cycle, the calculation is performed in the next calculation cycle, and the output 2 is sent and sent for one or more cycles. Thus, a delay time occurs in the output depending on the input timing. In this case, the calculation cycle A is calculated at a different cycle depending on the calculation target, for example, 100 msec, 150 msec, 200 msec.
It is calculated in a cycle such as msec.

On the other hand, in the computer of the conventional simulator shown in FIG.
In c), inputs A and B corresponding to changes 1 and 2 are calculated within the cycle B, and outputs A and B are transmitted. Therefore, comparing FIG. 2A and FIG. 2B, in FIG.
Takes various values. In (b), there is one operation cycle. In (a), the delay time is one cycle or two cycles depending on the input timing. , And B have the same timing and the output is a delay time within one cycle, so that it is not possible to equate the calculation in the actual machine with the conventional simulation calculation.

To improve this, the first embodiment will be described with reference to FIG. As shown in FIGS. 1 (1), (2), and (3), when there are several types of operation periods of the digital device of the actual machine, as shown in FIG. 1 (4), it corresponds to the greatest common divisor of these operation periods. If the division is performed in units of a period, it is possible to express the operation period of the digital device by an integral multiple of the period unit. Calculation cycle is 100msec, 150m
In the case where there are three digital devices of 200 msec and 200 msec, if the greatest common divisor of 50 msec is considered as the basic period, the operation period of the actual machine can be represented by 2 times, 3 times and 4 times of 50 msec.

The simulation operation shown in FIG. 1 (4) will be described. First, simulation operations A, B and C corresponding to the respective devices A, B, C are performed.
B and C are executed, and the operation result outputs A, B and C are output. Next, when 100 msec, which is the calculation cycle of the device A, elapses, the simulation calculation of A is executed.

Next, 150 m, which is the calculation cycle of the device B,
After the elapse of sec, the simulation operation of B is executed. Next, the operation cycle of the devices C and A is 200 msec.
, The simulation calculation of C and A is executed.

As described above, each time the timing of the operation cycle of the actual device comes, the simulation computer executes the simulation operation in the operation cycle unit of 50 msec which is the greatest common divisor. That is, the simulation operation of the device A is performed once every two cycles,
By executing the simulation operation of the device B once every three periods and the operation of the device C once every four periods, it is possible to reproduce the operation delay of the digital devices to be simulated and the timing dependency between the devices. . Although not shown in FIG.
When 600 msec, which is the least common multiple of 0 msec, 150 msec, and 200 msec, comes, the simulated operation goes through one cycle.

As described above, in this embodiment, the operation cycle of the simulation operation is set to the cycle of the greatest common divisor of the plurality of operation cycles of the actual machine, and the timing of the simulation operation cycle matches the timing of the operation cycle of the actual machine. Each time, a simulation operation corresponding to the operation of the real machine at the above-mentioned matching timing is executed, so that the simulation operation with a delay time close to that of the real machine can be performed.

Embodiment 2 In the first embodiment, the operation cycle (10
The process input / calculation / output processing is executed within the calculation cycle (50 msec) of the control / protection / sequence simulation computer corresponding to the timing of a plurality of calculation cycles such as 0, 150, and 200 msec.

However, the performance of a computer used in an actual digital device is lower than that of a computer for a simulator, and a self-diagnosis function associated with the digital device exists. It is assumed that the time required for the calculation processing (calculation load) is longer than the calculation cycle of the computer for control / protection / sequence simulation of the simulator.

Therefore, as shown in the timing chart of FIG. 3, the output of the simulation operation result of the simulator is output from the operation execution cycle by the number of times corresponding to the operation load, for example, 100 ms.
When simulating a digital device having an operation load of ec, the processing is delayed so as to output the operation result in the next cycle, thereby delaying the operation of the digital device to be simulated in consideration of the operation load and the timing between the digital devices. Dependencies can be reproduced.

FIG. 3 shows a case where the operation of the actual machine shown in FIGS. 1 (1), (2) and (3) is simulated, and the operation cycle of the simulation operation shown in FIG. 1 (4) is 50 msec. Thus, the delay time is set to 100 msec. In operation (1), a simulation operation of inputs A, B, and C is performed,
After 100 msec, it is output as the calculation output (1). Next, in the simulation operation of A of the operation input (2) after 100 msec, the operation output (2) is output similarly after 100 msec. Next, in the simulation operation of B of the operation input (3) after 150 msec, the operation output (2) is output after 100 msec. In the same manner, a simulation operation is performed in the same manner, and output is performed with a delay time of 100 msec.

As described above, according to the present embodiment, a simulation can be performed in a manner close to the actual delay time by transmitting a simulation operation output in consideration of the delay time.

Embodiment 3 Embodiment 3 of the present invention seeks to obtain a simulated operation output in consideration of the response delay distribution. If the control / protection / sequence control system is composed of complex digital devices in which the number of digital devices of the actual device to be simulated is large and the number of operation cycles is large, the response delay of the entire system is It is known that if statistics of the delay time and the frequency are taken, the distribution pattern shows a distribution close to a normal distribution. This embodiment makes use of this distribution pattern.

FIG. 4 shows a functional configuration diagram of a main part of the simulator according to the third embodiment. In the figure, reference numeral 1 denotes a control protection sequence computer, which corresponds to the computer of the sequence calculation process 53 in FIG. Reference numeral 10 denotes the operation process described in the first and second embodiments, reference numeral 2 denotes a buffer memory for storing the operation result of the operation process 10, and reference numeral 5 denotes a delay output circuit for delaying the output of the buffer memory 2 by a delay time (td).

Reference numeral 3 denotes a delay time distribution pattern setting unit which sets a delay time distribution pattern in which the delay times of various calculations of the actual machine to be simulated correspond to the frequencies (frequency) thereof.
A delay time (td) is generated. This distribution pattern generally becomes a pattern closer to a normal distribution as the number of operations increases, that is, as the population increases. A random number generator 4 inputs the generated random number value to the delay time distribution pattern setting device 3 to generate a delay time signal corresponding to the random number value.

FIG. 5A shows a pattern of the delay time distribution set by the delay time distribution pattern setting device 3, and is a distribution curve of the delay time and its frequency (frequency).
In this pattern, the delay time is equally divided into a, b, c... N, and if the area of the entire pattern is 100, 1 to 100 are assigned according to the area of each section. For example, a is assigned up to... N as in a = 1-3 b = 4-10 c = 11-27.

Then, the random number generator 4 sets the random numbers 1 to 100
When the random number is generated, the delay time corresponding to the random number is read from the above-described pattern, and the delay time is input to the delay output circuit 5. FIG. 5B shows a normal distribution curve approximating the pattern of FIG. 5A, which will be described in an embodiment described later.

In such a configuration, the operation process 1
0 is stored in the buffer memory 2, the random number generator 4 generates a random number, the delay time distribution pattern setting unit generates a delay time (td) corresponding to the random number, and the delay output circuit 5 Delays the operation result of the buffer memory 2 by the delay time (td), outputs the result to the distributed shared memory network 6, and transmits it to another model computer.

As described above, in this embodiment, the delay time of the actual machine is statistically processed, and the delay time of the simulated operation closer to the actual machine can be obtained, so that a better simulation can be performed.

Embodiment 4 FIG. FIG. 6 is a functional configuration diagram of a main part of the simulator according to the fourth embodiment, in which a normal distribution function setting unit 3a is provided. In the third embodiment, the delay time distribution pattern of the actual device shown in FIG. 5A is used, but instead of this pattern, the normal distribution function setting unit 3a uses FIG.
A delay time is derived from this pattern and the random number of the random number generator 4 as a normal distribution function pattern similar to the delay time distribution pattern of the actual device in FIG.

Embodiment 5 FIG. FIG. 7 is a functional configuration diagram of a main part of the simulator according to the fifth embodiment.
Is provided. FIG. 8 is a pattern diagram for explaining the median value with the same pattern as the delay time distribution pattern of the actual device in FIG.

As described in the third embodiment, the delay time of the entire system has the distribution pattern of the delay time of the actual machine as shown in FIG. 5A, and the delay time with the highest probability is the median value. (Median). Even if the delay time of the delay output circuit 5 is set to the median delay time of the entire system, the delay time can be corrected with a simple configuration and the same effect as in the third embodiment can be obtained.

If the number of delay times is N, the median value is N / 2 in the order from the shortest delay time to the longest.
This is the value of the item. In FIG. 8, it is represented by "t1".

Further, an average value may be used for the delay time to be corrected instead of the median value. The average value may be a geometric average value in addition to the arithmetic average value. Also, a statistical mode (mode) may be used instead of the median. Thus, various statistical values may be adopted.

In this embodiment, FIG.
The delay time distribution pattern of the actual machine in (a) is obtained, and a, b,
It is not necessary to equally divide the data into c,... n, and various statistics can be calculated immediately from the delay time value of the actual machine.

Embodiment 6 FIG. FIG. 9 is a functional configuration diagram of a main part of the simulator according to the sixth embodiment, in which a maximum delay time setting device 8 is provided.

When a plant simulator is applied for plant operation training or control device verification, training and verification are often performed in consideration of the maximum delay of the simulated digital device. Even if it is set to the maximum delay time of the entire system, the same effect can be obtained for operation training or control device verification.

The maximum delay time is "tmax" shown in the delay time distribution pattern of the actual machine in FIG. Instead of this maximum delay time, the maximum value of the approximate normal distribution function pattern shown in FIG. 5B may be used.

Embodiment 7 FIG. In the above embodiment, the operation cycle of the simulation operation is set to the greatest common divisor, and the delay time is variously corrected. However, in the seventh embodiment, the calculation cycle is not set to the greatest common divisor, and the delay time is corrected. Instead, by assigning computers according to the operation cycle and type of the simulation operation, the simulation operation close to the actual machine is performed.

FIG. 10 is a functional configuration diagram of a main part of the simulator according to the seventh embodiment. In the figure, a control protection sequence computer 1 that performs a simulation operation is separated into a control protection sequence computer 9-1 having an operation period = a and a control protection sequence computer 9-2 having an operation period = b.

As shown in FIG. 10, a computer system for control / protection / sequence simulation operation is reduced to a plurality of inexpensive computers 9-1 and 9- by utilizing a simulation operation method using a plurality of computers which is a feature of the distributed simulator. Composed of two,
A simulation operation of digital devices having the same operation cycle among the digital devices to be simulated is executed on the same computer. By doing so, the first embodiment can be performed without performing complicated execution control.
The same effect can be obtained.

Embodiment 8 FIG. The seventh embodiment is an example in which a computer is set in units of operation cycles of a digital device to be simulated. As shown in FIG. 11, the operation of other plant models constituting a distributed simulator, for example, the operation of a computer for calculating a reactor model When the period is the same as the operation period of the simulation target digital device (operation period = a), the simulation of the digital device can be performed together with the plant model on another plant model computer, and the number of computers is reduced. Thus, the same effect as in the first embodiment can be obtained.

Embodiment 9 FIG. FIG. 12 shows the ninth embodiment.
FIG. 3 is a functional configuration diagram of main parts of the simulator of FIG. In many cases, the programming language used between the plant simulator and the actual digital device is different, and it was necessary to create a new model program when manufacturing the simulator. By providing the function of converting to a real machine, the emulation function of the actual machine control program becomes possible on the simulator, and the production cost can be reduced.

The technology of the function of converting the control program into the simulator language has already been established, and this technology will be utilized here.

Embodiment 10 FIG. In the above embodiment, the case where the simulation of the control / protection / sequence model is performed has been described. However, the present invention can be applied to all models such as other reactor models and turbine models. Although the simulator has been described as a plant simulator, the present invention can also be applied to a simulator that simulates devices, systems, living bodies, and the like other than plants.

In the above embodiment, the distributed network is composed of a plurality of computers connected to the network. However, even if the simulator is a single computer which is not connected to the network, the real machine may have a plurality of computers. When performing a simulated operation with respect to a case having an operation period, the techniques of Embodiments 1 to 6 and 9 can be applied.

[0057]

(1) As described above, according to the present invention,
When there are a plurality of types of operation cycles of the real machine to be simulated, the simulation cycle is executed by using the calculation cycle of the simulation computer as the greatest common divisor of the calculation cycle of the real machine to be simulated.
It is possible to simulate with a response delay close to the response delay of the actual machine.

(2) By delaying the output of the simulated calculation result by a predetermined time in consideration of the actual calculation processing time, it is possible to simulate the delay of the actual machine in consideration of the actual calculation processing amount.

(3) Further, when there are a plurality of types of calculation of the real machine to be simulated, the delay time is derived from the distribution pattern of the delay time and the frequency of the calculation of the real machine to be simulated, and a random number. So that the simulation result is delayed,
Even when simulating a complicated system configuration, the response delay of the system can be easily simulated.

(4) Further, when there are a plurality of calculation types of the real machine to be simulated, the statistic value such as the median of the delay time of the real machine to be simulated is used as the delay time of the simulated calculation. The response delay of the system can be simulated.

(5) In the above (3), the distribution pattern used is a normal distribution curve pattern similar to the distribution pattern of the actual machine instead of the distribution pattern obtained from the actual machine. The delay can be simulated.

(6) Since a normal distribution curve similar to the delay time distribution pattern in the actual machine is obtained in advance, and the delay time of the simulated operation is defined as a statistical value such as an intermediate value of the normal distribution curve, The response delay of the system can be easily simulated.

(7) In a distributed simulator, when a simulated operation is performed at a plurality of operation periods, a computer is allocated for each operation period and the simulated operation is performed, so that the response delay of the system can be simulated more easily. It becomes possible.

(8) Further, since the program of the real machine to be simulated is converted into a program that operates on the simulator, the production cost of the simulator program can be reduced.

[Brief description of the drawings]

FIG. 1 is a timing chart of a calculation operation of a simulator according to Embodiment 1 of the present invention.

FIG. 2 is a timing chart illustrating a delay state of an operation of the simulator according to the first embodiment of the present invention.

FIG. 3 is a timing chart of a calculation operation of the simulator according to Embodiment 2 of the present invention;

FIG. 4 is a functional configuration diagram of a main part of a simulator according to Embodiment 3 of the present invention.

FIG. 5 is a diagram showing a pattern of a delay time distribution according to a third embodiment of the present invention.

FIG. 6 is a functional configuration diagram of a main part of a simulator according to a fourth embodiment of the present invention.

FIG. 7 is a functional configuration diagram of a main part of a simulator according to a fifth embodiment of the present invention.

FIG. 8 is a diagram showing a pattern of a delay time distribution according to a fifth embodiment of the present invention.

FIG. 9 is a functional configuration diagram of a main part of a simulator according to a sixth embodiment of the present invention.

FIG. 10 is a functional configuration diagram of a main part of a simulator according to a seventh embodiment of the present invention.

FIG. 11 is a functional configuration diagram of a main part of a simulator according to an eighth embodiment of the present invention.

FIG. 12 is a functional configuration diagram of a main part of a simulator according to a ninth embodiment of the present invention.

FIG. 13 is a functional configuration diagram showing a conventional distributed simulator.

[Explanation of symbols]

Reference Signs List 1 control protection sequence calculator 2 buffer memory 3 delay time distribution pattern setting device 3a normal distribution function setting device 4 random number generator 5 delay output circuit 6 distributed shared memory network 7 normal distribution function setting device 8 maximum delay time setting device 9-1, 9-2 Control protection sequence computer 10 Operation process

Claims (8)

[Claims] In a simulator for performing various simulations and the like of a plant by a computer in order to perform operation training and behavior evaluation of a plant, when there are a plurality of types of calculation cycles in a real machine to be simulated, the calculation cycle of the simulation is set to A cycle of the greatest common denominator of the plurality of operation cycles of the real machine, and a simulated operation corresponding to the operation of the real machine at the matched timing is performed every time the timing of the simulated operation cycle matches the timing of the operation cycle of the real machine. A simulator characterized by being executed. 2. The simulator according to claim 1, wherein
A simulator which outputs a result of a simulated operation with a delay of a predetermined time. 3. The simulator according to claim 1, wherein
In advance, a distribution pattern of delay time corresponding to each delay time of a plurality of operations and its frequency in a real machine is obtained in advance, and at the time of execution of the simulation operation, a random number is generated from a random number generator. A simulator that derives a delay time corresponding to the random number and outputs a simulation result with the delay time. 4. The simulator according to claim 1, wherein
The median value, median value,
A simulator characterized in that statistic values such as an average value and a maximum value are used as a delay time of a simulation operation result output. 5. The simulator according to claim 3, wherein
A simulator characterized by using a normal distribution curve pattern similar to the distribution pattern of the actual machine instead of the distribution pattern obtained from the actual machine. 6. The simulator according to claim 1, wherein
A normal distribution curve similar to a delay time distribution pattern in which each of the delay times of a plurality of calculations in the actual machine is associated with the frequency thereof is determined in advance, and the delay time of the simulated calculation result output is calculated in the middle of the normal distribution curve. A simulator characterized by statistical values such as values, medians, averages, and maximums. 7. In a distributed simulator in which various simulations of a plant are shared by a plurality of computers in order to perform plant operation training and behavior evaluation, when there are a plurality of calculation cycles in the simulation, the same calculation cycle is used. A simulator wherein a simulation is performed by separately assigning a computer. 8. The simulator according to claim 1, further comprising an emulation function for converting a program used in an actual machine into a simulation calculation program.