JPH11202828A - Electron source driving device and method and image forming apparatus - Google Patents

Abstract

(57) [Problem] To make it possible to more reliably prevent ringing generated at the time of rising of a modulation signal, and to prevent an overvoltage from being applied to an electron-emitting device. A display panel has an electron source in which cold cathode devices that emit electrons in an amount corresponding to a voltage application time are arranged in a matrix. The S / P conversion circuit 106, the latch circuit 107, and the pulse width modulation circuit 108 apply a modulation signal having a time width corresponding to an image signal to each cold cathode element for one row of the cold cathode elements for one row. Is generated synchronously. The modulation signal delay circuit 109 and the delay control circuit 111
The rising timings of the modulation signals having the same time width among the generated modulation signals are dispersed in a predetermined time width. Then, using the modulation signal obtained by the modulation signal voltage driving circuit 110 and the scanning signal generation circuit 104,
The display panel 112 is driven.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an electron source driving device comprising a cold cathode element, a method thereof, and an image forming apparatus.

[0002]

2. Description of the Related Art Conventionally, two types of electron emitting devices, a hot cathode device and a cold cathode device, are known. Among these, among the cold cathode devices, for example, a surface conduction type emission device, a field emission type device (hereinafter referred to as FE type), a metal / insulating layer / metal type emission device (hereinafter referred to as MIM type), and the like are known. I have.

[0003] As a surface conduction type emission element, for example,
M. I. Elinson, Radio E-ng. El
electron Phys. , 10, 1290, (196
5) and other examples described later are known.

The surface conduction electron-emitting device utilizes a phenomenon in which an electron is emitted when a current flows in a small-area thin film formed on a substrate in parallel with the film surface. As this surface conduction type emission element, Sn described by Elinson et al.
In addition to those using an O2 thin film, those using an Au thin film [G. Dittmer: "Thin Solid Fi
lms ", 9,317 (1972)] and In2O3 /
According to SnO2 thin film [M. Hartwell an
d C.I. G. FIG. Fonstad: "IEEE Tran
s. ED Conf. , 519 (1975)] and those using carbon thin films [Hisashi Araki et al .: Vacuum, Vol. 26,
No. 1, 22 (1983)].

[0005] As a typical example of the element structure of these surface conduction electron-emitting devices, FIG. Hartwel
1 shows a plan view of an element according to the present invention. In FIG.
Reference numeral 1 denotes a substrate, and reference numeral 3004 denotes a conductive thin film made of a metal oxide formed by sputtering. The conductive thin film 3004 is formed in an H-shaped planar shape as shown. An electron emission portion 3005 is formed by performing an energization process called energization forming described later on the conductive thin film 3004. The interval L in the figure is 0.5 to 1 [mm], and W is
It is set at 0.1 [mm]. In addition, for convenience of illustration, the electron emitting portion 3005 is shown in a rectangular shape at the center of the conductive thin film 3004, but this is a schematic one, and the position and shape of the actual electron emitting portion are faithfully represented. Not necessarily.

[0006] M. In the above-described surface conduction electron-emitting device including the device by Hartwell et al., The electron-emitting portion 3005 is formed by subjecting the conductive thin film 3004 to an energization process called energization forming before electron emission.
It was common to form That is, the energization forming means forming an electron emission portion by energization. For example, a constant DC voltage is applied to both ends of the conductive thin film 3004 or a voltage is increased at a very slow rate of, for example, about 1 V / min. Energized by applying a DC voltage
The electron emitting portion 30 in a state where the conductive thin film 3004 is locally destroyed, deformed or deteriorated, and is in an electrically high resistance state.
05 is formed. Note that a part of the conductive thin film 3004 that has been locally broken, deformed, or altered includes
Cracks occur. When an appropriate voltage is applied to the conductive thin film 3004 after the energization forming, electron emission is performed in the vicinity of the crack.

[0007] Examples of the FE type are described in, for example, W.S. P.
Dyke & W. W. Dolan, "Field emi
session ", Advance in Electro
nPhysics, 8, 89 (1956), or C.I. A. Spindt, "Physicalpr
operations of thin-film figure
ld emission cathodes with
molybdenium cones ", J. App.
l. Phys. , 47, 5248 (1976).

[0008] As a typical example of the FE type device configuration, FIG. A. 1 shows a cross-sectional view of a device by Spindt et al. In the figure, reference numeral 3010 denotes a substrate;
Is an emitter wiring made of a conductive material, 3012 is an emitter cone, 3013 is an insulating layer, and 3014 is a gate electrode. This device comprises an emitter cone 3012 and a gate electrode 3
By applying an appropriate voltage during 014, field emission is caused from the tip of the emitter cone 3012.

As another element structure of the FE type, FIG.
There is also an example in which an emitter and a gate electrode are arranged on a substrate almost in parallel with the plane of the substrate, instead of a laminated structure like 0.

As an example of the MIM type, for example,
C. A. Mead, “Operation of tu
nnel-emission Devices, J. et al. A
ppl. Phys. , 32, 646 (1961). FIG. 2 shows a typical example of an MIM type device configuration.
It is shown in FIG. This figure is a cross-sectional view.
Is a substrate, 3021 is a lower electrode made of metal, 3022 is a thin insulating layer having a thickness of about 100 Å, 302
Reference numeral 3 denotes an upper electrode made of a metal having a thickness of about 80 to 300 angstroms. In the MIM type, the upper electrode 302
By applying an appropriate voltage between the third electrode 301 and the lower electrode 3021, electrons are emitted from the surface of the upper electrode 3023.

The above-mentioned cold cathode device can obtain electrons at a lower temperature than the hot cathode device, and therefore does not require a heater for heating. Therefore, the structure is simpler than that of the hot cathode element, and a fine element can be produced. Also,
Even if a large number of elements are arranged on a substrate at a high density, problems such as thermal melting of the substrate hardly occur. In addition, unlike the hot cathode device, which operates by heating the heater, the response speed is slow, and the cold cathode device also has the advantage that the response speed is fast. For this reason, research for applying the cold cathode device has been actively conducted.

For example, the surface conduction electron-emitting device has the advantage of being able to form a large number of devices over a large area because it has a particularly simple structure and is easy to manufacture among cold cathode devices. Therefore, for example, Japanese Patent Application Laid-Open No.
As disclosed in 332, methods for arranging and driving a large number of elements are being studied.

As for applications of the surface conduction electron-emitting device, for example, image forming apparatuses such as image display apparatuses and image recording apparatuses, charged beam sources, and the like have been studied.

Particularly, as an application to an image display device, as disclosed in US Pat. No. 5,066,883, JP-A-2-257551 and JP-A-4-28137 by the present applicant, a surface-conduction emission device is used. An image display device using a combination of a phosphor that emits light by irradiation with an electron beam has been studied. An image display device using a combination of a surface conduction electron-emitting device and a phosphor is expected to have better characteristics than other conventional image display devices. For example, compared to a liquid crystal display device that has become widespread in recent years, it can be said that it is superior in that it does not require a backlight because it is a self-luminous type and that it has a wide viewing angle.

A method of driving a large number of FE types is disclosed in US Pat. No. 4,904,89 by the present applicant.
5 is disclosed. Further, as an example in which the FE type is applied to an image display device, for example, R.F. The flat panel display reported by Meyer et al. Is known [R. Meye
r: "Recent Development onM
microtips Display at LET
I ", Tech. Digest of 4th In
t. Vacuum Microelectronic
s Conf. , Nagahama, pp .; 6-9 (1
991)].

An example in which a number of MIM types are arranged and applied to an image display device is disclosed in, for example, Japanese Patent Application Laid-Open No.
55738.

[0017]

SUMMARY OF THE INVENTION The present inventors have developed various materials, including those described in the above-mentioned prior art.
We have tried cold cathode devices with manufacturing method and structure. Furthermore, research has been conducted on a multi-electron beam source in which a large number of cold cathode devices are arranged, and on an image display device using the multi-electron beam source.

The inventors have tried a multi-electron beam source by an electric wiring method shown in FIG. 22, for example. That is, it is a multi-electron beam source in which a large number of cold cathode devices are two-dimensionally arranged and these devices are wired in a matrix as shown.

In the figure, 4001 schematically shows a cold cathode element, 4002 shows a wiring in a row direction, and 4003 shows a wiring in a column direction. Row direction wiring 4002 and column direction wiring 400
3 actually has a finite electrical resistance,
In the drawing, they are shown as wiring resistances 4004 and 4005. The above-described wiring method is called simple matrix wiring.

Although a 6 × 6 matrix is shown for convenience of illustration, the size of the matrix is not limited to this. For example, in the case of a multi-electron beam source for an image display device, a desired image is displayed. Elements that are sufficient for displaying are arranged and wired.

In a multi-electron beam source in which cold cathode elements are arranged in a simple matrix, a row-directional wiring 4002 and a column-directional wiring 400 are required to output a desired electron beam.
3 is applied with an appropriate electric signal. For example, to drive one row of the cold cathode devices in the matrix, a selection voltage Vs is applied to the row direction wiring 4002 of the selected row,
At the same time, the non-selection voltage Vns is applied to the row direction wiring 4002 of the non-selected row. In synchronization with this, the column direction wiring 4003
Is applied with a drive voltage Ve for outputting an electron beam. According to this method, wiring resistances 4004 and 4004
If the voltage drop due to 5 is ignored, the voltage of Ve-Vs is applied to the cold cathode elements of the selected row, and the voltage of Ve-Vns is applied to the cold cathode elements of the non-selected rows. V
If e, Vs, and Vns are set to voltages of appropriate magnitudes, an electron beam of a desired intensity should be output only from the cold cathode elements in the selected row, and a different drive voltage Ve is applied to each of the column wirings. If applied, each of the elements in the selected row should output a different intensity electron beam. Further, if the length of time during which the drive voltage Ve is applied is changed, the length of time during which the electron beam is output should be changed.

Therefore, a multi-electron beam source having a cold-cathode element arranged in a simple matrix wiring has various applications. For example, if an electric signal corresponding to image information is appropriately applied, it is suitable as an electron source for an image display device. Can be used.

However, in a multi-electron beam source in which cold cathode devices are arranged in a simple matrix, the following problems actually occur. Hereinafter, the signal applied to the row direction wiring is referred to as a scanning signal, and the signal applied to the column direction wiring is referred to as a modulation signal.

In driving the multi-electron beam source shown in FIG. 22, the length of time during which the driving voltage Ve is applied is changed to change the length of time during which the electron beam is output, thereby displaying an image. It is based on what you do.

FIG. 23 is a time chart for explaining a scanning signal and a modulation signal in a general pulse width modulation driving method. As shown in FIG.
Drives the cold cathode element in the i-th row, and i + 1 in the period K + 1.
In the period K + 2, the cold cathode element in the (i + 2) th row is driven.
A modulation signal is applied to the column wiring. As shown in FIG. 23, the modulated signal is applied with pulses having different time widths with rising edges, and by controlling the pulse width in accordance with the image signal, the electron emission time from the electron source is controlled, and the image is displayed. indicate.

However, in the driving device described above, a rectangular wave without ringing as shown in FIG. 23 can be output in the no-load state. However, when the multi-electron source is actually driven as a load, the driving device shown in FIG. As shown in FIG. 5, large ringing occurred at the rising portion of the waveform. The inventors believe that the cause may be not the multi-electron source itself but the inductive components of a very large number of cables connecting between the driving device and the multi-electron source, and the effects of the capacitive components between them. Is thinking. In particular, this ringing is large at the rise of the pulse, and is less noticeable at the fall than at the rise. The inventors believe that this phenomenon is because the rising of the modulation signal is synchronized (linking due to mutual inductance between column wirings).
Make sure that

As described above, if ringing occurs at the time of rising, the ringing acts in a direction in which an overvoltage of a predetermined voltage or more is applied to the cold cathode element, so that the element is deteriorated or, in some cases, destroyed. There was a fear of doing.

In order to solve the problem that an overvoltage is applied to the element due to ringing caused by the rise of the modulation signal, the inventors make the fall of the modulation signal applied to the column wiring uniform. In order to prevent overvoltage from being applied to the device, we have been conducting research on it. The effect of aligning the falling periods of the modulation signal is to reduce the ringing that occurs at the rising portion because the period in which the modulation signals are synchronized with each other is not the rising portion but the falling portion as shown in FIG. Was completed. For this reason, the overvoltage of a predetermined voltage or more applied to the cold cathode device due to ringing is reduced, and the device is less likely to be deteriorated or destroyed.

However, when it is necessary to display a display pattern such that the modulation signal has the same pulse width on the adjacent column-direction wirings of the display panel, the rising periods are synchronized, so that the rising pattern is not synchronized. There is a problem that ringing as described above occurs in some parts.

An object of the present invention is to reduce ringing which becomes a problem when an image is displayed by arranging a plurality of electron beam sources constituted by, for example, cold cathode devices on a two-dimensional plane.

That is, the present invention has been made in view of the above problems, and has an electron source driving apparatus and method for more reliably preventing ringing generated at the time of rising of a modulation signal, and an image forming apparatus using the same. The purpose is to provide.

[0032]

Means for Solving the Problems An electron source driving device, which is one of the inventions related to the present application, is configured as follows. That is, the device has a plurality of devices that emit electrons by applying a voltage, and the plurality of devices are provided for each of the plurality of devices and a first voltage application path commonly connected to the plurality of devices. An electron source connected to both a second voltage applying path for applying a voltage to each element in cooperation with the first voltage applying path by applying a potential different from the first voltage applying path An electron source driving device for driving the second voltage application path, the time width from the rise to the fall of the modulation signal for modulating the potential of the second voltage application path,
Dispersing means for dispersing the rising timing of the modulation signal when the second voltage application path corresponding to each of the plurality of elements is the same, and using the modulation signal obtained by the dispersing means, Driving means for modulating the potential of the voltage application path.

As shown in the following embodiments, the present invention can be applied to an electron source having a configuration in which the elements are arranged in a matrix. At this time, the first voltage application path can be a row-direction wiring (or a column-direction wiring), and the second voltage application path can be a column-direction wiring (or a row-direction wiring). A plurality of row-direction wirings serving as first voltage application paths may be provided. At this time, a plurality of elements in the column direction are used as second voltage application paths corresponding to the plurality of elements connected to each row-direction wiring. A plurality of elements may be connected to different row-direction wirings, respectively. Also the first
When a plurality of row-direction wirings as voltage application paths are provided and a column-direction wiring is a common wiring to which a plurality of elements connected to each row-direction wiring are connected, a desired row among the plurality of row-direction wirings is selected. Column-directional wiring to which an element to emit electrons is connected in cooperation with a column-directional wiring to which an element to emit electrons is connected only to a row to be driven. A potential sufficient to emit electrons may be applied to the potential of. Each of the column wirings may be provided with a potential capable of emitting electrons with respect to the potential of the selected row wiring for a time width determined by a modulation signal for each element connected to the selected row wiring. is there. Then, the rows to be driven may be sequentially changed. As a specific configuration, it suffices to have a scanning signal applying unit that applies a scanning signal having a predetermined peak value to the selected row direction wiring.

As the device, a cold cathode device, in particular, a surface conduction type emission device can be suitably used.

Further, it is preferable to have a control means for controlling the rising of the modulation signal having the same time width so as not to be synchronized. In this control means, for example, by controlling the rear end of the modulation signal to be synchronized, it is possible to prevent the rising of the modulation signal having the same time width from being synchronized. In the present invention,
It is not necessary to first determine whether the time widths of the modulated signals are the same or not. For example, first, the rear end of the modulation signal is synchronized, and then the rising edge of the modulation signal whose rising edge is synchronized, ie, the rising edge of the modulation signal having the same time width, may be dispersed. It is. Also, the present invention does not prohibit the dispersion processing by the dispersing means from being performed not only on modulated signals having the same time width but also on modulated signals having different time widths. Specifically, the control means includes counter means for setting a maximum value of the image signal as an initial value and subtracting the maximum value by a predetermined pulse train signal, and the count value of the counter means is a value of the image signal to be processed. Or output a signal that is turned on until it becomes zero, or has counter means for setting the maximum value of the image signal to the maximum value, and sets the value of the image signal to be processed as the initial value The counting by the counter means is started, and the time when the counted value reaches the maximum value is used as the rising timing of the modulation signal having the time width corresponding to the image signal. For example, FIG.
Corresponds to the pulse width modulation circuit. In addition, the delay control circuit and the modulation signal delay circuit in FIG.

In the present invention, the dispersion is preferably performed within a predetermined range. In particular, when the time width of the modulation signal takes discrete values, the predetermined time width may be an interval between the discrete values. For example, when an electron source used to form an image by emitting electrons is driven, the luminance can be modulated by the time of electron emission. For example, when a certain luminance is obtained by applying a voltage having a first time width, and when a voltage having a second time width is applied in order to obtain a luminance one step lower than that, the range of the dispersion is the first When the difference between the time width and the second time width (the time width corresponding to one gradation) is exceeded, the modulated signal having the first time width is dispersed and delayed. There is a possibility that the rise of the modulation signal having the time width of the second time width may be synchronized with the rise of the modulation signal having the second time width. Therefore, the width of the dispersion is determined by the difference between the first time width and the second time width. By setting it within the range, the possibility that the rising edge of the modulation signal is synchronized can be reduced.

Further, it is preferable that the dispersion means has storage means for storing the delay amount of the modulation signal, and disperses the rise of the modulation signal by changing the delay amount. Specifically, the rise can be shifted by referring to the delay amount stored in the memory pitch and making the delay amount different. In the storage means, the delay amount is stored for each of the modulation signals having different time widths, and when determining the delay amount for the modulation signal having a certain time width, the delay amount is particularly determined with respect to the modulation signal having the same time width. May read out the amount of delay given immediately before and determine the amount of delay based on the amount of delay. The determined delay amount may be newly stored in the storage means. In brief, it is sufficient to overwrite the previously stored value with the newly determined delay amount. That is, as a specific configuration, a storage means for storing the delay amount, a modulation signal having the same width as the time width of the modulation signal for which the delay amount is to be determined, and a modulation signal for which the delay amount is to be determined. Means for reading the previously determined delay amount from an address storing the delay amount of the modulation signal for which the delay amount has been previously determined; and a modulation signal for determining the delay amount based on the read delay amount. And a writing unit that overwrites the address of the storage unit with the delay amount determined by the determination unit.

The present application also includes an invention of an image forming apparatus having the above-described electron source driving device. At this time, it suffices to have an image forming member on which an image is formed using electrons emitted from the electron source driving device. Specifically, as the image forming member, a member provided with a fluorescent material that receives electrons and emits light can be employed. Further, an image forming member which forms a latent image and which is charged by receiving electrons and which is charged may be employed.

The present invention also includes the driving method of the image forming apparatus as an invention.

An electron source driving method, which is one of the inventions of the present application, is configured as follows. That is, the device has a plurality of devices that emit electrons by applying a voltage, and the plurality of devices are provided for each of the plurality of devices and a first voltage application path commonly connected to the plurality of devices. An electron source connected to both a second voltage applying path for applying a voltage to each element in cooperation with the first voltage applying path by applying a potential different from the first voltage applying path And wherein the time width from the rise to the fall of the modulation signal for modulating the potential of the second voltage application path corresponds to each of a plurality of the elements. When the voltage application path is the same, the rising timing of the modulation signal is dispersed, and the potential of the second voltage application path is modulated using the dispersed modulation signal.

[0041]

Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. In the following, for convenience of explanation, the structure and manufacturing method of the display panel, the structure and manufacturing method of the electron-emitting device, and the structure of the electric circuit will be described in this order.

(Structure and Manufacturing Method of Display Panel) Next, the structure and manufacturing method of the display panel of the image display device to which the present invention is applied will be described with reference to specific examples.

FIG. 1 is a perspective view of a display panel used in the present embodiment. In FIG. 1, a part of the panel is cut away to show the internal structure.

In the figure, 1005 is a rear plate, 1006
Is a side wall, 1007 is a face plate, 1005
1007 form an airtight container for maintaining the inside of the display panel at a vacuum. When assembling an airtight container, it is necessary to seal the joints of each member to maintain sufficient strength and airtightness.For example, apply frit glass to the joints, and in air or nitrogen atmosphere, Sealing was achieved by baking at 400 to 500 degrees for 10 minutes or more. A method of evacuating the inside of the airtight container to a vacuum will be described later.

The rear plate 1005 has a substrate 1001
Is fixed, but the cold cathode device 1002 is provided on the substrate.
Are formed N × M. (N and M are positive integers of 2 or more and are appropriately set according to the target number of display pixels. For example, in a display device for displaying high-definition television, N = 3000, M It is desirable to set a number equal to or greater than 1000. In this embodiment, N = 3072 and M = 1024.)
The cold cathode elements are arranged in a simple matrix by M row-directional wirings 1003 and N column-directional wirings 1004. The part constituted by 1001 to 1004 is called a multi-electron beam source. The manufacturing method and structure of the multi-electron beam source will be described later in detail.

In the present embodiment, the substrate 1001 of the multi-electron beam source is fixed to the rear plate 1005 of the airtight container.
01 has sufficient strength, the substrate 10 of the multi-electron beam source is used as a rear plate of the hermetic container.
01 itself may be used.

On the lower surface of the face plate 1007, a fluorescent film 1008 is formed. Since the display device of this embodiment is a color display device, phosphors of three primary colors of red, green, and blue used in the field of CRT are separately applied to a portion of the fluorescent film 1008. The phosphors of each color are separately applied in stripes as shown in FIG. 2A, for example, and black conductors 10 are provided between the phosphor stripes.
10 are provided. The purpose of providing the black conductor 1010 is to prevent the display color from shifting even if the electron beam irradiation position is slightly shifted, and to prevent the reflection of external light to prevent the display contrast from lowering. And preventing charge-up of the fluorescent film by the electron beam. Although graphite is used as a main component for the black conductor 1010, any other material may be used as long as it is suitable for the above purpose.

The method of applying the phosphors of the three primary colors is not limited to the stripe arrangement shown in FIG. 2A, but may be, for example, a delta arrangement as shown in FIG. Other arrangements may be used.

When a monochrome display panel is manufactured, a monochromatic phosphor material may be used for the phosphor film 1008, and a black conductive material may not necessarily be used.

A metal back 1009 known in the field of CRTs is provided on the surface of the fluorescent film 1008 on the rear plate side.
Is provided. The purpose of providing the metal back 1009 is
A part of the light emitted from the fluorescent film 1008 is specularly reflected to improve the light utilization rate, or the fluorescent film 1008
8 to protect it, to act as an electrode for applying an electron beam acceleration voltage, and to act as a conductive path for excited electrons of the fluorescent film 1008. The metal back 1009 was formed by forming a fluorescent film 1008 on the face plate substrate 1007, smoothing the surface of the fluorescent film, and vacuum-depositing Al thereon.
Note that when a fluorescent material for low voltage is used for the fluorescent film 1008, the metal back 1009 is not used.

Although not used in the present embodiment, for the purpose of applying an acceleration voltage and improving the conductivity of the fluorescent film, a transparent material made of, for example, ITO is provided between the face plate substrate 1007 and the fluorescent film 1008. Electrodes may be provided.

Dx1 to Dxm, Dy1 to Dyn and Hv are electric connection terminals having an airtight structure provided for electrically connecting the display panel to an electric circuit (not shown). Dx1 to Dxm are the row wirings 10 of the multi-electron beam source.
03, Dy1 to Dyn are the column direction wirings 1004 of the multi-electron beam source, and Hv is the metal back 1 of the face plate.
009 electrically.

In order to evacuate the inside of the hermetic container to a vacuum, after assembling the hermetic container, an exhaust pipe (not shown) and a vacuum pump are connected, and the inside of the hermetic container is raised to 10 −7 [T
orr]. Thereafter, the exhaust pipe is sealed, but a getter film (not shown) is formed at a predetermined position in the airtight container immediately before or after the sealing in order to maintain the degree of vacuum in the airtight container. The getter film is, for example, a film formed by heating and depositing a getter material containing Ba as a main component by a heater or high-frequency heating,
Due to the adsorbing action of the getter film, the inside of the airtight container is 1 × 10 −5 or 1 × 10 −7 [Torr].
Is maintained at a vacuum degree. The basic configuration and manufacturing method of the display panel of the present embodiment have been described above.

Next, a method of manufacturing the multi-electron beam source used for the display panel of the above embodiment will be described. The material, shape, and manufacturing method of the cold cathode device are not limited as long as the multi-electron beam source used for the image display device of the present embodiment is an electron source in which the cold cathode devices are arranged in a simple matrix. Therefore, for example, a surface conduction electron-emitting device or an FE
Or a cold cathode device such as an MIM type can be used.

However, in a situation where a display device having a large display screen and an inexpensive display device is required, among these cold cathode devices, a surface conduction type emission device is particularly preferable. That is, in the FE type, since the relative position and shape of the emitter cone and the gate electrode greatly affect the electron emission characteristics, extremely high-precision manufacturing technology is required, but this achieves a large area and a reduction in manufacturing cost. Is a disadvantageous factor. In the case of the MIM type, it is necessary to make the thicknesses of the insulating layer and the upper electrode thin and uniform, which is also a disadvantageous factor in achieving a large area and a reduction in manufacturing cost. On the other hand, since the surface conduction electron-emitting device has a relatively simple manufacturing method, it is easy to increase the area and reduce the manufacturing cost. In addition, the inventors have found that among the surface conduction electron-emitting devices, those in which the electron-emitting portion or its peripheral portion is formed of a fine particle film have particularly excellent electron-emitting characteristics and can be easily manufactured. Therefore, it can be said that it is most suitable for use in a multi-electron beam source of a high-luminance, large-screen image display device. Therefore, in the display panel of the above embodiment, a surface conduction electron-emitting device in which the electron-emitting portion or its peripheral portion is formed of a fine particle film is used. Therefore, the basic configuration, manufacturing method and characteristics of a suitable surface conduction electron-emitting device will be described first, and then the structure of a multi-electron beam source in which many devices are arranged in a simple matrix will be described.

(Suitable Device Configuration and Manufacturing Method of Surface Conduction Emission Device) A typical configuration of a surface conduction electron-emitting device in which an electron-emitting portion or its peripheral portion is formed of a fine particle film is a flat type or a vertical type. Kinds are given.

(Flat-type surface conduction electron-emitting device) First, the structure and manufacturing method of a flat-surface conduction electron-emitting device will be described. FIG. 3 shows a plan view (a) and a cross-sectional view (b) for explaining the configuration of a planar surface conduction electron-emitting device. In the figure, 1101 is a substrate, 1102 and 1
103, a device electrode; 1104, a conductive thin film; 1105, an electron-emitting portion formed by an energization forming process;
Reference numeral 13 denotes a thin film formed by the activation process.

As the substrate 1101, for example, various glass substrates such as quartz glass and blue plate glass, various ceramics substrates such as alumina, or an insulating layer made of, for example, SiO 2 is laminated on the various substrates described above. Substrate or the like can be used.

The device electrodes 1102 and 1103 provided on the substrate 1101 in parallel with the substrate surface are formed of a conductive material. For example, N
i, Cr, Au, Mo, W, Pt, Ti, Cu, Pd,
The material may be appropriately selected from metals such as Ag and the like, alloys of these metals, metal oxides such as In 2 O 3 —SnO 2, and semiconductors such as polysilicon. An electrode can be easily formed by using a combination of a film forming technique such as vacuum evaporation and a patterning technique such as photolithography and etching. However, the electrode can be formed by other methods (for example, printing technique). I can't wait.

The shapes of the device electrodes 1102 and 1103 are appropriately designed according to the application purpose of the electron-emitting device.
Generally, the electrode spacing L is usually designed by selecting an appropriate value from the range of several hundreds of angstroms to several hundreds of micrometers. It is in the range of ten micrometers. Further, regarding the thickness d of the device electrode,
Usually, an appropriate numerical value is selected from the range of several hundred angstroms to several micrometers.

A fine particle film is used for the conductive thin film 1104. The fine particle film mentioned here is a film containing many fine particles as a constituent element (including an island-shaped aggregate).
I mean If you examine the microparticle film microscopically, usually
A structure in which the individual fine particles are spaced apart, a structure in which the fine particles are adjacent to each other, or a structure in which the fine particles overlap each other is observed.

The particle size of the fine particles used in the fine particle film is in the range of several Angstroms to several thousand Angstroms, and preferably in the range of 10 Angstroms to 200 Angstroms. Further, the thickness of the fine particle film is appropriately set in consideration of various conditions described below. That is, the device electrode 11
02, or 1103, conditions necessary for satisfactorily performing energization forming described later, conditions necessary for setting the electric resistance of the fine particle film itself to an appropriate value described later. , And so on.

Specifically, the setting is made in the range of several angstroms to several thousand angstroms, and the most preferable is between 10 angstroms and 500 angstroms.

Materials that can be used to form the fine particle film include, for example, Pd, Pt, Ru, Ag,
Au, Ti, In, Cu, Cr, Fe, Zn, Sn, T
a, W, Pb, and other metals, PdO, S
Oxides such as nO2, In2 O3, PbO, Sb2 O3, etc .; HfB2, ZrB2, LaB6, C
Borides such as eB6, YB4, GdB4, etc., TiC, ZrC, HfC, TaC, SiC, WC,
And other carbides, TiN, ZrN, Hf
Nitrides such as N, etc., semiconductors such as Si, Ge, etc., carbon, and the like are listed, and are appropriately selected from these.

As described above, the conductive thin film 1104 is formed of a fine particle film.
It was set to be included in the range of 10 3 to 10 7 [Ohm / sq].

The conductive thin film 1104 and the device electrode 11
Since it is desirable that the wires 02 and 1103 be electrically connected well, they have a structure in which a part of each overlaps with the other. In the example of FIG. 3, the layers are stacked in the order of the substrate, the device electrode, and the conductive thin film from the bottom, but in some cases, the substrate, the conductive thin film, and the device electrode are stacked in the order of the bottom. I can't wait.

The electron emitting portion 1105 is a crack-like portion formed in a part of the conductive thin film 1104, and has a higher electrical resistance than the surrounding conductive thin film. The crack is formed by performing a later-described energization forming process on the conductive thin film 1104. Fine particles having a particle size of several Angstroms to several hundred Angstroms may be arranged in the crack. Since it is difficult to accurately and accurately show the actual position and shape of the electron-emitting portion, they are schematically shown in FIG.

The thin film 1113 is a thin film made of carbon or a carbon compound, and covers the electron emitting portion 1105 and its vicinity. The thin film 1113 is formed by performing an energization activation process described later after the energization forming process.

The thin film 1113 is made of any one of single-crystal graphite, polycrystalline graphite, and amorphous carbon, or a mixture thereof, and has a thickness of 500 [Å] or less, but 300 [Å] or less. Is more preferred.

Since it is difficult to accurately show the actual position and shape of the thin film 1113, it is schematically shown in FIG. Further, in the plan view (a), the thin film 111 is formed.
The device from which a part of 3 is removed is shown.

The basic structure of the preferred element has been described above. In the embodiment, the following element is used.

That is, a soda lime glass was used for the substrate 1101, and a Ni thin film was used for the device electrodes 1102 and 1103. The thickness d of the device electrode was 1000 [angstrom], and the electrode interval L was 2 [micrometer].

Pd or P as the main material of the fine particle film
Using dO, the thickness of the fine particle film was set to about 100 [angstrom], and the width W was set to 100 [micrometer].

Next, a method of manufacturing a suitable flat surface conduction electron-emitting device will be described. (A) to (d) of FIG.
Is a cross-sectional view for explaining a manufacturing process of the surface conduction electron-emitting device, and the notation of each member is the same as that in FIG.

1) First, as shown in FIG. 4A, device electrodes 1102 and 1103 are formed on a substrate 1101. In formation, the substrate 1101 is sufficiently washed beforehand with a detergent, pure water, and an organic solvent, and then a material for an element electrode is deposited. (As a method of depositing, for example, a vacuum film forming technique such as a vapor deposition method or a sputtering method may be used.) Thereafter, the deposited electrode material is patterned by using a photolithography / etching technique, and (a)
A pair of device electrodes (1102 and 1103) shown in FIG.

2) Next, a conductive thin film 1104 is formed as shown in FIG. In forming, first, an organic metal solution is applied to the substrate of (a) and dried,
After heating and baking to form a fine particle film, it is patterned into a predetermined shape by photolithography and etching. Here, the organometallic solution is a solution of an organometallic compound whose main element is a material of fine particles used for the conductive thin film. (Specifically, in the present embodiment, P as a main element
d was used. In the embodiment, a dipping method is used as a coating method, but other methods such as a spinner method and a spray method may be used. In addition, as a method of forming a conductive thin film formed of a fine particle film, other than the method of applying the organometallic solution used in the present embodiment, for example, a vacuum evaporation method, a sputtering method, a chemical vapor deposition method, or the like. May be used.

3) Next, as shown in FIG. 9C, a forming power supply 1110 supplies the device electrodes 1102 and 1102 with each other.
3, an appropriate voltage is applied, and an energization forming process is performed to form the electron-emitting portion 1105.

The energization forming treatment is to energize the conductive thin film 1104 made of a fine particle film, and to appropriately break, deform, or alter a part of the conductive thin film 1104 to change into a structure suitable for emitting electrons. This is the process that causes A portion of the conductive thin film made of a fine particle film that has been changed to a structure suitable for emitting electrons (that is, the electron emitting portion 110
In 5), an appropriate crack is formed in the thin film.
Note that the electrical resistance measured between the device electrodes 1102 and 1103 is significantly increased after the formation of the electron emission portions 1105 as compared to before the formation.

FIG. 5 shows an example of an appropriate voltage waveform applied from the forming power supply 1110 in order to explain the energization method in more detail. When forming a conductive thin film made of a fine particle film, a pulse-like voltage is preferable. In the case of this embodiment, a triangular wave pulse having a pulse width T1 is continuously generated at a pulse interval T2 as shown in FIG. Was applied. At that time, the peak value Vpf of the triangular wave pulse was sequentially increased. Also, monitor pulses Pm for monitoring the state of formation of the electron-emitting portion 1105 are inserted at appropriate intervals between the triangular-wave pulses, and the current flowing at that time is measured by the ammeter 1.
It was measured at 111.

In this embodiment, for example, under a vacuum atmosphere of about 10 −5 [torr],
For example, the pulse width T1 is 1 [millisecond], the pulse interval T2
Was set to 10 [milliseconds], and the peak value Vpf was increased by 0.1 [V] for each pulse. Then, the monitor pulse Pm was inserted at a rate of one every time five triangular waves were applied. The monitor pulse voltage Vpm was set to 0.1 [V] so as not to adversely affect the forming process. Then, when the electric resistance between the element electrodes 1102 and 1103 becomes 1 × 10 6 [ohm], that is, the current measured by the ammeter 1111 when the monitor pulse is applied becomes 1 × 10 −7 [A] or less. At this stage, the energization related to the forming process was terminated.

The above method is a preferable method for the surface conduction electron-emitting device of the present embodiment. For example, the design of the surface conduction electron-emitting device such as the material and film thickness of the fine particle film or the element electrode interval L is changed. In such a case, it is desirable to appropriately change the energization conditions accordingly.

4) Next, as shown in FIG. 4D, an appropriate voltage is applied between the element electrodes 1102 and 1103 from the activating power supply 1112 to carry out an energizing activation process, thereby performing electron emission. Improve characteristics.

The energization activation process is a process of energizing the electron emitting portion 1105 formed by the energization forming process under appropriate conditions and depositing carbon or a carbon compound in the vicinity thereof. (In the figure, a deposit made of carbon or a carbon compound is schematically shown as a member 1113.) By performing the activation process, the emission current at the same applied voltage is typically smaller than that before the activation. Specifically, it can be increased by 100 times or more.

Specifically, 10 minus the fourth power to 1
By applying a voltage pulse periodically in a vacuum atmosphere within the range of 0 to the fifth power [torr], carbon or a carbon compound originating from an organic compound existing in the vacuum atmosphere is deposited. The deposit 1113 is any of single crystal graphite, polycrystalline graphite, and amorphous carbon, or a mixture thereof, and has a thickness of 500.
[Angstrom] or less, more preferably 300 [angstrom] or less.

FIG. 6A shows an example of an appropriate voltage waveform applied from the activation power supply 1112 in order to explain the energization method in more detail. In the present embodiment, the energization activation process is performed by periodically applying a rectangular wave having a constant voltage, but specifically, the voltage Vac of the rectangular wave is 14 [V],
The pulse width T3 is 1 [millisecond], and the pulse interval T4 is 10
[Milliseconds]. Note that the above-described energization conditions are preferable conditions for the surface conduction electron-emitting device of the present embodiment,
When the design of the surface conduction electron-emitting device is changed, it is desirable to appropriately change the conditions accordingly.

An anode electrode 1114 shown in FIG. 4D is for capturing an emission current Ie emitted from the surface conduction electron-emitting device, and is connected to a DC high voltage power supply 1115 and an ammeter 1116 (FIG. 4D). Note that the substrate 1101 is
In the case where the activation process is performed after being incorporated in the display panel, the phosphor screen of the display panel is used as the anode electrode 1114).

While the voltage is applied from the activation power supply 1112, the emission current Ie is measured by the ammeter 1116 to monitor the progress of the energization activation processing, and the activation power supply 1112 is monitored.
Control the operation of. An example of the emission current Ie measured by the ammeter 1116 is shown in FIG.
When the application of the pulse voltage starts from 2, the emission current Ie increases with time, but eventually saturates and hardly increases. As described above, when the emission current Ie is substantially saturated, the application of the voltage from the activation power supply 1112 is stopped, and the energization activation process ends.

The above-mentioned energization conditions are preferable conditions for the surface conduction electron-emitting device of the present embodiment, and when the design of the surface conduction electron-emitting device is changed, the conditions should be changed accordingly. desirable.

As described above, the plane type surface conduction electron-emitting device shown in FIG. 4E was manufactured.

(Vertical Surface Conduction Emitting Element) Next, another typical structure of a surface conduction electron emitting element in which the electron-emitting portion or its periphery is formed of a fine particle film, that is, a vertical surface conduction electron-emitting device. The configuration of the element will be described.

FIG. 7 is a schematic sectional view for explaining a basic structure of a vertical type. In FIG.
02 and 1203 are device electrodes, 1206 is a step forming member,
Reference numeral 1204 denotes a conductive thin film using a fine particle film, 1205 denotes an electron-emitting portion formed by an energization forming process, 121
Reference numeral 3 denotes a thin film formed by the activation process.

The difference between the vertical type and the flat type described above is that one of the device electrodes (1202) is provided on the step forming member 1206, and the conductive thin film 1204 is provided on the side surface of the step forming member 1206. It is in the point of coating. Therefore, the element electrode interval L in the above-described planar type shown in FIG.
Is the step height L of the step forming member 1206 in the vertical type.
s. In addition, the substrate 1201, the element electrode 1
202 and 1203, conductive thin film 1 using fine particle film
204, the materials listed in the description of the planar type can be used in the same manner. The step forming member 1206 is made of an electrically insulating material such as SiO2.

Next, a method for manufacturing a vertical surface conduction electron-emitting device will be described. FIGS. 8A to 8F are cross-sectional views for explaining a manufacturing process, and the notation of each member is the same as that in FIG.

1) First, as shown in FIG. 8A, an element electrode 1203 is formed on a substrate 1201. 2) Next, as shown in FIG. 3B, an insulating layer for forming a step forming member is laminated. The insulating layer is, for example, S
iO2 may be deposited by a sputtering method, but another film forming method such as a vacuum evaporation method or a printing method may be used. 3) Next, as shown in FIG. 3C, an element electrode 1202 is formed on the insulating layer.

4) Next, as shown in FIG. 4D, a part of the insulating layer is removed by using, for example, an etching method to expose the element electrode 1203.

5) Next, as shown in FIG. 11E, a conductive thin film 1204 using a fine particle film is formed. For the formation, as in the case of the flat type, a film forming technique such as a coating method may be used.

6) Next, as in the case of the flat type, an energization forming process is performed to form an electron-emitting portion.
(The same process as the planar type energization forming process described with reference to FIG. 4C may be performed.) 7) Next, as in the case of the planar type, the energization activation process is performed, and the electron emission section is performed. Carbon or a carbon compound is deposited in the vicinity. (A process similar to the planar energization activation process described with reference to FIG. 4D may be performed.) As described above, the vertical surface conduction electron-emitting device shown in FIG. Manufactured.

(Characteristics of Surface Conduction Emitting Element Used in Display Device) The element structure and manufacturing method of the planar and vertical surface conduction electron-emitting devices have been described above. Next, the characteristics of the element used in the display device will be described. Is described.

FIG. 9 shows typical examples of (emission current Ie) vs. (device applied voltage Vf) characteristics and (device current If) vs. (device applied voltage Vf) characteristics of the devices used in the display device. . Note that the emission current Ie is significantly smaller than the element current If, and it is difficult to show them on the same scale. In addition, these characteristics are changed by changing design parameters such as the size and shape of the element. Therefore, each of the two graphs is shown in arbitrary units.

The element used in the display device has the following three characteristics regarding the emission current Ie. Primarily,
When a voltage higher than a certain voltage (hereinafter referred to as a threshold voltage Vth) is applied to the element, the emission current Ie sharply increases. On the other hand, when the voltage is lower than the threshold voltage Vth, the emission current Ie is increased.
e is hardly detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie. Second, since the emission current Ie changes depending on the voltage Vf applied to the element, the magnitude of the emission current Ie can be controlled by the voltage Vf. Third, since the response speed of the current Ie emitted from the element with respect to the voltage Vf applied to the element is high, the amount of charge of electrons emitted from the element can be controlled by the length of time during which the voltage Vf is applied.

Because of the above characteristics, the surface conduction electron-emitting device can be suitably used for a display device. For example, in a display device in which a large number of elements are provided corresponding to pixels of a display screen, if the first characteristic is used, display can be performed by sequentially scanning the display screen. That is,
The driving element has a threshold voltage Vt according to a desired light emission luminance.
h or higher, and a voltage lower than the threshold voltage Vth is applied to the non-selected elements. By sequentially switching the elements to be driven, the display screen can be sequentially scanned and displayed.

Further, since the emission luminance can be controlled by using the second characteristic or the third characteristic, a gradation display can be performed.

(Structure of a multi-electron beam source in which a large number of elements are arranged in a simple matrix) Next, a structure of a multi-electron beam source in which the above-mentioned surface conduction electron-emitting devices are arranged on a substrate and arranged in a simple matrix will be described.

FIG. 10 is a plan view of the multi-electron beam source used for the display panel of FIG. 1 described above. On the substrate, surface conduction electron-emitting devices similar to those shown in FIG. 3 are arranged.
And the column-directional wiring electrodes 1004 are arranged in a simple matrix. An insulating layer (not shown) is formed between the row-directional wiring electrodes 1003 and the column-directional wiring electrodes 1004 where they intersect, so that electrical insulation is maintained.
FIG. 11 shows a cross section along the line AA ′ in FIG.

The multi-electron source having such a structure is as follows.
After previously forming a row direction wiring electrode 1003, a column direction wiring electrode 1004, an interelectrode insulating layer (not shown), and a device electrode and a conductive thin film of a surface conduction electron-emitting device on a substrate,
Row direction wiring electrode 1003 and column direction wiring electrode 1004
The device was manufactured by supplying power to each element through the device and performing an energization forming process and an energization activation process.

(Drive Circuit for Driving Multi-Electron Beam Source) A drive circuit according to an embodiment of the present invention will be described below in detail with reference to the drawings. Hereinafter, in order to give a gradation to a display image, the scanning method is line-sequential scanning, and the electron emission period within one horizontal scanning time (1H) is controlled by the time width of the modulation signal, whereby the light emission of the phosphor is performed. Basically, the total amount is controlled and gradation is expressed.

FIG. 12 is a block diagram for explaining a driving device of the multi-electron beam source according to the present embodiment. Hereinafter, the signal flow will be described with reference to FIG.

First, a video signal such as an NTSC signal is input to the decoder 101. Although not shown here, the decoder 101 includes circuits such as a video intermediate frequency circuit, a video detection circuit, a sync separation circuit, and an A / D conversion circuit. The decoder 101 converts the synchronization signal obtained from the input NTSC signal and the image signal RGB into a synchronization signal Sync.
And digital image signals R, G and B are generated and output. Here, the synchronization signal Sync includes a vertical synchronization signal and a horizontal synchronization signal, and the image signals R, G, and B include luminance data for each of red, green, and blue.

The data array conversion circuit 102 arranges R, G, and B signals in accordance with the luminance data of the three primary colors supplied from the decoder according to the pixel array of the display panel, and outputs the signals as serial digital signals Data. The timing control circuit 103 outputs the synchronization signal Sy supplied from the decoder 101.
A timing control signal for adjusting the operation timing of each unit is generated based on nc.

The scanning signal generating circuit 104 is a circuit for generating a scanning signal for sequentially scanning the multi-electron beam sources built in the display panel line by line in accordance with the timing of displaying an image. Specifically, the selection voltage Vs is applied to one of the terminals Dx1 to Dxm of the display panel.
[V] and the non-selection voltage Vns [V] for the remaining m-1 lines.
Is applied. The timing of applying the selection voltage is such that the terminal to which the selection voltage Vs is applied is sequentially switched every horizontal period based on the scanning timing control signal Tscan generated by the timing control circuit 103, and scanning is performed.

In this embodiment, the selection voltage Vs is set to -7 [V] which is about the electron emission threshold voltage, and 0 [V] is applied to the non-selection voltage Vns. The display panel has an Hv terminal as shown in the figure, and a high voltage Va is applied.

Next, a procedure for creating a modulation signal will be described. Data output from the data array conversion circuit 102
The signal is stored in the S / P conversion circuit 106 in FIG. 12 in synchronization with the timing signal Tsft after a predetermined delay is applied by the delay circuit 105 in the figure. Note that D
The delay by the elay circuit 105 is determined by the delay control circuit 111
To compensate for the delay caused by the

At timing when data for one horizontal period is stored in S / P conversion circuit 106, timing signal Tmr
y is issued, and the latch circuit 107 is issued by this Tmry.
Latch their data. The output of the latch circuit 107 is connected to the input of the pulse width modulation circuit 108.
The pulse width modulation circuit 108 outputs modulation control signals D1 to DN having a pulse width corresponding to the value indicated by the data supplied from the latch circuit 107.

FIG. 13 is a diagram for explaining the pulse width modulation circuit 108. The pulse width modulation circuit 108 is configured by a down counter or the like, and the clear signal supplied from the timing control circuit 103 is changed from High to Lo.
w (FIG. 13 (b)), and a down-count is performed sequentially from 255 (decimal). A pulse such as Tc shown in FIG. 13C is supplied from the timing control circuit 103 as a counter clock pulse.

The output of the pulse width modulation circuit 108 is, for example, when the input INPUT is 100 (decimal), the output is low when the count of the down counter is from 255 to the input value of 100, and when the input is 99 to 0, The output is designed to be High. Further, it is designed such that when the output signal Borrow of the counter becomes low, the low state is maintained until the clear signal is applied. Therefore, outputs D1 to DN corresponding to each column from the pulse width modulation circuit 3008 are pulse width modulation signals whose falling periods are synchronized with each other.

That is, the down counter sets the maximum value of the possible pulse width of the modulation signal as an initial value,
Subtract by c. Then, a period during which the value of the down counter reaches zero from the time when the value of the image signal to be a modulation signal is reached is defined as a time during which the modulation signal is turned on.

Alternatively, a counter is provided for setting the maximum value of the pulse width that the modulation signal can take as the maximum value, and Tc is counted using the value of the image signal to be converted into the modulation signal as an initial value,
The point in time when the value of the counter reaches the maximum value may be set as the rising timing of the modulation signal. In this case, the period during which the modulation signal is turned on starts from the rising timing. Then, at the rising timing, counting of Tc by the down counter using the initial value as the value of the image signal starts, and ends when the value of the down counter becomes zero.

It should be noted that a counter circuit for realizing the above-described functions will be apparent to those skilled in the art, and a detailed description thereof will be omitted.

Outputs D1 to DN of pulse width modulation circuit 108
Is connected to the input of the modulation signal delay circuit 109. The modulation signal delay circuit 109 is a circuit that applies a predetermined delay to the modulation control signal based on the delay control signals DD1 to DDN supplied from the delay control circuit 111 and outputs the result. In the present embodiment, the modulation signal delay circuit 109 provides a four-stage delay to the modulation control signal supplied from the pulse width modulation circuit 108 based on the delay control signals DD1 to DDN (2 bits each) supplied from the delay control circuit 111. (In the present embodiment, the delay time is 0 and 1/1 of the time corresponding to one gradation of pulse width modulation.
4, １ ／, and ／). The modulation signal voltage conversion circuit 110 converts the pulse width modulation modulation signals D1 'to DN' with a predetermined delay supplied from the modulation signal delay circuit 109 to an optimal voltage level for driving the display panel.

FIG. 14 is a block diagram illustrating the configuration of modulation signal delay circuit 109. As shown in FIG. 14, the modulation signal delay circuit 109 includes a 4-bit shift register 141, a multiplexer 142, and a logic gate 1 for each column.
43 and 144. The clock pulse Tc ′ applied to the shift register 141 is a pulse having a frequency four times the frequency of the clock pulse Tc described with reference to FIG. The delay control signals DD1 to DDN supplied to the modulation signal delay circuit 109 are supplied from the delay control circuit 111.

According to the configuration of the modulation signal delay circuit 109, any one output of the shift register 141 is selected as the pulse width modulation signal D1 according to the 2-bit delay control signal and output as D1 '. . That is, a pulse width modulated signal delayed by the delay amount according to the delay control signal is obtained.

FIG. 15 is a block diagram showing a configuration of delay control circuit 111. The delay control circuit 111 shown in FIG.
As shown in the figure, the controller 131, the memory 132 (in this embodiment, 256 × 2 bits), the S / P conversion circuit 13
3. It is composed of a latch circuit 134 and the like. Memory 1
Reference numeral 32 denotes, for example, a digital video signal of the present embodiment of 8 bi.
Assuming that t, the address has 256 addresses, the same as the number of video signals represented by 8 bits.

FIG. 16 is a flowchart showing the operation procedure of the delay control circuit 111. A serial digital signal (8 bits) Da is output from the data array conversion circuit 102 described above.
When “ta” is input, the controller 131 reads the memory 1
The value DD written in the address corresponding to the 32 Data values (0 to 255 in decimal) is read (steps S101 and S102).

As the value read from the memory 132, information indicating how much delay was applied to the modulation signal (pulse) when the luminance signal was displayed last time is stored in 2 bits. In this embodiment, the delay amount is 0, 1 /.
4, 2/4, 3/4, so it is represented by 2 bits,
When using five or more types of delay amounts, it is sufficient to use three or more bits. When the power is turned on, the memory 132
Is assumed to be all stored in. By setting the initial value in this way, steps S103 and S10 to be described later are performed.
By the process of 4, the initial delay amount of each modulated signal can be set to 0.

Next, the controller 131
, And outputs a value DD ′ obtained by adding 1 to the value (step S10).
3). Further, the controller 131 overwrites the value DD 'with the same address in the memory 132 (step S1).
04). As described above, the initial value of DD is 11 [binary]
Therefore, D obtained by the controller 131
D 'is 11 [binary] + 1 = 00 [binary].
That is, the initial delay amount of each modulated signal is zero.

DD 'output from controller 131
Are sequentially stored in the S / P conversion circuit 133 in synchronization with the signal Tsft ′ from the timing control circuit 103. S
When DD 'for one line is stored in / P conversion circuit 133, latch pulse TL is applied from latch circuit 134 to timing circuit 103 (FIG. 12), and these data are latched (steps S105 and S106). .

This latch timing is determined by the latch circuit 107.
(FIG. 12) is synchronized with Tmry input to modulation signal delay circuit 109, and modulation control signals D1-D
N and the delay control signals DD1 to DDN are input in synchronization.

In the delay control circuit 111, a time lag occurs when the controller accesses the memory.
The delay time τ of the delay circuit 105 was designed to be the same as the time τ ′, and the delay control signal and the modulation control signal were designed to be correctly synchronized.

The function of the delay control circuit 111 is to add a signal having the same luminance (a signal having the same pulse width) to the column-direction wiring of the display panel when the display panel is driven line-sequentially for each row. The point is to disperse the rise of the voltage waveform. Delay control circuit 1 as described above
By using the modulation delay circuit 11 and the modulation delay circuit 109, even when modulated signals having the same pulse width are continuous, their rising edges are not synchronized between the four adjacent rows. In the case of the present embodiment, the time to be delayed by the modulation delay circuit 3009 is 1/4, 1 / of the time width of 0 delay and 1 gradation.
Since there are four types, ie, two and three-quarters, the delay does not synchronize with the rise of another luminance signal.

Scanning signals Dx1 to Dxm and modulation signal D
One example of y1 to Dyn is shown in FIG. In FIG. 17, the scale of the delay time is drawn large to clearly show the delay amount. In the present embodiment, the delay amount is actually at most 3/4 of the time width for one gradation as described above.

In FIG. 17, the first row of the display panel is driven in period 1, the second row is driven in period 2, and the third row is driven in period 3. FIGS. Are scanning signals Dx1 to Dx supplied to each row wiring of the display panel.
3, the modulation signals Dy1 to Dy4 supplied to the respective column direction wirings are drawn in FIGS.

In period 1, only the scanning signal Dx1 is applied with the selection voltage Vs (−7 V), and the other scanning signals have the same potential as GND. Similarly, in the periods 2 and 3, the selection voltage is applied only to the scanning signals Dx2 and Dx3. Further, period 1 shows a case where the modulated signals Dy1 to Dy4 have the same pulse width. In the period 2, the modulation signals Dy1 and Dy2 have the same pulse width, and the modulation signals Dy3 and Dy4 have the same pulse width. In the period 3, the case where the modulation signals Dy1 to Dy4 have completely different pulse widths is shown.

First, the period 1 will be described. If the modulation signal Dy1 has a delay amount of 0 (decimal), the modulation signal Dy2 has a delay amount of 1 (10
Hex). Similarly, the modulation signal Dy
A delay corresponding to a delay amount 2 (decimal) obtained by adding 1 to 3 is applied. Similarly, the modulation signal Dy4
, A delay corresponding to a delay amount 3 (decimal) obtained by adding 1 is applied. Although not shown in this figure, a delay equivalent to a delay amount of 0 is applied the next time a signal having the same pulse width is applied (that is, as shown in FIG. 17D). The modulation signal is applied at the timing).

In period 2, the pulse widths of (d) and (e) are the same, and the pulse shown in (e) is delayed by a delay amount of 1. The same applies to (f) and (g). Further, in period 3, the pulse widths of the pulses shown in (d) to (g) are different from each other.
Neither pulse is delayed.

As described above, if the multi-electron source of this embodiment and the image display device to which the multi-electron source is applied are driven by the circuit configurations shown in FIGS. Disappears. For this reason, even when adjacent modulation signals have the same pulse width,
The ringing occurring at the rising portion of the modulation signal was almost eliminated. As a result, it was possible to prevent an overvoltage from being applied to the electron-emitting device of the present embodiment.

In the present embodiment, the case where the number of stages to be delayed is four (delay control signal: 2 bits) has been described, but there is no reason that the number of stages must be separately four. Delay control circuit 111 and modulation signal delay circuit 1
09, it is apparent that the number of stages of the delay amount can be increased by expanding the configuration of the timing control circuit 103. However, in order to increase the number of stages, there are problems such as an increase in the circuit scale and a need to increase the speed of a timing signal. Therefore, in this embodiment, the circuit is designed in four stages.

In the present embodiment, an example has been described in which a delay is applied within a time width corresponding to one gradation as a time to apply a delay, but the present invention is not limited to this. If the rising periods of the modulated signals having the same pulse width are dispersed with each other and are not synchronized with the rising timings of the modulated signals having other pulse widths, the delay time may be longer. Conversely, it may be shorter. The delay time can be changed only by changing the timing signal applied to the modulation signal delay circuit.

FIG. 18 shows a display panel using the surface conduction electron-emitting device of this embodiment as an electron beam source.
FIG. 2 is a diagram illustrating an example of a multi-function display device configured to display image information provided from various image information sources such as a television broadcast. In the figure,
2100 is a display panel, 2101 is a display panel driving circuit, 2102 is a display controller, 2103 is a multiplexer, 2104 is a decoder, 2105 is an input / output interface circuit, 2106
Denotes a CPU, 2107 denotes an image generating circuit, 2108 and 2
109 and 2110 are image memory interface circuits, 2111 is an image input interface circuit, 211
2 and 2113 are TV signal receiving circuits, and 2114 is an input unit.

When the present display device receives a signal containing both video information and audio information, such as a television signal, it naturally reproduces the audio simultaneously with the display of the video. Descriptions of circuits, speakers, and the like relating to reception, separation, reproduction, processing, storage, and the like of audio information that are not directly related to the features of the invention will be omitted. Hereinafter, the function of each unit will be described along the flow of the image signal.

First, the TV signal receiving circuit 2113 is a circuit for receiving a TV image signal transmitted using a wireless transmission system such as radio waves or spatial optical communication.
The type of TV signal to be received is not particularly limited,
For example, various systems such as the NTSC system, the PAL system, and the SECAM system may be used. A TV signal (for example, a so-called high-definition TV such as the MUSE system) composed of a larger number of scanning lines is suitable for taking advantage of the display panel suitable for a large area and a large number of pixels. Signal source. The TV signal received by the TV signal receiving circuit 2113 is output to the decoder 2104.

The TV signal receiving circuit 2112 is a circuit for receiving a TV image signal transmitted using a wired transmission system such as a coaxial cable or an optical fiber. As with the TV signal receiving circuit 2113, the type of the TV signal to be received is not particularly limited, and the TV signal received by this circuit is also output to the decoder 2104.

The image input interface circuit 21
Reference numeral 11 denotes a circuit for receiving an image signal supplied from an image input device such as a TV camera or an image reading scanner.
Is output to

The image memory interface circuit 2
110 is a video tape recorder (hereinafter abbreviated as VTR)
Is a circuit for capturing the image signal stored in the decoder 2104. The captured image signal is output to the decoder 2104.

The image memory interface circuit 2
Reference numeral 109 denotes a circuit for capturing an image signal stored in the video disk, and the captured image signal is output to the decoder 2104.

The image memory interface circuit 2
Reference numeral 108 denotes a circuit for taking in an image signal from a device that stores still image data, such as a so-called still image disk.
04 is output.

The input / output interface circuit 210
Reference numeral 5 denotes a circuit for connecting the present display device to an external computer, a computer network, or an output device such as a printer. In addition to inputting and outputting image data, character data, and graphic information, control signals and numerical data can be input and output between the CPU 2106 included in the display device and the outside in some cases. .

The image generating circuit 2107 is provided with image data, character / graphic information input from the outside via the input / output interface circuit 2105, or a CPU.
A circuit for generating display image data based on the image data and character / graphic information output from 2106.
The circuit includes a rewritable memory for storing, for example, image data and character / graphic information, a read-only memory for storing image patterns corresponding to character codes, and a processor for performing image processing. Circuits necessary for generating an image, such as those described above, are incorporated.
The display image data generated by this circuit is output to the decoder 2104, but may be input / output to an external computer network or a printer via the input / output interface circuit 2105 in some cases.

The CPU 2106 mainly carries out operations related to operation control of the display device and generation, selection and editing of a display image.

For example, a control signal is output to the multiplexer 2103, and image signals to be displayed on the display panel are appropriately selected or combined. In this case, a control signal is generated for the display panel controller 2102 in accordance with the image signal to be displayed, and the display frequency, the scanning method (for example, interlaced or non-interlaced), the number of scanning lines on one screen, and the like are displayed. The operation of the device is appropriately controlled.

Further, image data and character / graphic information are directly output to the image generating circuit 2107, or an external computer or memory is accessed via the input / output interface circuit 2105 to access the image data or character / graphic information. Enter graphic information.

The CPU 2106 may, of course, be involved in work for other purposes. For example, it may directly relate to a function of generating and processing information, such as a personal computer or a word processor.

Alternatively, the computer may be connected to an external computer network via the input / output interface circuit 2105 as described above, and work such as numerical calculation may be performed in cooperation with an external device.

The input unit 2114 is connected to the CPU 21.
06 is for the user to input commands, programs, data, and the like. For example, in addition to a keyboard and a mouse, a joystick, a barcode reader,
Various input devices such as a voice recognition device can be used.

Also, the decoder 2104 has the
And 2113 are circuits for inversely converting various image signals inputted from 2113 into three primary color signals or luminance signals and I and Q signals. It is to be noted that the decoder 2104 desirably includes an image memory therein, as indicated by a dotted line in FIG. This is for handling a television signal that requires an image memory when performing inverse conversion, such as the MUSE method. Further, the provision of the image memory facilitates the display of a still image, or enables image processing and editing including image thinning, interpolation, enlargement, reduction, and synthesis in cooperation with the image generation circuit 2107 and the CPU 2106. This is because there is an advantage that it can be easily performed.

The multiplexer 2103 is connected to the C
A display image is appropriately selected based on a control signal input from the PU 2106. That is, the multiplexer 2103 selects a desired image signal from the inversely converted image signals input from the decoder 2104 and outputs the selected image signal to the drive circuit 2101. In that case, by switching and selecting an image signal within one screen display time, it is possible to divide one screen into a plurality of areas and display different images depending on the areas, as in a so-called multi-screen TV. .

The display panel controller 2
Reference numeral 102 denotes a circuit for controlling the operation of the drive circuit 2101 based on a control signal input from the CPU 2106.

First, as a signal related to the basic operation of the display panel, for example, a signal for controlling an operation sequence of a drive power supply (not shown) for the display panel is output to the drive circuit 2101. Also,
A signal for controlling, for example, a screen display frequency and a scanning method (for example, interlaced or non-interlaced) related to the display panel driving method is output to the driving circuit 2101.

In some cases, a control signal related to image quality adjustment such as brightness, contrast, color tone, and sharpness of a displayed image may be output to the drive circuit 2101.

The drive circuit 2101 is a circuit for generating a drive signal to be applied to the display panel 2100, and includes an image signal input from the multiplexer 2103 and the display panel controller 21.
02 operates based on a control signal input from the control unit 02.

The function of each part has been described above. With the configuration illustrated in FIG. 18, in the present display device, image information input from various image information sources is displayed on the display panel 2.
100 can be displayed. That is, various image signals including television broadcasting are transmitted to the decoder 21.
After the inverse conversion at 04, the multiplexer 2103
And is input to the driving circuit 2101 as appropriate. On the other hand, the display controller 2102 generates a control signal for controlling the operation of the drive circuit 2101 according to the image signal to be displayed. The drive circuit 2101 controls the display panel 2 based on the image signal and the control signal.
100 is applied with a drive signal. Accordingly, an image is displayed on display panel 2100. These series of operations are totally controlled by the CPU 2106.

In the present display device, the image memory incorporated in the decoder 2104, the image generation circuit 21
07 and the CPU 2106 involve not only displaying a selected one of a plurality of pieces of image information but also enlarging, reducing, rotating, moving, edge emphasizing, thinning out, and interpolating the displayed image information. , Color conversion,
It is also possible to perform image processing such as image aspect ratio conversion and the like, and image editing such as combining, erasing, connecting, exchanging, and fitting. Although not specifically mentioned in the description of the present embodiment, a dedicated circuit for processing and editing audio information may be provided as in the above-described image processing and image editing.

Therefore, the present display device is a television broadcast display device, a video conference terminal device, an image editing device that handles still and moving images, a computer terminal device, an office terminal device such as a word processor,
It can be equipped with the functions of a game machine etc. by one unit, and has a very wide application range for industrial or consumer use.

FIG. 18 shows only an example of the configuration of a display device using a display panel using a surface conduction electron-emitting device as an electron beam source, and the present invention is not limited to this. Needless to say. For example, FIG.
Circuits related to functions that are not necessary for the purpose of use among the eight components may be omitted. Conversely, additional components may be added depending on the purpose of use. For example, when the present display device is applied as a video phone, it is preferable to add a transmission / reception circuit including a television camera, an audio microphone, an illuminator, and a modem to the components.

In the present display device, in particular, since the display panel using the surface conduction electron-emitting device as the electron beam source can be easily made thin, the depth of the entire display device can be reduced. In addition, the display panel using surface conduction electron-emitting devices as the electron beam source can easily enlarge the screen, and has high brightness and excellent viewing angle characteristics. It is possible to display well.

[0165]

As described above, according to the present invention,
Ringing that occurs when the modulation signal rises can be more reliably prevented. As a result, an overvoltage can be prevented from being applied to the electron-emitting device.

[0166]

[Brief description of the drawings]

FIG. 1 is a perspective view of an image display apparatus according to an embodiment of the present invention, in which a part of a display panel is cut away.

FIG. 2 is a plan view illustrating a phosphor array of a face plate of the display panel.

FIGS. 3A and 3B are a plan view and a cross-sectional view, respectively, of a planar surface conduction electron-emitting device used in the embodiment.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of the planar surface-conduction emission type electron-emitting device.

FIG. 5 is a diagram showing an applied voltage waveform at the time of energization forming processing.

FIG. 6 is a diagram showing an applied voltage waveform (a) and a change (b) of a discharge current Ie in the activation process.

FIG. 7 is a sectional view of a vertical surface conduction electron-emitting device used in the embodiment.

FIG. 8 is a sectional view showing a manufacturing process of a vertical surface conduction electron-emitting device.

FIG. 9 is a graph showing typical characteristics of the surface conduction electron-emitting device used in the embodiment.

FIG. 10 is a plan view of a substrate of the multi-electron beam source used in the embodiment.

FIG. 11 is a partial cross-sectional view of a substrate of the multi-electron beam source used in the embodiment.

FIG. 12 is a block diagram illustrating a schematic configuration of a driving device according to an embodiment.

FIG. 13 is a diagram illustrating the operation of the pulse width modulation circuit according to the embodiment.

FIG. 14 is a block diagram illustrating a configuration of a modulation signal delay circuit according to an embodiment.

FIG. 15 is a block diagram illustrating a configuration of a delay control circuit according to the embodiment.

FIG. 16 is a flowchart illustrating an operation of the delay control circuit according to the embodiment.

FIG. 17 is a diagram showing an output waveform of the driving device used in the embodiment.

FIG. 18 is a block diagram of a multi-function image display device using the image display device according to the embodiment of the present invention.

FIG. 19 is a view showing an example of a general surface conduction electron-emitting device.

FIG. 20 is a diagram illustrating an example of a general FE-type element.

FIG. 21 is a diagram showing an example of a general MIM element.

FIG. 22 is a diagram illustrating a state in which electron-emitting devices are arranged in a matrix.

FIG. 23 is a diagram for explaining a general pulse width modulation driving method.

FIG. 24 is a diagram for explaining occurrence of ringing in a general pulse width modulation driving method.

FIG. 25 is a diagram for explaining occurrence of ringing in a general pulse width modulation driving method.

Claims (13)

[Claims] A plurality of devices that emit electrons by applying a voltage, wherein the plurality of devices include a first voltage application path to which the plurality of devices are connected in common; And is connected to both a second voltage application path that applies a voltage to each element in cooperation with the first voltage application path by applying a potential different from the first voltage application path. An electron source driving device that drives an electron source, wherein a time width from a rise to a fall of a modulation signal for modulating a potential of the second voltage application path corresponds to each of a plurality of the elements. Dispersing means for dispersing the rising timing of the modulation signal when the voltage is the same in the second voltage application path; and using the modulation signal obtained by the dispersing means,
And a drive unit for modulating the potential of the voltage application path. 2. The electron source according to claim 1, wherein the electron source has a plurality of the first voltage application paths, and a plurality of the elements are connected to each of the plurality of the first voltage application paths. Electron source drive. 3. The electron source driving device according to claim 2, wherein the elements connected to the plurality of first voltage application paths are commonly connected to the second voltage application path. 4. The device according to claim 1, wherein said device is a cold cathode device.
4. The electron source driving device according to any one of claims 1 to 3. 5. The electron source driving device according to claim 1, wherein the device is a surface conduction electron-emitting device. 6. The electron source driving device according to claim 1, further comprising a control unit that controls so that rising edges of the modulation signals having different time widths are not synchronized. 7. The time width of the modulated signal takes discrete values, and the dispersion is performed within a predetermined time width range, and the predetermined time width is defined by an interval between the discrete values. The electron source driving device according to any one of claims 1 to 6. 8. The apparatus according to claim 1, wherein said dispersion means has a storage means for storing a delay amount of the modulation signal, and disperses a rise of the modulation signal by changing the delay amount. An electron source driving device according to any one of the above. 9. An electron source driving device according to claim 1, further comprising: an image forming member on which an image is formed by using electrons emitted from the electron source driving device. Image forming device. 10. A semiconductor device comprising: a plurality of devices that emit electrons by applying a voltage; wherein the plurality of devices include a first voltage application path to which each of the plurality of devices is connected in common; And is connected to both a second voltage application path that applies a voltage to each element in cooperation with the first voltage application path by applying a potential different from the first voltage application path. An electron source driving method for driving an electron source, wherein a time width from a rise to a fall of a modulation signal for modulating a potential of the second voltage application path corresponds to each of a plurality of the elements. When the same voltage is applied to the second voltage application path, the rising timing of the modulation signal is dispersed, and the potential of the second voltage application path is modulated using the dispersed modulation signal. source Dynamic way. 11. The electron source driving method according to claim 10, wherein control is performed such that rising edges of the modulation signals having different time widths are not synchronized. 12. The time width of the modulated signal takes discrete values, and the dispersion is performed within a predetermined time width range, and the predetermined time width is determined by an interval between the discrete values. An electron source driving method according to claim 10 or 11. 13. The dispersion according to claim 10, wherein a delay amount of the modulated signal is stored, and the delay amount is made different from the previously stored delay amount. An electron source driving method as described in the above.