[go: up one dir, main page]

JPH11195909A - Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter - Google Patents

Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter

Info

Publication number
JPH11195909A
JPH11195909A JP10295348A JP29534898A JPH11195909A JP H11195909 A JPH11195909 A JP H11195909A JP 10295348 A JP10295348 A JP 10295348A JP 29534898 A JP29534898 A JP 29534898A JP H11195909 A JPH11195909 A JP H11195909A
Authority
JP
Japan
Prior art keywords
thin
film
dielectric
substrate
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10295348A
Other languages
Japanese (ja)
Inventor
Yoshihiko Goto
義彦 後藤
Masato Kobayashi
真人 小林
Katsuhiko Tanaka
克彦 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP10295348A priority Critical patent/JPH11195909A/en
Publication of JPH11195909A publication Critical patent/JPH11195909A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)
  • Waveguides (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide the thin film multi-layer electrode where each film of the thin film multi-layer electrode is formed flat and the thin film conductor layers are not short-circuited with each other without being affected by an uneven surface of a dielectric substrate even in the case that the thin film multi-layer electrodes are formed on the dielectric substrate whose surface is rugged. SOLUTION: A thin film dielectric layer placed around the surface of a dielectric substrate 2, in the thin film multi-layer electrode 3 that is placed on the dielectric substrate 2 and that is structured by stacking alternately thin film conductors layers 4a-4d and thin film dielectric layers 5a-5c, is formed thick in a degree of absorbing the unevenness of the dielectric substrate 2, and the thin film dielectric layers 5a-5c are made of a dielectric material having a specific dielectric constant derived from a prescribed equation.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、薄膜多層電極、お
よびそれを用いた高周波伝送線路、高周波共振器、高周
波フィルタ等に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin-film multilayer electrode, a high-frequency transmission line using the same, a high-frequency resonator, a high-frequency filter, and the like.

【0002】[0002]

【従来の技術】近年、電子部品の小型化が進む中、マイ
クロ波、準ミリ波またはミリ波などの高周波帯において
も、高誘電率材料を用いることによってデバイスの小型
化が図られている。しかし、高誘電率材料を用いること
によって形状を縮小すると、体積の立方根に反比例して
エネルギー損失が増大するという問題点があった。この
高周波デバイスのエネルギー損失は、表皮効果による導
体損失と、誘電体材料による誘電体損失とに大きく分類
することができるが、近年では、高誘電率のものでも低
損失な特性を有する誘電体材料が実用化されており、従
って、誘電体損失よりも導体損失の方がエネルギー損失
において支配的な割合を占めるようになっている。
2. Description of the Related Art In recent years, as electronic components have been miniaturized, devices have been miniaturized by using high dielectric constant materials even in high frequency bands such as microwaves, quasi-millimeter waves or millimeter waves. However, when the shape is reduced by using the high dielectric constant material, there is a problem that the energy loss increases in inverse proportion to the cubic root of the volume. The energy loss of this high-frequency device can be broadly classified into a conductor loss due to the skin effect and a dielectric loss due to a dielectric material. In recent years, a dielectric material having a high dielectric constant and having a low loss characteristic has been developed. Has been put into practical use, and therefore, conductor loss occupies a more dominant proportion in energy loss than dielectric loss.

【0003】以上のような状況の下、本出願人は国際出
願公開第WO95/06336号公報において、高周波
帯での導体損失を低減しうる電極として薄膜多層電極を
提案し、特定の動作周波数における薄膜多層電極の各層
の最適膜厚の設計方法について開示した。図4は国際出
願公開第WO95/06336号公報で開示した設計方
法を用いて形成した薄膜多層電極103を用いて構成し
た1/2波長線路型共振器101の斜視図である。
Under the circumstances described above, the applicant of the present application has proposed in International Patent Application Publication No. WO95 / 06336 a thin-film multilayer electrode as an electrode capable of reducing conductor loss in a high-frequency band. A method for designing the optimum thickness of each layer of the thin film multilayer electrode has been disclosed. FIG. 4 is a perspective view of a half-wavelength line resonator 101 constituted by using a thin-film multilayer electrode 103 formed by using the design method disclosed in International Publication No. WO95 / 06336.

【0004】1/2波長線路型共振器101は、図4に
示すように、裏面全面に接地導体106の形成された誘
電体基板102上に、長手方向の長さがλg/2(λg
は管内波長)の帯状の薄膜多層電極103が配置されて
構成されている。
As shown in FIG. 4, a half-wavelength line resonator 101 has a longitudinal length of λg / 2 (λg) on a dielectric substrate 102 on which a ground conductor 106 is formed on the entire back surface.
(In-tube wavelength) is arranged and arranged.

【0005】薄膜多層電極103は、図5に示すよう
に、誘電体基板102の表面に薄膜導体層104aが形
成され、次いで薄膜導体層104a上に薄膜誘電体層1
05aが積層配置される。以後、順に薄膜導体層104
b、104c、104d、および薄膜誘電体層105
b、105cが交互に積層配置され、薄膜多層電極10
3が形成されている。この薄膜多層電極103の長手方
向の長さを所望周波数の1/2波長とすることにより、
共振器として機能させている。
As shown in FIG. 5, a thin-film multilayer electrode 103 has a thin-film conductor layer 104a formed on the surface of a dielectric substrate 102, and then has a thin-film dielectric layer 1 on the thin-film conductor layer 104a.
05a are stacked. Thereafter, in order, the thin film conductor layer 104
b, 104c, 104d, and thin film dielectric layer 105
b, 105c are alternately stacked and arranged, and the thin-film multilayer electrode 10
3 are formed. By setting the length in the longitudinal direction of the thin-film multilayer electrode 103 to 波長 wavelength of the desired frequency,
It functions as a resonator.

【0006】このとき、薄膜導体層104aと、接地導
体106、および誘電体基板102とによってTEMモ
ードのマイクロストリップ線路(以下、主伝送線路と呼
ぶ)107が構成される。また、主伝送線路107上
に、薄膜誘電体層105aが一対の薄膜導体層104a
・104bに挟設されて成るTEMモードの副伝送線路
が構成され、同様にして薄膜誘電体層105b・105
cも副伝送線路を構成する。ここで、従来例の薄膜多層
電極103は、国際出願公開第WO95/06336号
公報において開示されている方法を用いて、(a)主伝
送線路107と各副伝送線路を伝搬するそれぞれのTE
M波の位相速度が互いに実質的に一致するように、各薄
膜誘電体層105a・105b・105cの各膜厚と誘
電率εとを設定し、かつ、(b)各薄膜導体層104a
・104b・104cの膜厚をそれぞれ、隣接しあう主
伝送線路107と副伝送線路間、および各副伝送線路間
で、電磁界を互いに結合させるように、使用周波数にお
ける表皮深さより薄い所定の膜厚に設定する。
At this time, the thin-film conductor layer 104a, the ground conductor 106, and the dielectric substrate 102 constitute a TEM mode microstrip line (hereinafter, referred to as a main transmission line) 107. On the main transmission line 107, a thin film dielectric layer 105a is formed by a pair of thin film conductor layers 104a.
A TEM-mode sub-transmission line is sandwiched between the thin-film dielectric layers 105b and 105b.
c also constitutes a sub transmission line. Here, the thin-film multilayer electrode 103 of the conventional example is manufactured by using the method disclosed in International Patent Application Publication No. WO95 / 06336, and (a) the TE transmission through the main transmission line 107 and each of the sub transmission lines.
The thickness of each of the thin film dielectric layers 105a, 105b, and 105c and the dielectric constant ε are set so that the phase velocities of the M waves substantially match each other, and (b) each of the thin film conductor layers 104a
A predetermined film thinner than the skin depth at the operating frequency so that the electromagnetic fields are coupled to each other between the main transmission line 107 and the sub-transmission line and between the sub-transmission lines adjacent to each other. Set to thick.

【0007】これにより、主伝送線路107に流れる高
周波エネルギーの一部を副伝送線路に移行させ、各薄膜
導体膜104a・104b・104c・104dのそれ
ぞれに高周波電流が流れるように構成して、高周波領域
における電極の表皮効果を大幅に抑圧するというもので
ある。
Thus, a part of the high-frequency energy flowing through the main transmission line 107 is transferred to the sub-transmission line, and a high-frequency current flows through each of the thin film conductor films 104a, 104b, 104c, and 104d. That is, the skin effect of the electrode in the region is largely suppressed.

【0008】ここで、国際出願公開第WO95/063
36号公報に開示されている薄膜多層電極は、平坦な表
面を有する誘電体基板102(鏡面研磨の施されたアル
ミナの単結晶からなるサファイア基板が例示されてい
る)上に形成されることを前提として薄膜導体層と薄膜
誘電体層の各膜厚を設定している。
Here, International Application Publication No. WO 95/063
The thin-film multilayer electrode disclosed in Japanese Patent Publication No. 36-136 is formed on a dielectric substrate 102 having a flat surface (an example is a sapphire substrate made of a single crystal of alumina which has been subjected to mirror polishing). As a premise, the respective film thicknesses of the thin film conductor layer and the thin film dielectric layer are set.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、例えば
誘電体基板としてセラミック基板を用いるような場合、
通常その基板表面はポア等の存在により凹凸を有してい
る。この凹凸は、表面研磨処理等によってある程度平坦
化することが可能である。しかし、ポアは基板表面のみ
ならず基板内部にも多数存在するため、研磨処理によっ
て新たなポアが表面に顕在化することになり、基板表面
を充分には平坦化することができない。ここで、凹凸を
有する誘電体基板上に薄膜多層電極を形成した場合の膜
構造を示す断面図を、図6に示す。この場合、図6から
わかるように、薄膜多層電極を構成する各薄膜導体層お
よび各薄膜誘電体層も、基板の凹凸に対応して凹凸を有
するものとなる。このように各層が凹凸を持って形成さ
れると、当初の設計通りに主伝送線路および各副伝送線
路を伝搬するTEM波の位相速度を一致させることがで
きなくなる。また、凹凸を有する基板上に薄膜を積層す
る場合、成膜プロセス上、隣接する薄膜導体層同士が短
絡する恐れが非常に高くなる。これらの事態は、いずれ
も薄膜多層電極の有する表皮効果の抑制効果を大幅に劣
化させてしまう。
However, for example, when a ceramic substrate is used as a dielectric substrate,
Usually, the substrate surface has irregularities due to the presence of pores and the like. These irregularities can be flattened to some extent by surface polishing or the like. However, since a large number of pores exist not only on the substrate surface but also inside the substrate, new pores become apparent on the surface by the polishing treatment, and the substrate surface cannot be sufficiently planarized. Here, FIG. 6 is a cross-sectional view showing a film structure when a thin-film multilayer electrode is formed on a dielectric substrate having irregularities. In this case, as can be seen from FIG. 6, each thin-film conductor layer and each thin-film dielectric layer constituting the thin-film multilayer electrode also have irregularities corresponding to the irregularities of the substrate. If each layer is formed with irregularities in this manner, it becomes impossible to match the phase speeds of the TEM waves propagating through the main transmission line and the sub transmission lines as originally designed. In addition, when a thin film is stacked on a substrate having irregularities, the risk of short-circuiting between adjacent thin film conductor layers becomes extremely high in the film formation process. All of these situations greatly deteriorate the effect of suppressing the skin effect of the thin-film multilayer electrode.

【0010】従って本発明の目的は、上述の技術的問題
点を解決するためになされたものであって、基板表面に
凹凸を有する誘電体基板上に薄膜多層電極を形成する場
合であっても、基板表面の凹凸の影響を受けることなく
薄膜多層電極を構成する各膜が平坦に形成され、また各
薄膜導体層同士が短絡しない薄膜多層電極を提供するこ
とにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to solve the above-mentioned technical problems, and is intended to be applied to a case where a thin film multilayer electrode is formed on a dielectric substrate having an uneven surface. It is another object of the present invention to provide a thin-film multilayer electrode in which the respective films constituting the thin-film multilayer electrode are formed flat without being affected by the unevenness of the substrate surface, and the thin-film conductor layers are not short-circuited.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、本発明の薄膜多層電極においては、一方主面に接地
導体の形成された誘電体基板の他方主面上に配置され複
数の薄膜導体層と薄膜誘電体層とが交互に積層されて構
成される薄膜多層電極において、前記接地導体と、前記
誘電体基板と、前記誘電体基板に接して設けられている
一層目の前記薄膜導体層とにより主伝送線路が構成さ
れ、前記薄膜誘電体層と、その薄膜誘電体層を挟んでい
る一対の薄膜導体層とにより副伝送線路が構成され、前
記主伝送線路と前記副伝送線路を伝搬するそれぞれの高
周波の位相速度が実質的に一致するように各薄膜誘電体
層の膜厚と誘電率が設定されており、それぞれ隣接し合
う主伝送線路と副伝送線路間および各副伝送線路間で、
互いに電磁界が結合するように、各薄膜導体層の膜厚が
動作周波数における表皮深さよりも薄い所定の膜厚に設
定されており、前記誘電体基板の基板表面に最も近い薄
膜誘電体層の膜厚が他の薄膜誘電体層の膜厚よりも厚く
形成されている。このとき、誘電体基板の基板表面に最
も近い薄膜誘電体層の膜厚を厚く形成するに際しては、
以下に示す式(1)から導かれる比誘電率を有する誘電
体材料を用いる。
In order to achieve the above object, a thin-film multilayer electrode according to the present invention comprises a plurality of thin-film electrodes arranged on the other main surface of a dielectric substrate having a ground conductor formed on one main surface. In a thin-film multilayer electrode formed by alternately stacking conductor layers and thin-film dielectric layers, the ground conductor, the dielectric substrate, and the first-layer thin-film conductor provided in contact with the dielectric substrate The main transmission line is constituted by the layers, the sub-transmission line is constituted by the thin-film dielectric layer, and a pair of thin-film conductor layers sandwiching the thin-film dielectric layer, and the main transmission line and the sub-transmission line are formed. The thickness and permittivity of each thin-film dielectric layer are set so that the phase velocities of the respective high-frequency waves to propagate substantially coincide with each other, and between the adjacent main transmission line and sub-transmission line and each sub-transmission line. Between,
The thickness of each thin film conductor layer is set to a predetermined thickness smaller than the skin depth at the operating frequency so that electromagnetic fields are coupled to each other, and the thickness of the thin film dielectric layer closest to the substrate surface of the dielectric substrate is set. The film thickness is formed larger than the film thickness of the other thin film dielectric layers. At this time, when forming the thin film dielectric layer closest to the substrate surface of the dielectric substrate to be thick,
A dielectric material having a relative dielectric constant derived from the following equation (1) is used.

【0012】[0012]

【数2】 (Equation 2)

【0013】以上のような構成を採用することにより、
誘電体基板表面の凹凸の影響を緩和させたうえで薄膜多
層電極を形成することができ、主伝送線路および各副伝
送線路を伝搬する高周波の位相速度を当初の設計通りに
一致させることができる。また、膜厚を厚く形成するこ
とにより基板の凹凸を吸収したかたちで薄膜誘電体層を
形成することができるので、成膜プロセスにおいて薄膜
導体層同士が短絡する恐れがなくなる。なお、膜厚を厚
く形成する薄膜誘電体層は、基板表面に最も近い1層目
の薄膜誘電体層のみに限定する必要はない。必要に応じ
て、基板付近に位置する複数層の薄膜誘電体層にわたっ
てその膜厚を調整しても構わない。
By adopting the above configuration,
A thin-film multilayer electrode can be formed after alleviating the influence of irregularities on the surface of the dielectric substrate, and the phase velocities of the high-frequency waves propagating through the main transmission line and each sub-transmission line can be matched as originally designed. . In addition, since the thin film dielectric layer can be formed by absorbing the unevenness of the substrate by forming the film thick, there is no possibility that the thin film conductor layers are short-circuited in the film forming process. It is not necessary to limit the thin film dielectric layer having a large thickness to the first thin film dielectric layer closest to the substrate surface. If necessary, the film thickness may be adjusted over a plurality of thin film dielectric layers located near the substrate.

【0014】また、上述の薄膜多層電極を用いて 高周
波伝送線路、高周波共振器、および高周波フィルタを構
成するより、凹凸を有する基板上においても、当初の設
計値通りの低損失動作をする薄膜多層電極を有する高周
波伝送線路、高周波共振器、および高周波フィルタを得
られる。
Further, a high-frequency transmission line, a high-frequency resonator, and a high-frequency filter are formed using the above-described thin-film multilayer electrodes. A high-frequency transmission line having electrodes, a high-frequency resonator, and a high-frequency filter can be obtained.

【0015】[0015]

【発明の実施の形態】以下、本発明の実施の形態を図を
参照して詳細に説明する。
Embodiments of the present invention will be described below in detail with reference to the drawings.

【0016】[第1実施例、図1〜図2]本発明の第1
実施例の薄膜多層電極を、図1、図2を参照しながら説
明する。
[First Embodiment, FIGS. 1-2] First Embodiment of the Present Invention
The thin film multilayer electrode of the embodiment will be described with reference to FIGS.

【0017】図1は薄膜多層電極3を用いて構成した1
/2波長線路型共振器1の斜視図である。1/2波長線
路型共振器1は、裏面全面に接地導体6の形成された誘
電体基板2上に、長手方向の長さがλg/2(λgは管
内波長)の帯状の薄膜多層電極3が配置されて構成され
ている。
FIG. 1 shows a structure 1 using a thin film multilayer electrode 3.
FIG. 2 is a perspective view of a half-wavelength line resonator 1. A 波長 wavelength line resonator 1 is a band-shaped thin film multilayer electrode 3 having a longitudinal length of λg / 2 (λg is a guide wavelength) on a dielectric substrate 2 having a ground conductor 6 formed on the entire back surface. Are arranged and configured.

【0018】誘電体基板2は(Zn、Sn)TiO4
主成分とする比誘電率38の誘電体セラミック基板であ
り、基板中には直径1.0μm程度のポアが多数存在し
ている。誘電体基板2の表面は、ポアの存在等により高
さ幅1μm程度の凹凸を有している。
The dielectric substrate 2 is a dielectric ceramic substrate containing (Zn, Sn) TiO 4 as a main component and having a relative dielectric constant of 38, and a large number of pores having a diameter of about 1.0 μm are present in the substrate. The surface of the dielectric substrate 2 has irregularities with a height and width of about 1 μm due to the presence of pores and the like.

【0019】誘電体基板2上には、図2に示す積層構造
を有する薄膜多層電極3が形成されている。薄膜多層電
極3はCu等の金属材料からなる薄膜導体層4a、4
b、4c、4dと、SiO2等の誘電体材料からなる薄
膜誘電体層5a、5b、5cとが交互に積層されて構成
されている。各層の成膜は、スパッタリング等の手法で
成膜すればよい。
On the dielectric substrate 2, a thin-film multilayer electrode 3 having a laminated structure shown in FIG. 2 is formed. The thin-film multilayer electrode 3 has thin-film conductor layers 4a and 4 made of a metal material such as Cu.
b, 4c, 4d and thin film dielectric layers 5a, 5b, 5c made of a dielectric material such as SiO 2 are alternately laminated. The layers may be formed by a technique such as sputtering.

【0020】ここで、3GHzの周波数で動作させる場
合の本実施例の薄膜多層電極3の膜構成を表1に示す。
Table 1 shows the film configuration of the thin-film multilayer electrode 3 of the present embodiment when operated at a frequency of 3 GHz.

【0021】[0021]

【表1】 [Table 1]

【0022】なお比較例として、同じく3GHzの周波
数で動作させる場合の薄膜多層電極であって、薄膜誘電
体層に比誘電率4のSiO2のみを用いる場合の各膜の
膜厚につき、国際出願公開第WO95/06336号公
報において開示されている方法を用いて膜厚設計した設
計値を以下の表2に示しておく。
As a comparative example, the thickness of each thin-film multi-layer electrode in the case of operating at a frequency of 3 GHz and using only SiO 2 having a relative dielectric constant of 4 as the thin-film dielectric layer is described in International Patent Application No. Table 2 below shows design values obtained by designing the film thickness using the method disclosed in the publication WO95 / 06336.

【0023】[0023]

【表2】 [Table 2]

【0024】表1からわかるように、本実施例の薄膜多
層電極3においては、誘電体基板2の基板表面に最も近
い1層目の薄膜誘電体層5aの膜厚が他の薄膜誘電体層
5b、5cに比べてかなり厚く形成されている。これ
は、膜厚を厚く形成することによって誘電体基板2の表
面の凹凸を平坦化するためである。
As can be seen from Table 1, in the thin-film multilayer electrode 3 of this embodiment, the first thin-film dielectric layer 5a closest to the substrate surface of the dielectric substrate 2 has a different thickness from the other thin-film dielectric layers. It is formed much thicker than 5b and 5c. This is because the unevenness on the surface of the dielectric substrate 2 is flattened by forming a thick film.

【0025】なお、誘電体基板の表面を凹凸を平坦化す
るためには、その凹凸の高さ幅の約1.5倍程度の厚み
分、基板表面から成膜する必要があることを我々は経験
則上見出した。従って本実施例の場合、基板表面から
1.5μm程度成膜した時点で平坦化された膜が得られ
ることになるので、1層目の薄膜導体層4aの膜厚が
0.53μmであることから、薄膜誘電体層5aとして
は1.0μm程度以上の膜厚に形成すれば平坦化された
膜が得られることになる。
It should be noted that in order to flatten the surface of the dielectric substrate with irregularities, it is necessary to form a film about 1.5 times the height and width of the irregularities from the substrate surface. I found it as a rule of thumb. Therefore, in the case of the present embodiment, a flattened film is obtained when the film is formed to a thickness of about 1.5 μm from the substrate surface. Therefore, the film thickness of the first thin-film conductor layer 4a must be 0.53 μm. Therefore, if the thin film dielectric layer 5a is formed to a thickness of about 1.0 μm or more, a flattened film can be obtained.

【0026】ところで、薄膜誘電体層5aの膜厚を上述
のように厚く形成するに際しては、膜厚の変更と同時に
使用する誘電体材料も変更しなければならない。すなわ
ち、薄膜誘電体層の膜厚を変化させると、その薄膜誘電
体層が構成する伝送線路を伝搬するTEM波の位相速度
が変化する。このように、ある伝送線路を伝搬するTE
M波の位相速度が変化して、他の伝送線路を伝搬するT
EM波の位相速度との間にズレが生じると、薄膜多層電
極は所望の低損失動作を実現できなくなってしまう。従
って、薄膜誘電体層の膜厚の変更に際しては、用いる誘
電体材料の比誘電率を調整して、各伝送線路を伝搬する
TEM波同士の位相速度を実質的に一致させる必要があ
る(なお、本実施例のように膜厚を厚く形成する場合に
は、当初用いていた材料の誘電率よりも高い誘電率の誘
電体材料を用いることになる)。そして、現在の膜厚に
応じた最適な比誘電率の決定には、以下の比例式(1)
を用いれば良い。
When the thickness of the thin-film dielectric layer 5a is increased as described above, the dielectric material to be used must be changed simultaneously with the change of the thickness. That is, when the thickness of the thin film dielectric layer is changed, the phase speed of the TEM wave propagating through the transmission line formed by the thin film dielectric layer changes. Thus, a TE that propagates through a certain transmission line
The phase velocity of the M wave changes and T propagates through another transmission line.
If there is a deviation from the phase velocity of the EM wave, the thin film multilayer electrode cannot achieve the desired low-loss operation. Therefore, when changing the thickness of the thin-film dielectric layer, it is necessary to adjust the relative permittivity of the dielectric material used so that the phase velocities of the TEM waves propagating through each transmission line are substantially equal (note that the velocities are the same). In the case of forming a thick film as in this embodiment, a dielectric material having a higher dielectric constant than the initially used material is used.) In order to determine the optimum relative dielectric constant according to the current film thickness, the following proportional expression (1) is used.
May be used.

【0027】[0027]

【数3】 (Equation 3)

【0028】すなわち今、国際出願公開第WO95/0
6336号公報において開示されている方法に従って膜
厚設計を行うことにより、比誘電率38の基板上に比誘
電率4のSiO2で薄膜誘電体層を形成する場合、膜厚
を0.4μmに設定することで各伝送線路間の位相速度
を一致させることができることが導き出せる(表2を参
照)から、式(1)で表される比例式を用いることによ
り、比誘電率38の基板上に膜厚1.0μm程度の薄膜
誘電体層を形成する場合、比誘電率が10程度の誘電体
材料を用いれば位相速度を一致させることができること
が導きだせる。従って、薄膜誘電体層5aの膜設計とし
ては、比誘電率が10の誘電体材料、例えばAl2
3を、厚さ1.22μmの膜厚で形成すればよいことが
判明する。
That is, now, International Application Publication No. WO 95/0
By forming the film thickness in accordance with the method disclosed in JP-A-6336, when forming a thin-film dielectric layer of SiO 2 having a relative dielectric constant of 4 on a substrate having a relative dielectric constant of 38, the thickness is reduced to 0.4 μm. It can be deduced that the setting allows the phase velocities between the transmission lines to be matched (see Table 2). Therefore, by using the proportional expression represented by Expression (1), When a thin film dielectric layer having a thickness of about 1.0 μm is formed, it can be understood that the phase speed can be matched by using a dielectric material having a relative dielectric constant of about 10. Therefore, as a film design of the thin film dielectric layer 5a, a dielectric material having a relative dielectric constant of 10, for example, Al 2 O
3, it is found that may be formed to a thickness of a thickness of 1.22 .mu.m.

【0029】このように、誘電体基板付近の薄膜誘電体
層を、基板表面の凹凸が平坦化される程度に厚く形成
し、かつその際に上記比例式(1)を満足させる値に膜
厚および比誘電率を設定することにより、基板の凹凸の
影響を吸収して薄膜多層電極を形成でき、各伝送線路を
伝搬するTEM波の位相速度を一致させることができ
る。また、膜厚を厚くすることにより凹凸が平坦化され
ているので、成膜プロセスにおいて薄膜導体層同士が短
絡する恐れが非常に低くなる。
As described above, the thin film dielectric layer in the vicinity of the dielectric substrate is formed so thick that the unevenness on the substrate surface is flattened, and at this time, the film thickness is set to a value satisfying the above proportional expression (1). By setting the relative permittivity and the relative permittivity, it is possible to form the thin film multilayer electrode by absorbing the influence of the unevenness of the substrate, and to make the phase speeds of the TEM waves propagating through the respective transmission lines coincide. Further, since the unevenness is flattened by increasing the film thickness, the risk of short circuit between the thin film conductor layers in the film forming process is extremely reduced.

【0030】[第2実施例、図3]本発明の第2実施例
の薄膜多層電極を、図3を参照して説明する。
Second Embodiment, FIG. 3 A thin film multilayer electrode according to a second embodiment of the present invention will be described with reference to FIG.

【0031】本実施例においては、使用する誘電体基板
のポアの大きさが直径2.0μm程度の大きさであり、
誘電体基板12の表面は、高さ幅2.0μm程度の凹凸
を有している。従って、基板表面の表面の凹凸を平坦化
するためには、その1.5倍程度の厚み分、ずなわち基
板表面から3.0μm程度成膜する必要がある。
In the present embodiment, the pore size of the dielectric substrate used is about 2.0 μm in diameter,
The surface of the dielectric substrate 12 has unevenness with a height of about 2.0 μm. Therefore, in order to flatten the unevenness on the surface of the substrate, it is necessary to form a film about 1.5 times as thick as that, that is, about 3.0 μm from the substrate surface.

【0032】ここで、3GHzの周波数で動作させる場
合の薄膜多層電極13の膜構成を表3に示す。
Table 3 shows the film configuration of the thin-film multilayer electrode 13 when operated at a frequency of 3 GHz.

【0033】[0033]

【表3】 [Table 3]

【0034】表3からわかるように、本実施例の薄膜多
層電極13においては、誘電体基板12に近い側から2
層の薄膜誘電体層15a、15bの膜厚をそれぞれ他の
薄膜誘電体層の膜厚よりも厚く形成するより、誘電体基
板12の表面の凹凸を吸収している。
As can be seen from Table 3, in the thin-film multilayer electrode 13 of the present embodiment, two
The unevenness on the surface of the dielectric substrate 12 is absorbed by forming the thin film dielectric layers 15a and 15b of each layer thicker than the other thin film dielectric layers.

【0035】なお本実施例においても、第1実施例の場
合と同様に誘電体基板に最も近い薄膜誘電体層15aの
みの厚みを厚く形成して基板表面の凹凸を平坦化するこ
とも可能である。その場合、1層目の薄膜誘電体層15
aの膜厚を約2.5μm程度の厚みに形成する必要があ
るが、膜厚2.5μmで位相速度を他の伝送線路と一致
させるためには、上述の比例式(1)より、比誘電率が
16の誘電体材料を用いる必要があることが導き出せ
る。しかし、比誘電率が16で低損失かつスパッタリン
グ成膜に適した誘電体材料は現在のところ存在しない。
従って、このような場合には、基板表面付近の複数層の
薄膜誘電体層の膜厚を調整することによって、好適なス
パッタリング材料を用いて基板の表面の凹凸を吸収すれ
ばよい。この場合、基板表面に最も近い薄膜誘電体層で
は、第1実施例の場合のように基板表面の凹凸を完全に
平坦化するには至らない(若干の凹凸が残る)が、基板
自体の有する凹凸は相当程度まで吸収することができ、
実用上の問題は生じない。
In this embodiment, as in the case of the first embodiment, only the thin film dielectric layer 15a closest to the dielectric substrate can be formed to have a large thickness to flatten the unevenness of the substrate surface. is there. In that case, the first thin film dielectric layer 15
It is necessary to form the film thickness of about a to a thickness of about 2.5 μm. However, in order to make the phase velocity equal to that of another transmission line at the film thickness of 2.5 μm, the ratio is calculated from the above-mentioned proportional expression (1). It can be derived that it is necessary to use a dielectric material having a dielectric constant of 16. However, a dielectric material having a relative dielectric constant of 16 and having low loss and suitable for sputtering film formation does not exist at present.
Therefore, in such a case, by adjusting the film thicknesses of the plurality of thin film dielectric layers near the substrate surface, the irregularities on the substrate surface may be absorbed using a suitable sputtering material. In this case, the thin film dielectric layer closest to the substrate surface does not completely flatten the unevenness on the substrate surface as in the first embodiment (some unevenness remains), but the substrate itself has Unevenness can be absorbed to a considerable extent,
There is no practical problem.

【0036】[その他の実施例]なお、本発明は上述の
実施例に限定されるものではなく、その趣旨の範囲内で
種々に変形しうるものである。例えば上述の各実施例に
おいては、本発明の薄膜多層電極を用いた高周波共振器
(1/2波長線路型共振器)を例にとって説明したが、
該共振器に図1の符号8に示すような入出力電極を設け
ることにより、高周波フィルタとして機能させることも
可能である。その際には、複数の共振器を誘電体基板上
に配置して多段フィルタを構成することも可能である。
また、共振器やフィルタとしてだけでなく、本発明の薄
膜多層電極をマイクロストリップ線路等の伝送線路とし
て使用することも可能である。さらに、上述の各実施例
においては伝搬される高周波がTEM波の場合で説明し
たが、その他のモードの高周波、例えばTMモードの高
周波等の伝搬についても本発明は同様に適用しうる。
[Other Embodiments] The present invention is not limited to the above-described embodiments, but can be variously modified within the scope of the invention. For example, in each of the above-described embodiments, the high-frequency resonator (1 / wavelength line type resonator) using the thin film multilayer electrode of the present invention has been described as an example.
By providing an input / output electrode as shown by reference numeral 8 in FIG. 1 to the resonator, it is possible to function as a high-frequency filter. In that case, it is also possible to arrange a plurality of resonators on a dielectric substrate to form a multi-stage filter.
Further, the thin film multilayer electrode of the present invention can be used not only as a resonator or a filter but also as a transmission line such as a microstrip line. Further, in each of the embodiments described above, the case where the propagated high frequency is a TEM wave has been described. However, the present invention can be similarly applied to propagation of a high frequency of another mode, for example, a high frequency of a TM mode.

【0037】[0037]

【発明の効果】以上の説明から明らかなように、本発明
の薄膜多層電極によった場合、以下の優れた効果が得ら
れる。
As is clear from the above description, the following excellent effects can be obtained with the thin film multilayer electrode of the present invention.

【0038】すなわち、使用する誘電体材料の比誘電率
を上記比例式(1)に従って選択しつつ、誘電体基板付
近の薄膜誘電体層の膜厚を厚く形成することにより、基
板の凹凸の影響を吸収したかたちで薄膜多層電極を形成
でき、各伝送線路を伝搬する高周波の位相速度を当初の
設計通りに互いに一致させることができる。また、基板
の凹凸が吸収、平坦化されているので、各層の成膜プロ
セスにおいて薄膜導体層同士が短絡する恐れがなくな
る。また、上記比例式(1)に従って膜厚を調整する薄
膜誘電体層は、基板表面に最も近い薄膜誘電体層に限ら
れず、必要に応じて、複数層の薄膜誘電体層の膜厚を調
整することもできる。これにより、基板の凹凸の平坦化
に際して用いることのできる誘電体材料の選択の幅を広
げることができる。
That is, the relative dielectric constant of the dielectric material to be used is selected in accordance with the above-mentioned proportional expression (1), and the thickness of the thin film dielectric layer near the dielectric substrate is increased, thereby causing the influence of the unevenness of the substrate. The thin-film multilayer electrode can be formed in the form of absorbing the above, and the phase velocities of the high-frequency waves propagating through the respective transmission lines can be matched with each other as originally designed. Further, since the unevenness of the substrate is absorbed and flattened, there is no possibility that the thin film conductor layers are short-circuited in the process of forming each layer. Further, the thin film dielectric layer whose film thickness is adjusted in accordance with the above-mentioned proportional expression (1) is not limited to the thin film dielectric layer closest to the substrate surface, and the film thickness of a plurality of thin film dielectric layers is adjusted as necessary. You can also. Thereby, the range of choice of the dielectric material that can be used for flattening the unevenness of the substrate can be expanded.

【0039】また上述の薄膜多層電極を用いれば、薄膜
多層電極の本来の低損失動作を実現する高周波伝送線
路、高周波共振器、および高周波フィルタを実現するこ
とができる。
When the above-described thin film multilayer electrode is used, a high-frequency transmission line, a high-frequency resonator and a high-frequency filter realizing the inherent low-loss operation of the thin-film multilayer electrode can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1実施例の、薄膜多層電極を用いて
構成した共振器を示す斜視図である。
FIG. 1 is a perspective view showing a resonator constituted by using thin-film multilayer electrodes according to a first embodiment of the present invention.

【図2】第1実施例の薄膜多層電極を、凹凸を有する誘
電体基板上に形成した様子を示す断面図である。
FIG. 2 is a sectional view showing a state in which the thin-film multilayer electrode of the first embodiment is formed on a dielectric substrate having irregularities.

【図3】第2実施例の薄膜多層電極を、凹凸を有する誘
電体基板上に形成した様子を示す断面図である。
FIG. 3 is a cross-sectional view showing a state in which a thin-film multilayer electrode according to a second embodiment is formed on a dielectric substrate having irregularities.

【図4】従来例の、薄膜多層電極を用いて構成した共振
器を示す斜視図である。
FIG. 4 is a perspective view showing a conventional resonator constituted by using thin-film multilayer electrodes.

【図5】従来例の薄膜多層電極を、誘電体基板上に形成
した様子を示す断面図である。
FIG. 5 is a cross-sectional view showing a state in which a conventional thin-film multilayer electrode is formed on a dielectric substrate.

【図6】従来例の薄膜多層電極を、凹凸を有する誘電体
基板上に形成した様子を示す断面図である。
FIG. 6 is a cross-sectional view showing a state in which a conventional thin-film multilayer electrode is formed on a dielectric substrate having irregularities.

【符号の説明】[Explanation of symbols]

1 ・・・ 1/2波長線路型共振器 2 ・・・ 誘電体基板 3 ・・・ 薄膜多層電極 4a、4b、4c、4d ・・・ 薄膜導体層 5a、5b、5c ・・・ 薄膜誘電体層 6 ・・・ 接地導体 7 ・・・ 主伝送線路 8 ・・・ 入出力電極 DESCRIPTION OF SYMBOLS 1 ... 1/2 wavelength line type resonator 2 ... Dielectric substrate 3 ... Thin film multilayer electrode 4a, 4b, 4c, 4d ... Thin film conductor layer 5a, 5b, 5c ... Thin film dielectric Layer 6: ground conductor 7: main transmission line 8: input / output electrode

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 一方主面に接地導体の形成された誘電体
基板の他方主面上に配置され、複数の薄膜導体層と薄膜
誘電体層とが交互に積層されて構成される薄膜多層電極
において、 前記接地導体と、前記誘電体基板と、前記誘電体基板に
接して設けられている一層目の前記薄膜導体層とにより
主伝送線路が構成され、 前記薄膜誘電体層と、その薄膜誘電体層を挟んでいる一
対の薄膜導体層とにより副伝送線路が構成され、 前記主伝送線路と前記副伝送線路を伝搬するそれぞれの
高周波の位相速度が実質的に一致するように各薄膜誘電
体層の膜厚と誘電率が設定されており、 それぞれ隣接し合う主伝送線路と副伝送線路間および各
副伝送線路間で、互いに電磁界が結合するように、各薄
膜導体層の膜厚が動作周波数における表皮深さよりも薄
く設定されており、 前記誘電体基板の基板表面に最も近い薄膜誘電体層の膜
厚を、他の薄膜誘電体層の膜厚よりも厚く形成したこと
を特徴とする薄膜多層電極。
1. A thin film multi-layer electrode which is arranged on the other main surface of a dielectric substrate having a ground conductor formed on one main surface, and is constituted by alternately laminating a plurality of thin film conductor layers and thin film dielectric layers. In the above, a main transmission line is constituted by the ground conductor, the dielectric substrate, and the first thin-film conductor layer provided in contact with the dielectric substrate, and the thin-film dielectric layer and the thin-film dielectric A sub-transmission line is constituted by a pair of thin-film conductor layers sandwiching the body layer, and each of the thin-film dielectrics is arranged such that the phase velocities of the respective high-frequency waves propagating through the main transmission line and the sub-transmission line substantially match. The thickness and dielectric constant of the layers are set, and the thickness of each thin-film conductor layer is set so that electromagnetic fields are mutually coupled between the adjacent main transmission line and sub-transmission line and between each sub-transmission line. Thinner than skin depth at operating frequency It is constant, thin-film multilayer electrode, wherein the thickness of the dielectric substrate closest thin-film dielectric layer on the substrate surface was formed thicker than the other thin film dielectric layer.
【請求項2】 前記誘電体基板の基板表面に最も近い薄
膜誘電体層は、他の薄膜誘電体層を構成する誘電体材料
よりも高い誘電率を有する誘電体材料からなることを特
徴とする請求項1に記載の薄膜多層電極。
2. The thin film dielectric layer closest to the substrate surface of the dielectric substrate is made of a dielectric material having a higher dielectric constant than the dielectric material forming the other thin film dielectric layers. The thin-film multilayer electrode according to claim 1.
【請求項3】 前記誘電体基板に接して設けられている
一層目の薄膜導体層の膜厚と、前記誘電体基板の基板表
面に最も近い薄膜誘電体層の膜厚の和が、誘電体基板の
表面に存在するポアの直径の平均値の少なくとも1.5
倍の厚みを有してなることを特徴とする請求項1または
請求項2に記載の薄膜多層電極。
3. The sum of the thickness of a first thin-film conductor layer provided in contact with the dielectric substrate and the thickness of a thin-film dielectric layer closest to the substrate surface of the dielectric substrate is a dielectric material. At least 1.5 of the average diameter of the pores present on the surface of the substrate
3. The thin-film multilayer electrode according to claim 1, wherein the thin-film multilayer electrode has twice the thickness.
【請求項4】 前記誘電体基板の基板表面に最も近い薄
膜誘電体層、および前記誘電体基板の基板表面に2番目
に近い薄膜誘電体層の膜厚を、それぞれ他の薄膜誘電体
層の膜厚よりも厚く形成したことを特徴とする請求項1
ないし請求項3に記載の薄膜多層電極。
4. The thickness of the thin film dielectric layer closest to the substrate surface of the dielectric substrate and the thickness of the thin film dielectric layer second closest to the substrate surface of the dielectric substrate are respectively set to the other thin film dielectric layers. 2. A film according to claim 1, wherein said film is formed thicker than said film thickness.
A thin-film multilayer electrode according to claim 3.
【請求項5】 誘電体基板上に配置され、薄膜導体層と
薄膜誘電体層とが交互に積層されて構成される薄膜多層
電極において、 前記誘電体基板の表面付近に位置する薄膜誘電体層に関
して、誘電体基板の有する凹凸を吸収する程度にその膜
厚を厚く形成するとともに、その薄膜誘電体層を式
(1)から導かれる比誘電率を有する誘電体材料で形成
することを特徴とする薄膜多層電極。 【数1】
5. A thin-film multilayer electrode which is disposed on a dielectric substrate and is formed by alternately laminating thin-film conductor layers and thin-film dielectric layers, wherein the thin-film dielectric layer located near the surface of the dielectric substrate With respect to the above, it is characterized in that the film thickness is formed thick enough to absorb the irregularities of the dielectric substrate, and the thin film dielectric layer is formed of a dielectric material having a relative permittivity derived from the formula (1). Thin film multilayer electrode. (Equation 1)
【請求項6】 前記誘電体基板の基板表面に最も近い薄
膜誘電体層に関して、誘電体基板の有する凹凸を平坦化
する程度にその膜厚を厚く形成するとともに、その薄膜
誘電体層を上記式(1)から導かれる比誘電率を有する
誘電体材料で形成することを特徴とする請求項1記載の
薄膜多層電極。
6. A thin film dielectric layer closest to the substrate surface of the dielectric substrate is formed to be thick enough to flatten the unevenness of the dielectric substrate, and the thin film dielectric layer is formed by the above formula. 2. The thin film multilayer electrode according to claim 1, wherein the electrode is formed of a dielectric material having a relative dielectric constant derived from (1).
【請求項7】 誘電体基板の少なくとも一方の面に、請
求項1ないし請求項6記載の薄膜多層電極が、所定の形
状に形成されてなることを特徴とする高周波伝送線路。
7. A high-frequency transmission line characterized in that the thin-film multilayer electrode according to claim 1 is formed in a predetermined shape on at least one surface of a dielectric substrate.
【請求項8】 誘電体基板の少なくとも一方の面に、請
求項1または請求項6記載の薄膜多層電極が、所定の形
状に形成されてなることを特徴とする高周波共振器。
8. A high-frequency resonator characterized in that the thin-film multilayer electrode according to claim 1 or 6 is formed in a predetermined shape on at least one surface of a dielectric substrate.
【請求項9】 請求項8に記載の高周波共振器に入出力
端子を備えてなることを特徴とする高周波フィルタ。
9. A high-frequency filter comprising the high-frequency resonator according to claim 8 and an input / output terminal.
JP10295348A 1997-10-21 1998-10-16 Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter Pending JPH11195909A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10295348A JPH11195909A (en) 1997-10-21 1998-10-16 Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP28874897 1997-10-21
JP9-288748 1997-10-21
JP10295348A JPH11195909A (en) 1997-10-21 1998-10-16 Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter

Publications (1)

Publication Number Publication Date
JPH11195909A true JPH11195909A (en) 1999-07-21

Family

ID=26557311

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10295348A Pending JPH11195909A (en) 1997-10-21 1998-10-16 Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter

Country Status (1)

Country Link
JP (1) JPH11195909A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100517071B1 (en) * 2001-09-27 2005-09-26 가부시키가이샤 무라타 세이사쿠쇼 Resonator, filter, duplexer, and high-frequency circuit apparatus
US7345326B2 (en) 2002-05-24 2008-03-18 National Institute Of Advanced Industrial Science And Technology Electric signal transmission line
EP2887448A1 (en) * 2013-12-20 2015-06-24 Thales Microwave interconnection device
EP3127153A1 (en) * 2014-04-01 2017-02-08 Xilinx, Inc. Thin profile metal trace to suppress skin effect and extend package interconnect bandwidth
JPWO2021106442A1 (en) * 2019-11-29 2021-06-03

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100517071B1 (en) * 2001-09-27 2005-09-26 가부시키가이샤 무라타 세이사쿠쇼 Resonator, filter, duplexer, and high-frequency circuit apparatus
US7345326B2 (en) 2002-05-24 2008-03-18 National Institute Of Advanced Industrial Science And Technology Electric signal transmission line
EP2887448A1 (en) * 2013-12-20 2015-06-24 Thales Microwave interconnection device
US9232631B2 (en) 2013-12-20 2016-01-05 Thales Hyperfrequency interconnection device
EP3127153A1 (en) * 2014-04-01 2017-02-08 Xilinx, Inc. Thin profile metal trace to suppress skin effect and extend package interconnect bandwidth
JPWO2021106442A1 (en) * 2019-11-29 2021-06-03

Similar Documents

Publication Publication Date Title
US4963844A (en) Dielectric waveguide-type filter
WO1995006336A1 (en) Thin-film multilayer electrode of high frequency electromagnetic field coupling
EP1376744B1 (en) High efficiency coupled line filters
KR101430994B1 (en) Compact and Light Duplexers with the SIW-based layered waveguide structure for satellite communications terminals
JP5296886B2 (en) Tunable microwave device
JP3087651B2 (en) Thin film multilayer electrode, high frequency transmission line, high frequency resonator and high frequency filter
JP2002532889A (en) Electrically tunable filter with dielectric varactor
KR100217462B1 (en) Thin-film multilayered electrode
JP2012510740A5 (en)
JP2008271295A (en) Connection structure of microstrip line and laminated waveguide line and wiring board having the same
MXPA97004058A (en) Electrode of thin film, of multiple layers, high frequency transmission line, high frequency resonator and high frequency filter
US5920244A (en) Thin-film multilayered electrode, high-frequency resonator, and high-frequency transmission line
RU2352032C1 (en) Strip resonator
JPH1075108A (en) Dielectric waveguide line and wiring board
JPH11195909A (en) Thin film multi-layer electrode, high frequency transmission line, high frequency resonator and high frequency filter
US6052043A (en) Thin-film multilayered electrode, high-frequency transmission line, high-frequency resonator, and high-frequency filter
JP2008099060A (en) Laminated dielectric band pass filter
CN115020946B (en) S-shaped metal structure band stop filter with cutout
KR100651724B1 (en) Horizontal Capacitor and Ultra-High Frequency Variable Device
US11095038B2 (en) Polarization control plate
JPH09326608A (en) Thin film multilayer electrode, high frequency transmission line, high frequency resonator and high frequency filter
US20200127357A1 (en) Composite Substrate for a Waveguide and Method of Manufacturing a Composite Substrate
Tong et al. Left-handed L-band notch bandstop filter with significantly reduced size
EP0957530B1 (en) Dielectric resonator, dielectric filter, dielectric duplexer, and method for manufacturing dielectric resonator
JPH1188015A (en) Magnetic thin film multilayer electrode, high frequency transmission line, high frequency resonator and high frequency device