JPH11186438A - Semiconductor device - Google Patents

Abstract

[PROBLEMS] To provide a semiconductor device capable of reducing warpage of a TAB substrate at low cost. A semiconductor device according to the present invention includes a TAB tape (1).
Stiffener 2 made of sheet metal to be attached to
And a cover plate 3 to be attached to the stiffener 2
And a wiring pattern and pads 4 formed on the surface of the TAB tape 1 facing the stiffener bonding surface, and a solder resist 5 covering the periphery of the pads 4. An LSI chip 6 is mounted in an opening formed at the center of the TAB tape 1, and pads on the LSI chip 6 are connected to wiring patterns on the TAB tape 1 by inner leads 7 made of Cu or the like. By forming the slit 11 in the stiffener 2, the rigidity of the stiffener 2 around the slit 11 is weakened, and the warpage of the TAB substrate including the TAB tape 1, the stiffener 2 and the cover plate 3 is reduced as compared with the related art.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a structure in which a stiffener is attached to a TAB tape on which an LSI chip or the like is mounted.

[0002]

2. Description of the Related Art One of the mounting methods of LSI chips is TA.
There is a so-called B (Tape Automated Bonding) method. The TAB method has the following features. Long T
Since various components are mounted on the AB tape, a large number of semiconductor devices can be manufactured at one time. In the form of a tape,
Since the electrical characteristics of each mounted chip can be inspected, the inspection process can be simplified. Since the TAB tape has excellent flexibility, positioning at the time of component mounting becomes easy. T
By forming the wiring pattern on the AB tape, the component mounting density can be improved, and the component cost can be significantly reduced as compared with the case where a printed circuit board is used.

[0003] Due to such characteristics, various products including computer equipment are mounted by the TAB method.

[0004] The TAB method uses a TA having low rigidity.
In order to use the B tape as a mounting substrate, a stiffener made of a sheet metal is generally attached to the TAB tape in order to increase rigidity.

FIG. 4 is a sectional view of a conventional semiconductor device manufactured by the TAB method. FIG. 5 shows TAB tape 1.
A stiffener 2 'made of a sheet metal as described above is attached, and a metal cover plate 3 is further attached to the stiffener 2'. The stiffener 1 'and the cover plate 3 enhance the rigidity of the TAB tape 1. A wiring pattern and a pad 4 are formed on the TAB tape 1, and a protective solder resist 5 is formed on the upper surface thereof.

Further, an opening is formed near the center of the TAB tape 1, and an LSI chip 6 is mounted in this opening. The pads of the LSI chip 6 are electrically connected to the wiring pattern on the TAB tape 1 by the inner leads 7 of Cu or the like. The pads 4 of the TAB tape 1 are provided with solder balls 9 for establishing conduction with a main board (not shown). Below, TAB tape 1, stiffener 2 '
The combination of the cover plate 3 and the cover plate 3 is called a TAB substrate, and components other than the LSI chip are collectively called a package.

[0007]

However, since the linear expansion coefficients of the stiffener 2 'and other package components are generally different from each other, there has been a problem that the TAB substrate 1 is warped due to a heat process during manufacturing. When the warped semiconductor device is mounted on the main substrate, some of the solder balls 7 do not come into contact with the main substrate, resulting in poor contact.

If there is a difference in the linear expansion coefficient between the stiffener 2 ′ and other package components or the main board, the joint between the stiffener 2 ′ and the TAB tape 1 or the stiffener 2 ′ and the cover plate 3 cannot be connected. The joint, or the joint between the solder ball 7 and the main board, is likely to be stressed, and a temperature change after manufacturing may cause a part of the TAB substrate or the joint between the solder ball 7 and the main board to peel off. .

As described above, in the semiconductor device having the structure shown in FIG. 4, the warpage of the TAB substrate cannot be reduced, and a highly reliable semiconductor device cannot be manufactured. Therefore, conventionally, the material and thickness of the stiffener or the stiffener and T
The material and thickness of the adhesive for adhering to the AB tape are limited to specific ones to reduce the warpage of the TAB substrate, which has been a factor of increasing the component cost.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device capable of reducing warpage of a TAB substrate at low cost.

[0011]

In order to solve the above-mentioned problems, the present invention provides a stiffener to be attached to a TAB tape, a wiring pattern formed on a surface of the TAB tape opposed to the stiffener bonding surface, and Pads and
A chip mounted on the TAB tape and being electrically connected to a wiring pattern on the TAB tape, and connecting the TAB substrate formed of the TAB tape and the stiffener to another via a solder ball attached to the pad. In a semiconductor device which can be mounted on a substrate, a slit having a predetermined shape is formed at a predetermined position of the stiffener to form the TA.
It is characterized in that the warpage of the B substrate is reduced.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to the present invention will be specifically described with reference to the drawings. FIG. 1 is a sectional view of one embodiment of a semiconductor device according to the present invention.
The semiconductor device shown in FIG. 1 includes a stiffener 2 made of a sheet-like metal adhered to a TAB tape 1, a cover plate 3 adhered to the stiffener 2, and wiring formed on a surface of the TAB tape 1 opposed to a stiffener joint surface. The semiconductor device includes a pattern and a pad, and a solder resist covering the wiring pattern and the periphery of the pad. An LSI chip 6 is mounted in an opening formed near the center of the TAB tape 1, and pads on the LSI chip 6 are electrically connected to wiring patterns on the TAB tape 1 by inner leads 7 made of Cu or the like. I have. The TAB tape 1, the stiffener 2, and the cover plate 3 of FIG. 1 constitute a TAB substrate.

FIG. 2 is a top view showing the shape of the stiffener 2. As shown, a slit 11 is formed along a corner on the peripheral edge side of the stiffener 2. By forming the slit 11, the rigidity of the stiffener 2 around the slit 11 is reduced, and the difference in the linear expansion coefficient between the stiffener 2 and the TAB tape 1 can be absorbed. That is, in the vicinity of the location where the slit 11 is formed, stress at the joint surface between the stiffener 2 and the TAB tape 1 and at the joint surface between the stiffener 2 and the cover plate 3 are reduced, and the warpage of the TAB substrate becomes smaller than before.

The shape and size of the slits 11 and the locations where the slits 11 are formed are not particularly limited. However, in general, the corners and edges on the peripheral side of the TAB substrate are larger in warpage than the central portion. Slits 11 at corners and edges
It is desirable to form That is, it is desirable to form the slit 11 in a portion of the TAB substrate where the warpage is large.

Next, a brief description will be given of a manufacturing process of the semiconductor device of FIG. First, a metal layer such as Cu is formed on the TAB tape 1, and a wiring pattern and pads 4 are formed by lithography or the like. At this time, the inner leads 7 are also formed. Next, the periphery of the wiring pattern and the pad 4 is covered with a solder resist 5.

Next, the LSI chip 6 is mounted on the opening of the TAB tape 1, and the tip of the inner lead 7 is connected to the pad of the LSI chip 6 via a bump or the like. Next, L
The upper surface of the SI chip 6 is covered with the potting resin 8.

Next, after the stiffener 2 having the slit 11 as shown in FIG. 2 is attached to the surface of the TAB tape 1 facing the pattern forming surface, the cover plate 3 is attached to the stiffener 2. Next, solder balls 9 are attached to the pads 4 on the TAB tape 1, and the semiconductor device of FIG. 1 is mounted on a main board (not shown) via the solder balls 9.

By the way, in the present embodiment, the stiffener 2 and the cover plate 3 are bonded to each other, but in the present embodiment, the convex portion 10 is formed on the cover plate 3 and the convex portion 10 is formed.
The cover plate 3 is joined to the stiffener 2 only at. The reason for performing such bonding is that the smaller the bonding area is, the more the stress due to the difference in linear expansion coefficient between the stiffener 2 and the cover plate 3 can be reduced, and the warpage of the TAB substrate can be further reduced.

As described above, in this embodiment, since the slit 11 is formed in the stiffener 2 attached to the TAB tape 1, the rigidity of the stiffener 2 can be reduced in the vicinity of the location where the slit 11 is formed. The difference in the coefficient of linear expansion between the TAB tape 1, the stiffener 2 and the cover plate 3 constituting the TAB substrate can be absorbed, and the TAB substrate does not warp in the heat treatment step when manufacturing the TAB substrate.

Further, the convex portion 10 is formed on the cover plate 3, and the cover plate 3 and the stiffener 2 are formed only at the convex portion 10.
Therefore, stress due to a difference in linear expansion coefficient between the cover plate 3 and the stiffener 2 can be reduced, and the warpage of the TAB substrate can be further reduced.

Further, by adopting the structure shown in FIGS. 1 and 2, even if a temperature change occurs
The joint of each member constituting the B substrate and the joint with the main substrate are less likely to be stressed, and peeling and warping do not occur, thereby improving the durability and reliability of the semiconductor device. 1 and 2, the material and thickness of the stiffener 2 and the stiffener 2 and the TAB tape 1
Since the warpage of the TAB substrate can be reduced without strictly selecting the material and thickness of the adhesive for joining, etc., the selection range of the stiffener 2 and the adhesive can be increased, and the cost of parts can be reduced.

FIG. 1 shows an example in which the convex portion 10 is formed on the cover plate 3 and the convex portion 10 is joined to the stiffener 2. However, as shown in FIG.
May be joined to the stiffener 2 over the entire surface of the stiffener 2. Even in this case, by forming the slit 11 in the stiffener 2 as shown in FIG. 2, the warpage of the TAB substrate can be reduced as compared with the related art.

Further, the cover plate 3 and the stiffener 2 may be formed in an integral structure, and the slit 11 may be formed in the rigid member having the integrated structure.

[0024]

As described above in detail, according to the present invention, since the slit is formed in the stiffener to be attached to the TAB tape, the rigidity of the stiffener can be reduced in the vicinity of the slit forming portion. And TA
Even if the linear expansion coefficients of the B tapes are significantly different, the warpage of the TAB substrate can be reduced. In particular, if a slit is formed in a portion of the TAB substrate where the warp is large, the effect of reducing the warp is great. Further, by forming such a slit, the material and thickness of the stiffener and the material and thickness of the adhesive for bonding the stiffener and the TAB tape do not have to be strictly determined. The range of options can be expanded, and the cost of parts can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of one embodiment of a semiconductor device according to the present invention.

FIG. 2 is a top view showing the shape of a stiffener 2;

FIG. 3 is a cross-sectional view showing a modified example in which the entire surface of a cover plate is joined to a stiffener.

FIG. 4 is a cross-sectional view of a conventional semiconductor device manufactured by a TAB method.

FIG. 5 is a top view showing the shape of a conventional stiffener.

[Description of Signs] 1 TAB tape 2, 2 'stiffener 3 Cover plate 4 Pad 5 Solder resist 6 LSI chip 7 Inner lead 8 Potting resin 9 Solder ball 10 Convex part 11 Slit

Claims (3)

[Claims] A stiffener attached to a TAB tape; a wiring pattern and a pad formed on a surface of the TAB tape facing the stiffener bonding surface; and a wiring mounted on the TAB tape and mounted on the TAB tape. A chip electrically connected to a pattern, wherein the TAB substrate including the TAB tape and the stiffener can be mounted on another substrate via a solder ball attached to the pad; A semiconductor device wherein a slit having a predetermined shape is formed at a location. 2. The stiffener according to claim 1, further comprising a cover plate attached to a surface of the stiffener opposite to the TAB tape joining surface, wherein a slit having a predetermined shape is formed at a predetermined position of the stiffener. Semiconductor device. 3. The semiconductor device according to claim 1, wherein said slit is formed in a portion of said TAB substrate where warpage is large.