JPH11176931A - Method of forming contact between wirings - Google Patents

Abstract

(57) [Problem] To provide a method for forming a reliable inter-wiring contact which can achieve high integration of multilayer wiring and does not deteriorate electromigration. A first wiring is formed on a substrate, an offset insulating film is formed on an upper layer of the first wiring, the offset insulating film is covered, and a first insulating film having an etching rate different from that of the offset insulating film is provided. A film 24 is formed, and the first insulating film 24 is removed until the surface of the offset insulating film 21a is exposed. Next, at least a part of the offset insulating film 21a is removed with a selectivity with respect to the first insulating film 24, and a contact hole CH reaching the first wiring A is opened. Next, a plug 33 connected to the first wiring A is formed by filling the contact hole CH with a conductor, and the plug 3
A second wiring B connected to the plug 33 is formed in the upper layer of the third wiring 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an inter-wiring contact, and more particularly to an inter-wiring contact having a multilayer wiring structure.

[0002]

2. Description of the Related Art As the integration and performance of semiconductor devices have advanced as seen in recent VLSIs and the like, fine processing of semiconductor devices has become an essential condition. In order to finely process a semiconductor device, for example, while reducing the gate width of a gate electrode of a transistor and the area occupied by a capacitor in a DRAM or the like, the wiring portion is also finely processed to have a multilayer wiring structure. Is becoming necessary.

As the wiring portion of the above-mentioned multilayer wiring structure, it is difficult to reduce the minimum size of the opening diameter of the contact between the wirings with respect to the minimum size of the wiring that can be processed in the conventional method. On the other hand, there is a certain degree of misalignment or dimensional variation between the lower wiring and the contact portion, so it is necessary to design the wiring structure in consideration of the above situation.

[0004] In order to provide resistance to the above-mentioned misalignment of the contact portion and dimensional variation,
For example, as shown in FIG.
In the contact portions C1 to C3 of the upper wirings B1 and B2, the wiring of the upper wirings B1 and B2 is locally widened.

On the other hand, as shown in FIG. 7B, contact portions C of lower wirings A1 to A3 and upper wirings B1 and B2 are formed.
Borderless contacts formed locally without widening in 1 to C3 ("ULSI Technology" CYChang,
SMSze (Edt) p.446) was developed.

[0006]

However, in the inter-wiring contact shown in FIG. 7A, since the wiring at the contact portion is locally widened, it is difficult to miniaturize the wiring, which hinders high integration. Was a factor.

In the inter-wire contact (borderless contact) shown in FIG. 7B, since the wiring is not locally widened, it is necessary to further miniaturize the inter-wire contact shown in FIG. 7A. Is possible. If there is misalignment or dimensional variation with the contact portion, the contact area between the lower-layer wiring and the plug is reduced, but the reduction is designed within a range in which the problem does not matter. FIG. 7C is a cross-sectional view thereof. Substrate wafer Z
A lower wiring A made of, for example, aluminum is formed thereon, and an interlayer insulating film I is formed so as to cover the upper layer. A contact hole CH reaching the lower wiring A with respect to the interlayer insulating film I is opened. For example, a plug P made of tungsten is buried, and an upper wiring B made of, for example, aluminum is formed in an upper layer of the interlayer insulating film I so as to be connected to the plug P. However, FIG.
As shown in (c), if a void is present in the contact portion, the contact area between the lower wiring A and the plug P is further reduced in addition to a decrease due to misalignment of the contact portion and a variation in dimensions. . In this case, a problem has been reported that the electric field applied to the contact portion between the lower wiring A and the plug P becomes large and the electromigration resistance decreases (see “Via Delamination-A No.
vel Electromigration Failure Mechanism "Y.-H. Lee,
K. Wu, N. Mielke, LJMa and S. Hui, IEEE / IRPS, pp. 206
-210 (1997)).

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is therefore an object of the present invention to provide a multi-layer wiring having a high degree of integration and a high reliability without deteriorating electromigration. An object of the present invention is to provide a method for forming a secured inter-wiring contact.

[0009]

In order to achieve the above object, a method for forming an inter-wiring contact according to the present invention comprises the steps of forming a first wiring on a substrate, and forming an offset insulating film on an upper layer of the first wiring. Forming, covering the offset insulating film and forming a first insulating film having an etching rate different from that of the offset insulating film, and removing the first insulating film until the surface of the offset insulating film is exposed Removing at least a portion of the offset insulating film with a selectivity to the first insulating film and removing the first insulating film.
A step of opening a contact hole reaching the wiring, a step of filling the contact hole with a conductor to form a plug connected to the first wiring, and forming a second wiring connected to the plug above the plug. And a process.

In the method for forming an inter-wire contact according to the present invention, a first wiring is formed on a substrate, an offset insulating film is formed on an upper layer of the first wiring, and the offset insulating film is covered. First with etching rate
An insulating film is formed, and the first insulating film is removed until the surface of the offset insulating film is exposed. Next, a contact hole reaching the first wiring is opened by removing at least a part of the offset insulating film with a selectivity to the first insulating film. Next, a plug connected to the first wiring is formed by filling the contact hole with a conductor, and a second wiring connected to the plug is formed above the plug.

According to the method of forming an inter-wiring contact of the present invention, the offset insulating film formed on the first wiring and the first insulating film have different etching rates, and the first insulating film The contact hole reaching the first wiring is opened by removing a part of the offset insulating film with a selectivity to the first wiring, so that the contact hole can be opened in a self-aligned manner with respect to the first wiring. It is,
Even when the alignment is misaligned or the dimensions vary when the contact hole is opened, the bottom of the contact hole can be formed without coming off the upper surface of the first wiring. For this reason, the electromigration resistance can be improved, and it is not necessary to widen the wiring of the contact portion locally so that high integration can be achieved. Further, it is possible to increase the over-etching margin at the time of opening the contact hole, and it is possible to improve the reliability of the contact.

In the method for forming an inter-wiring contact according to the present invention, preferably, the offset insulating film is formed of silicon nitride, and the first insulating film is formed of silicon oxide. Silicon oxide and silicon nitride can be etched at different etching rates, thereby making the etching rates of the offset insulating film and the first insulating film different to open contact holes in a self-aligned manner with the first wiring. can do.

In the method for forming an inter-wiring contact according to the present invention, preferably, in the step of removing the first insulating film until the surface of the offset insulating film is exposed, the surface of the offset insulating film is exposed. Then, the first insulating film is removed by etching back the entire surface, or the first insulating film is removed by polishing by a chemical mechanical polishing method until the surface of the offset insulating film is exposed. Thus, the first insulating film is easily exposed until the surface of the offset insulating film is exposed.
The insulating film can be removed.

In the method for forming an inter-wiring contact according to the present invention, preferably, after the step of forming the plug and before the step of forming the second wiring, an adhesion layer is formed on the plug. Further comprising the step of: This allows the use of a wiring material such as tungsten having a limited adhesion.

In the method of forming an inter-wiring contact according to the present invention, preferably, after the step of forming the plug and before the step of forming the second wiring, a barrier metal layer is formed above the plug. The method further includes the step of forming. The barrier metal layer can suppress an alloying reaction between layers sandwiching the barrier metal layer, for example, a plug and the second wiring, and can suppress breakage of a contact.

In the method for forming an inter-wiring contact according to the present invention, preferably, after the step of removing the first insulating film until the surface of the offset insulating film is exposed, the step of opening the contact hole is performed. Forming an etching stopper film having an etching rate different from that of the first insulating film above the offset insulating film; and forming an etching rate different from the offset insulating film and the etching stopper film above the etching stopper film. Forming a second insulating film having: and forming a second wiring recess exposing the etching stopper film in the second insulating film; and forming the contact hole in the second insulating film. The offset insulating film and the edge insulating film have a selectivity with respect to the first insulating film and the second insulating film. In the step of removing at least a part of the chucking stopper film to open a contact hole reaching the first wiring and forming the plug, the contact hole and the second wiring recess are filled with a conductor to form the first wiring. A plug connected to one wiring and a second wiring are simultaneously formed. The plug and the second wiring are formed by combining a metal damascene method in which a second wiring recess is formed in the etching stopper film and the second insulating film, and the second wiring is formed by filling the second wiring recess with a conductive material. Can be simultaneously formed. In this case, the second wiring and the plug can be formed integrally. The plug and the second wiring are not formed at the connection portion between the plug and the second wiring in a state where they are not connected, and no problem occurs in the electromigration resistance.

In the above method of forming an inter-wire contact according to the present invention, preferably, the offset insulating film and the etching stopper film are formed of silicon nitride, and the first insulating film and the second insulating film are formed of silicon oxide. I do.
Silicon oxide and silicon nitride can be etched at different etching rates, so that the offset insulating film and a part of the etching stopper film have a selectivity with respect to the first insulating film and the second insulating film. Thus, the contact hole can be opened in a self-aligned manner with respect to the first wiring.

In the method of forming an inter-wiring contact according to the present invention, preferably, in the step of removing the first insulating film until the surface of the offset insulating film is exposed, the surface of the offset insulating film is exposed. Then, the first insulating film is removed by etching back the entire surface, or the first insulating film is removed by polishing by a chemical mechanical polishing method until the surface of the offset insulating film is exposed. Thus, the first insulating film is easily exposed until the surface of the offset insulating film is exposed.
The insulating film can be removed.

In the method for forming an inter-wire contact according to the present invention, preferably, after the step of forming the contact hole and before the step of simultaneously forming the plug and the second wiring, the contact hole and the second wiring are formed. The method further includes the step of forming an adhesion layer on the inner wall of the second wiring recess. This allows the use of a wiring material such as tungsten having a limited adhesion.

Preferably, in the method for forming an inter-wire contact according to the present invention, after the step of forming the contact hole and before the step of simultaneously forming the plug and the second wiring, the contact hole and the second wiring are formed. The method further includes the step of forming a barrier metal layer on the inner wall of the second wiring recess. Accordingly, the barrier metal layer can suppress an alloying reaction between the layers sandwiching the barrier metal layer, for example, the first wiring and the plug (or the second wiring), and can suppress the destruction of the contact.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a sectional view of a contact between wirings according to the first embodiment .
A lower insulating film 20 made of, for example, silicon oxide is formed on a substrate 10 such as a silicon semiconductor substrate, and a first wiring A is formed thereon. The first wiring A is formed by stacking, for example, an adhesion layer 30a made of Ti, a barrier metal layer 31a made of TiN, and a wiring layer 32a made of Al containing 0.5% of Cu. Also,
On the first wiring A, an offset insulating film 21a made of, for example, silicon nitride formed by a plasma CVD method is formed. TEOS (tetraethylorthosil) is provided on the side of the first wiring A with the offset insulating film 21a.
Plasma CVD (Chemical Vapor) from icate
First silicon oxide film 2 formed by Deposition) method
2 and a first insulating film 24 having a two-layer structure of a second silicon oxide film 23 formed by a CVD method using O ₃ and TEOS as raw materials, and insulates the first wires from each other.

A contact hole CH reaching the first wiring A is opened in the offset insulating film 21a.
A plug 33 made of, for example, tungsten is formed therein and connected to the first wiring A. A second wiring B is formed above the plug 33 and is connected to the plug 33. The second wiring B includes an adhesion layer 34a made of, for example, Ti,
A barrier metal layer 35a made of TiN and a wiring layer 36a made of Al containing 0.5% of Cu are stacked and formed. A protective film 25 made of, for example, silicon nitride is formed on the entire surface so as to cover the second wiring B.

The inter-wiring contact of the present embodiment is
The bottom of the contact hole is formed without deviating from the upper surface of the first wiring, the electromigration resistance can be improved, and the wiring of the contact portion does not need to be locally widened to be formed. This is an inter-wiring contact that can be integrated and that can improve the reliability of the contact.

A method of forming the inter-wiring contact having such a structure will be described. First, as shown in FIG. 2A, silicon oxide is deposited on a substrate 10 such as a silicon semiconductor substrate by, for example, a CVD method to form a lower insulating film 20, and Ti is formed on the lower insulating film 20 by, for example, a sputtering method. An adhesion layer 30 is formed by depositing a film having a thickness of 30 nm,
N is deposited to a thickness of 100 nm to form a barrier metal layer 31.
Is formed, and Al containing 0.5% of Cu is deposited to a thickness of 500 nm to form the wiring layer 32. Silicon nitride is deposited thereover by, for example, a plasma CVD method to form an offset insulating film layer 21.

Next, as shown in FIG. 2B, a resist film R1 having a first wiring pattern is formed on the offset insulating film layer 21 by a photolithography process, and RIE is performed using the resist film R1 as a mask. (Adhesion layer 30) by etching such as (reactive ion etching).
a, the barrier metal layer 31a, the wiring layer 32a, and the offset insulating film 21a are patterned to form a first wiring A. At this time, first, the offset insulating film 21a is patterned, then the resist film R1 is removed, and the adhesion layer 30a, the barrier metal layer 31a, and the wiring layer 32a are etched by using the patterned offset insulating film 21a as a mask. Pattern processing is also possible.

Next, as shown in FIG. 2C, the first silicon oxide film 22 is coated on the entire surface by a plasma CVD method using TEOS as a raw material, for example, by covering the offset insulating film 21a.
Is formed thereon, and a second silicon oxide film 23 is formed thereover by a CVD method using O ₃ and TEOS as raw materials to form a first insulating film 24 having a two-layer structure.

Next, as shown in FIG.
(Chemical Mechanical Polishing) method using the offset insulating film 21a as a stopper to form the offset insulating film 21.
The first insulating film 24 is removed until a is exposed. Alternatively, the first insulating film 24 can be removed by etching back by etching such as RIE until the offset insulating film 21a is exposed.

Next, as shown in FIG. 3E, a resist film R2 having a contact hole opening pattern is formed on the first insulating film 24 and the offset insulating film 21a by a photolithography process. At this time, the drawing shows that the pattern of the resist film R2 is shifted from the desired contact hole opening position by ΔX. FIG. 3E is a cross-sectional view taken along line YY ′ of FIG. 3E in the wiring direction of the first wiring A. In the drawing, the pattern of the resist film R2 indicates a desired contact hole opening position. .DELTA.X '. ΔX
And ΔX ′ are the alignment accuracy of the aligner and the first
It is determined by the variation in the opening diameter of the wiring A and the contact hole, and at present, it is generated in a size of about 0.10 to 0.15 μm.

Next, using the resist film R2 as a mask, etching conditions for increasing the selectivity between the first insulating film 24 of silicon oxide and the offset insulating film 21a of silicon nitride, for example, a gas obtained by adding Ar to CF ₄ are used. By performing etching such as RIE using an etchant gas, only the offset insulating film 21a in the pattern opening of the resist film R2 is removed by etching, and a contact hole CH reaching the first wiring A is opened. At this time, since the pattern of the resist film R2 is deviated from the desired opening position of the contact hole by ΔX or ΔX ′, the opening area is reduced, and the plug formed in the subsequent steps is connected to the first wiring or the second wiring. Although the contact area with the wiring becomes small, the current value of the circuit that flows so as to satisfy the electromigration resistance is set in consideration of the decrease in the contact area when the maximum displacement occurs.

Next, as shown in FIG. 4F, after removing the resist film R2, W is deposited on the entire surface by filling the contact hole CH by, for example, a CVD method (formation of a blanket tungsten film). Then, the entire surface is etched back by etching such as RIE to remove the W deposited outside the contact hole, and the plug 33 is formed. Alternatively, the plug 33 can be formed by depositing W only in the contact hole CH by a CVD method by selective growth of W.

Next, as shown in FIG.
For example, by sputtering, 30
An adhesion layer 34 is formed by depositing a thickness of 100 nm, a barrier metal layer 35 is formed by depositing TiN to a thickness of 100 nm, and Al containing 0.5% of Cu is deposited to a thickness of 800 nm. Then, a wiring layer 36 is formed.

Next, a mask having a second wiring pattern is formed by a photolithography process, and etching such as RIE is performed to form an adhesion layer 34a and a barrier metal layer 35.
a and the wiring layer 36a are patterned to form a second wiring B. The second wiring B is covered, silicon nitride is deposited to a thickness of 500 nm on the entire surface by, for example, a plasma CVD method to form a protective film 25, and the inter-wiring contact shown in FIG. 1 is formed.

According to the method of forming the inter-wiring contact of the present embodiment, the offset insulating film 21a and the first insulating film 24 formed on the first wiring A have different etching rates. By removing a part of the offset insulating film 21a with a selectivity to the first insulating film 24, the first
Since the contact hole CH reaching the wiring A is opened, it is possible to open the contact hole CH in a self-aligned manner with respect to the first wiring A. Can be formed without the bottom of the contact hole coming off the upper surface of the first wiring A even if the variation occurs.
Electromigration resistance can be improved. Since there is no need to locally form the wiring in the contact portion, high integration is possible, and an inter-wiring contact capable of improving the reliability of the contact can be formed.

In the above embodiment, the offset insulating film 21a can be formed of an organic film such as polyimide or a photosensitive organic film in addition to silicon nitride. When the photosensitive layer is formed of a photosensitive organic film, the organic film can be directly exposed and patterned, so that the resist film R1 formed for patterning the offset insulating film becomes unnecessary. In addition, since the organic film generally has a low dielectric constant, it can be formed with a lower parasitic capacitance than when silicon nitride is used.

Second Embodiment FIG. 5 is a sectional view of a contact between wirings according to the second embodiment .
In the present embodiment, the plug and the second
This is an inter-wiring contact in which the wiring is integrally formed at the same time. A lower insulating film 20 made of, for example, silicon oxide is formed on a substrate 10 such as a silicon semiconductor substrate, and a first wiring A is formed thereon. The first wiring A is formed by stacking, for example, an adhesion layer 30a made of Ti, a barrier metal layer 31a made of TiN, and a wiring layer 32a made of Al containing 0.5% of Cu. Further, an offset insulating film 21a made of, for example, silicon nitride formed by a plasma CVD method is formed on the first wiring A. TEOS (tetraethylorthosilic) is provided on the side of the first wiring A with the offset insulating film 21a.
ate) as a raw material, and a first insulating film 24 having a two-layer structure of a second silicon oxide film 23 formed by a CVD method using O ₃ and TEOS as a raw material. Are formed to insulate the first wires from each other.

An etching stopper film 26 made of, for example, silicon nitride is formed on the first insulating film 24, and a second insulating film 27 made of, for example, silicon oxide is formed thereon. In the offset insulating film 21a and the etching stopper film 26, a contact hole CH reaching the first wiring A is opened, while in the second insulating film 27, a second wiring recess T having a second wiring pattern is formed.
Are formed. An adhesion layer 34a made of, for example, Ti, a barrier metal layer 35a made of TiN, covering the inner wall of the contact hole CH and the inner wall of the second wiring recess T;
Layer 36 made of Al containing 0.5% of Cu and Cu
a are laminated and formed in a contact hole CH.
The plug P and the second wiring B formed by burying the second wiring recess T are formed integrally. A protective film 25 made of, for example, silicon nitride is formed on the entire surface so as to cover the second wiring B.

The inter-wiring contact of the present embodiment is
The bottom of the contact hole is formed without deviating from the upper surface of the first wiring, the electromigration resistance can be improved, and the wiring of the contact portion does not need to be locally widened to be formed. This is an inter-wiring contact that can be integrated and that can improve the reliability of the contact.

A method for forming the inter-wiring contact having such a structure will be described. The steps up to the formation of the first insulating film 24 are the same as those in the first embodiment, and thus will not be described. Next, FIG.
As shown in (a), an etching stopper film 26 is formed on the offset insulating film 21a and the first insulating film 24 by depositing silicon nitride to a thickness of 80 nm by, for example, a plasma CVD method. 10% silicon oxide by plasma CVD using TEOS as raw material
The second insulating film 27 is formed by depositing with a thickness of 00 nm. Next, a resist film R3 having a second wiring pattern is formed on the second insulating film 27 by a photolithography process.
Is formed, and the silicon oxide is etched so that the etching is stopped at the surface of the silicon nitride etching stopper film, for example, by etching such as RIE using a gas containing H such as CHF ₃ or CF ₄ + H ₂ as an etchant gas. , A second wiring recess T in the second insulating film 27.
To form

Next, as shown in FIG. 6B, after removing the resist film R3, the first wiring A and the second wiring formed in the subsequent steps are formed on the second insulating film 27 by a photolithography step. Then, a resist film R4 having a pattern of a contact hole for connecting the resist film is formed. Next, using the resist film R4 as a mask, Ar was added to the etching conditions under which the selectivity between the first insulating film 24 of silicon oxide, the offset insulating film 21a of silicon nitride, and the etching stopper film 26 was increased, for example, CF ₄ By performing etching such as RIE using a gas as an etchant gas, only the offset insulating film 21a and the etching stopper film 26 in the pattern opening of the contact hole of the resist film R4 are removed by etching, and the contact hole CH reaching the first wiring A is removed. Open.

Next, as shown in FIG. 6C, after removing the resist film R4, the inner wall of the contact hole CH and the inner wall of the second wiring concave portion T are covered to cover the entire surface, for example, by sputtering or CVD. 30n of Ti
An adhesion layer 34 is formed by depositing with a thickness of m, and a barrier metal layer 35 is formed by depositing TiN thereon with a thickness of 100 nm. Next, the inside of the contact hole CH and the inside of the second wiring recess T are buried by, for example, a sputtering method, and Al containing 0.5% Cu
The wiring layer 36 is formed by depositing with a thickness of 00 nm.
After the wiring layer 36 is deposited, it can be heated at a temperature of 350 to 500 ° C. and reflowed in order to improve the filling characteristics.

Next, the adhesion layer 34, the barrier metal layer 35, and the wiring layer 3 deposited outside the second wiring concave portion T are polished by the CMP method or etched back on the entire surface.
After removing the plug 6 and simultaneously forming the plug P and the second wiring B integrally, a 500-nm-thick silicon nitride is deposited on the entire surface by, for example, a plasma CVD method to form a protective film 25, and the inter-wiring shown in FIG. Form a contact.

According to the method of forming the inter-wiring contact of the present embodiment, the offset insulating film 21a and the first insulating film 24 formed on the first wiring A have different etching rates. By removing a part of the offset insulating film 21a with a selectivity to the first insulating film 24, the first
Since the contact hole CH reaching the wiring A is opened, it is possible to open the contact hole CH in a self-aligned manner with respect to the first wiring A. Can be formed without the bottom of the contact hole coming off the upper surface of the first wiring A even if the variation occurs.
Electromigration resistance can be improved. Since there is no need to locally form the wiring in the contact portion, high integration is possible, and an inter-wiring contact capable of improving the reliability of the contact can be formed.

Further, a metal damascene method in which a second wiring recess T is formed in the etching stopper film 26 and the second insulating film 27 and the second wiring B is formed by filling the second wiring recess T with a conductive material. By combining the plug P with the second
Since the wiring B can be formed at the same time and the second wiring and the plug are integrally formed, at the connection portion between the plug and the second wiring, the plug is not connected to the second wiring, or No problem occurs in the electromigration resistance.

In the above embodiment, the offset insulating film 21a can be formed of an organic film such as polyimide or a photosensitive organic film in addition to silicon nitride. When the photosensitive layer is formed of a photosensitive organic film, the organic film can be directly exposed and patterned, so that the resist film R1 formed for patterning the offset insulating film becomes unnecessary. In addition, since the organic film generally has a low dielectric constant, it can be formed with a lower parasitic capacitance than when silicon nitride is used.

The present invention can be applied to any semiconductor device having a wiring contact, such as a MOS transistor-based semiconductor device such as a DRAM, a bipolar semiconductor device, or an A / D converter. A highly reliable inter-wiring contact can be provided for a semiconductor device that has been miniaturized, miniaturized, and miniaturized.

The present invention is not limited to the above embodiment. For example, in the present embodiment, the inter-wiring contact of the wiring layer having the two-layer structure is described. However, the inter-wiring contact of the wiring layer having the three or more wiring structure may be used. The inter-wiring contact of the present invention can be applied to a part of the wiring layer. Further, each of the first insulating film and the second insulating film may have a single-layer structure or a multilayer structure of two or more layers. Further, the first wiring and the second wiring may also have a multilayer structure. Although Al containing 5% of Cu is used as the material of the wiring layer, other conductive materials such as Cu may be used. In addition, various changes can be made without departing from the spirit of the present invention.

[0048]

According to the method for forming an inter-contact according to the present invention, a method for forming a high-reliability inter-wiring contact which can achieve high integration of multilayer wiring and does not deteriorate electromigration is provided. Can be provided.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of an inter-wire contact according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a forming step of a method of forming an inter-wiring contact according to the first embodiment of the present invention;
(A) shows up to the step of forming an offset insulating film, (b) shows up to the step of patterning the first wiring, and (c) shows up to the step of depositing the first insulating film.

FIG. 3 shows a step subsequent to that of FIG. 2, (d) shows a step of removing the first insulating film until the offset insulating film is exposed, and (e) shows a step of opening a contact hole; (E ') shows a cross-sectional view taken along YY' of (e).

FIG. 4 shows a step subsequent to that of FIG. 3; (f) shows up to a plug forming step; and (g) shows up to a second wiring depositing step.

FIG. 5 is a sectional view of an inter-wire contact according to a second embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a forming step of a method for forming a wiring contact according to a second embodiment of the present invention;
(A) shows up to the step of forming the second wiring recess, (b) shows the step of opening the contact hole, and (c) shows the step of depositing the plug and the second wiring.

FIG. 7A is a plan view of an inter-wiring contact according to a first conventional example, and FIG. 7B is a plan view of an inter-wiring contact according to a second conventional example; FIG. () Is a sectional view of an inter-wiring contact according to a second conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Substrate, 20 ... Lower insulating film, 21 and 21a ... Offset insulating film, 22 ... 1st silicon oxide film, 23 ... 2nd silicon oxide film, 24 ... 1st insulating film, 25 ... Protective film, 26
... Etching stopper film, 27 ... Second insulating film, 30, 3
0a, 34, 34a ... adhesion layer, 31, 31a, 35, 3
5a: barrier metal layer, 32, 36: wiring layer, 32
a, 36a: wiring layer, 33, P: plug, A, A1 to A
3: First wiring, B, B1, B2: Second wiring, CH, C1
C3: contact hole, T: recess for the second wiring, Z:
Substrate wafer, I: insulating film, V: void.

Claims (12)

[Claims] A step of forming a first wiring on the substrate; a step of forming an offset insulating film on an upper layer of the first wiring; and covering the offset insulating film and having an etching rate different from that of the offset insulating film. Forming a first insulating film, removing the first insulating film until a surface of the offset insulating film is exposed, and forming a first insulating film having a selectivity with respect to the first insulating film. Removing at least a portion to open a contact hole reaching the first wiring; filling the contact hole with a conductor to form a plug connected to the first wiring; Forming a second wiring connected to the plug. 2. The method according to claim 1, wherein said offset insulating film is formed of silicon nitride, and said first insulating film is formed of silicon oxide. 3. In the step of removing the first insulating film until the surface of the offset insulating film is exposed, the entire surface is etched back until the surface of the offset insulating film is exposed to remove the first insulating film. The method for forming an inter-wiring contact according to claim 1. 4. The step of removing the first insulating film until the surface of the offset insulating film is exposed, wherein the first insulating film is polished by a chemical mechanical polishing method until the surface of the offset insulating film is exposed. 2. The method according to claim 1, wherein the film is removed. 5. The method according to claim 1, further comprising the step of:
2. The method according to claim 1, further comprising a step of forming an adhesion layer above the plug before the step of forming the wiring. 6. The method according to claim 1, further comprising the step of:
2. The method according to claim 1, further comprising a step of forming a barrier metal layer above the plug before the step of forming the wiring. 7. The method according to claim 1, further comprising: removing the first insulating film until the surface of the offset insulating film is exposed, and before the step of opening the contact hole, the first insulating film is formed on the offset insulating film. Forming an etching stopper film having an etching rate different from that of the etching stopper film, forming a second insulating film having an etching rate different from that of the offset insulating film and the etching stopper film above the etching stopper film, Forming a second wiring recess for exposing the etching stopper film in the insulating film; and, in the step of opening the contact hole, selecting the first insulating film and the second insulating film. And removing at least a part of the offset insulating film and the etching stopper film with a predetermined ratio. In the step of opening a contact hole reaching a line and forming the plug, the contact hole and the recess for the second wiring are buried with a conductor to simultaneously form a plug and a second wiring connected to the first wiring. A method for forming a contact between wirings according to claim 1. 8. The method according to claim 7, wherein said offset insulating film and said etching stopper film are formed of silicon nitride, and said first insulating film and said second insulating film are formed of silicon oxide. 9. In the step of removing the first insulating film until the surface of the offset insulating film is exposed, the entire surface is etched back until the surface of the offset insulating film is exposed to remove the first insulating film. The method for forming an inter-wiring contact according to claim 7. 10. The step of removing the first insulating film until the surface of the offset insulating film is exposed, wherein the first insulating film is polished by a chemical mechanical polishing method until the surface of the offset insulating film is exposed. 8. The method according to claim 7, wherein the film is removed. 11. A step of forming an adhesion layer on the inner wall of the contact hole and the recess for the second wiring after the step of forming the contact hole and before the step of forming the plug and the second wiring at the same time. Claim 7 further comprising
The method for forming a contact between wirings according to the above description. 12. A step of forming a barrier metal layer on the inner wall of the contact hole and the recess for the second wiring after the step of forming the contact hole and before the step of simultaneously forming the plug and the second wiring. 8. The method for forming an inter-wiring contact according to claim 7, further comprising: