JPH11168883A - DC / DC converter - Google Patents

Abstract

(57) [Problem] To provide a DC / DC converter that operates a dropper circuit only at startup and supplies power from a tertiary winding. A primary winding for inputting a DC input voltage;
A switch circuit connected to the next winding, a pulse width control circuit for generating a pulse for turning on / off the switch circuit,
A starting circuit that receives a DC input voltage and outputs a first power supply voltage, an auxiliary winding that forms a primary winding and a transformer and outputs a second power supply voltage, a first power supply voltage and a second power supply voltage And a comparator circuit that outputs one of the power supply voltages to the pulse width control circuit, and a rising edge of the DC input voltage is detected and activated for a fixed time from the rising edge of the DC input voltage. A rise detection circuit that outputs a rise detection signal for making inactive, and the start circuit is operated only when the rise detection signal indicates active.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a DC / DC converter, and more particularly to control of a starter circuit such as a dropper circuit.

[0002]

2. Description of the Related Art DC / DC converters increase or decrease a DC voltage and convert the DC voltage into a DC voltage different from an input DC voltage, and are widely used in information communication devices and the like.

Generally, the output voltage of a DC / DC converter is controlled by controlling the pulse width of a pulse for turning on / off a switching element such as an FET provided on the primary side by a regulator IC. .

FIG. 16 is a circuit diagram of a conventional DC / DC converter. As shown in this figure, when the DC / DC converter rises upon input of a DC voltage to the input terminal I, the NP is turned on by the resistor R1 and the Zener diode ZD1.
When a constant current flows through the base of the N-transistor Q1, the transistor Q1 is turned on, and the input voltage flows from the collector to the emitter of the transistor Q1 through the resistor R2, and the emitter side becomes high level.
The diode D1 turns on, and power is supplied to the regulator IC10.

When power is supplied, the regulator IC generates a pulse and applies it to the gate of the FET Q2. The FET Q2 is turned on / off by application of a pulse, and the current flowing through the primary winding 2 changes.
A voltage is generated in the secondary winding 4 and the auxiliary winding 6.

The resistance R3, the FETs Q3 and Q4 make 2
The voltage generated in the secondary winding 4 is rectified, smoothed by the choke L and the capacitor C2, and a DC voltage is output.

On the other hand, the voltage induced in the auxiliary winding 6 is set higher than the output voltage of the dropper circuit 8, the diode D2 is turned on, the diode D1 is turned off, and the operating power of the regulator IC 10 is reduced. Supplied on line 6. Thus, by switching the power source of the regulator IC 10 between the start-up and the normal operation, the loss in the dropper circuit 8 is eliminated, and the efficiency of the DC / DC converter is improved.

[0008]

However, in the conventional DC / DC converter, the switching of the power supply between the dropper circuit 8 and the tertiary winding 6 is performed by the diodes D1 and D2. The voltage on line 6 is diode D1
Circuit until the potential becomes higher than the cathode side of the
The power is supplied from the.

In this DC / DC converter, the power supply can be switched only by the diodes D1 and D2, which simplifies the circuit configuration. However, depending on the operating conditions of the DC / DC converter, the voltage of the tertiary winding 6 is higher. As a result, there is a problem that power is supplied from the dropper circuit 8 to the regulator IC 10 and conversion efficiency is reduced.

[0010] As shown in FIG.
In the circuit system of the / DC converter, the synchronous rectification system is employed, the secondary winding 4 employs a forward converter, and the tertiary winding 6 employs a buck-boost converter.

This is because the voltage of the tertiary winding 6 is not feedback-controlled, but only the voltage of the secondary winding 4 is feedback-controlled to obtain a constant voltage output. This is because the voltage of the tertiary winding 6 is determined by the duty ratio of the pulse determined by the voltage.

A case in which the secondary winding 4 is a forward converter and the tertiary winding 6 is a buck-boost converter will be specifically described. Here, it is assumed that the duty ratio D of the pulse applied to the gate of the FET Q1 changes from D = 0.2 to 0.4 due to a change in the input voltage.

The voltage V ₂ on the side of the secondary winding 4 constituting the forward converter is V ₂ = V _in × (N ₂ / N ₁ ) × D
(V _i : input voltage, N ₁ : number of primary windings, N ₂ : number of secondary windings), and the change range of the duty ratio coefficient is 0.2 →
0.4, voltage V ₂ after the change of the duty is twice the previous voltage V ₂ changes.

[0014] On the other hand, the output voltage V ₃ of the tertiary winding 6 of the buck-boost type _{converter, V in × (N 2 /} N 1) × D /
In proportion to (1-D), the change range of the duty ratio coefficient is from 0.25 to 0.67.

Therefore, the voltage V ₃ after the change of the duty
Is 2.68 times the voltage V ₃ before the change, and is larger on the tertiary winding 6 side, and is smaller than the rate of change of the voltage V ₂ of the secondary winding 4. There is a possibility that the rate of change of the voltage V ₃ becomes larger and the voltage of the tertiary winding 6 becomes lower than the output voltage of the dropper circuit 8 transiently.

In a normal design, (1) output voltage of dropper circuit 8> regulator IC
(2) Output voltage of transformer tertiary winding 6> output voltage of dropper circuit 8 (3) Output voltage of transformer tertiary winding 6 <regulator IC 10 The voltage of the dropper circuit 8 and the ratio of the number of turns of the transformer are determined so that the gate / source breakdown voltage of the switching FET × 0.8.

However, if the voltage of the tertiary winding 6 changes greatly due to the change in the duty ratio D, not only is it difficult to adjust these voltages, but if (2) does not always hold during normal operation, the dropper circuit is used. 8, the power of the regulator IC 10 is supplied, and the power efficiency is reduced.

In particular, in the case of a small-output module power supply or the like, there is a problem that the loss ratio in the control circuit system for controlling the pulse width with respect to the output capacity becomes large, and the efficiency is reduced by, for example, about 5%.

The present invention has been made in view of such a point, and operates the dropper circuit only at the time of startup, and thereafter supplies DC power from the tertiary winding to prevent DC power reduction. / DC converter is provided.

[0020]

FIG. 1 is a diagram illustrating the principle of the present invention. As shown in this figure, the present invention provides a DC input voltage I
The primary winding 20 for inputting n and the primary winding 20 constitute a transformer, and a secondary winding 22 from which a voltage is induced and a secondary winding 2
2, a rectifying circuit 36 for rectifying the induced voltage, a smoothing circuit 38,
A switch circuit 24 connected to the primary winding 20, a pulse width control circuit 28 for generating a pulse for turning on / off the switch circuit 24, and a DC input voltage In
A starting circuit 30 for outputting a power supply voltage, a primary winding 20 and an auxiliary winding 26 forming a transformer and outputting a second power supply voltage
And a comparison circuit 34 that compares the first power supply voltage with the second power supply voltage and outputs one of the power supply voltages to the pulse width control circuit 28. A start-up detection circuit 32 for outputting a start-up detection signal to be activated for a predetermined time from the rise of the voltage In and thereafter to be inactive, and when the start-up detection signal indicates active, the start-up circuit And when the rise detection signal indicates inactive,
DC / D characterized by stopping the operation of the starting circuit
A C converter is provided.

According to the above configuration, when the DC input voltage In is input, the rise detection circuit 32 detects the rise and outputs a rise detection signal. When the rise detection signal becomes active, the activation circuit 30 is operated to output the first power supply voltage. The comparison circuit 34 outputs the first power supply voltage to the pulse width control circuit 28.

The pulse width control circuit 28 is supplied with power by the first power supply voltage and outputs a pulse to the switch circuit 24. The switch circuit 24 is turned on / off according to the pulse, and a voltage is induced in the secondary winding 22 and the auxiliary winding 26. This voltage is rectified by the rectifier circuit 36, smoothed by the smoothing circuit 38, and converted to DC. This allows
The DC / DC converter is started.

After the start of the DC / DC converter, the rise detection signal becomes inactive, the operation of the start circuit 30 stops, and the second power supply voltage of the auxiliary winding 26 is compared with the comparison circuit 3
4 to the pulse width control circuit 28.

Therefore, only when the DC / DC converter is started, the first power supply voltage of the starting circuit 30 is output to the pulse width control circuit 28. After the DC / DC converter is started, the second power supply voltage of the auxiliary winding 26 is turned on. Is output to the pulse width control circuit 28. Thereby, the conversion efficiency is improved.

According to another aspect of the present invention, the primary winding 20 for inputting the DC input voltage In, the first switch circuit 24 connected to the primary winding 20, and the first switch circuit 24 being turned on / off. Pulse width control circuit 2 for generating a pulse to be turned off
6, an activation circuit 30 that receives the DC input voltage In and outputs a first power supply voltage, an auxiliary winding 26 that forms a transformer with the primary winding 20 and outputs a second power supply voltage, A second switch circuit for turning off and passing / cutting off the first power supply voltage; comparing an output voltage of the second switch circuit with the second power supply voltage;
And a rise detection circuit that detects the rise of the DC input voltage, activates it for a fixed time from the rise of the DC input voltage, and outputs a rise detection signal to be inactive thereafter. When the rise detection signal indicates active, the second switch circuit is turned on to output the first power supply voltage to the comparison circuit 34, and when the rise detection signal indicates inactive, A DC / DC converter is provided in which the second switch circuit is turned off to cut off the output of the first power supply voltage to the comparison circuit.

[0026]

Embodiments of the present invention will be described below with reference to the drawings. First Embodiment FIG. 2 is a configuration diagram of a DC / DC converter according to a first embodiment of the present invention, and substantially the same components as those in FIG. 16 are denoted by the same reference numerals.

As shown in the figure, the DC / DC converter comprises resistors R11, R12, R21, R22, a voltage stabilizing circuit 40, comparators 42, 44, resistors R1, R2, R3,
R4, diodes D1, D2, D3, NPN transistor Q1, N-FET (hereinafter abbreviated as FET) Q2, Q
3, Q4, capacitors C1 and C2, choke coil L,
Primary winding 2, Secondary winding 4, Tertiary winding 6, Regulator I
C10 is provided.

The resistors R11 and R12 are connected to the DC input voltage V_i
Input terminal I₁, I_TwoConnected in series between the input voltage V
_iFrom the connection node with the resistors R11 and R12.
Divided voltage V₁Is the first voltage divider that outputs Where
Force terminal I₁Is positive, input terminal I _TwoTo the ground side
You.

[0029] resistance R21, R22, the DC input voltage V _i
Are connected in series between the input terminals I ₁ and I _{2 of the
i} divide the minute resistance R21, a second voltage divider for outputting a divided voltage V ₂ from the connection node of R22.

[0030] Formula divided voltage V ₁ represented by the (1), the reference voltage V at the time t ₂ from the DC input voltage V _i is risen
Matches _ref, the divided voltage V ₂ represented by the formula (2), the reference voltage V at time t ₁ from the DC input voltage V _i is risen
matches _ref . The divided voltages V ₁ and V ₂ are This is for generating a rise detection signal indicating a period from time t ₁ to time t ₂ , and it is assumed that V ₁ <V ₂ .

V ₁ = V _i × R22 / (R21 + R22) (1) V ₂ = V _i × R12 / (R11 + R12) (2) Resistor R21 that determines divided voltages V ₁ and V ₂ , R22, R
11, R12 is intended to be determined from the voltage and the rising characteristics of the steady state of the DC input voltage V _i, in the present embodiment, for example, the voltage of the steady state of the DC input voltage V _i 58
V, the DC input voltage V _i gradually rises linearly, and the rise detection signal detects a range of 30 V ≦ V _i ≦ 48 V, where R 11 = 33 KΩ and R 12 = 1.
00KΩ, R21 = 510KΩ, R22 = 100KΩ.

The voltage stabilizing circuit 40 has a DC input voltage V _i
To generate a reference voltage V _ref from. Reference voltage V
_ref is set according to the divided voltages V ₁ and V ₂ , the operating voltages of the comparators 40 and 42, the power supply voltage, and the like. In the present embodiment, the comparator 4
It is assumed that the power supply voltages of 0 and 42 are equal to the reference voltage _Vref .

FIG. 3 is a configuration diagram of the voltage stabilizing circuit 40 in FIG. As shown in FIG.
Has an NPN transistor Q5, a resistor R5, and a Zener diode ZD2. Resistor R3 is connected between the base of the input terminal I ₁ and the transistors Q5, it is used to limit the current flowing through the Zener diode ZD2.

The zener diode ZD2 is connected between the base and the input terminal I ₂ of the transistors Q5, it is intended to clamp the base to a constant voltage. Transistor Q
Reference numeral 5 is for outputting a reference voltage _Vref from the emitter. Here, the reference voltage _Vref is equal to (voltage VZD2 of zener diode _ZD2 + base-emitter _VBE ).

The comparator 42 shown in FIG.
0 is supplied with power, and a reference voltage V _ref ,
(-) to enter the partial pressure _{V 1, (V ref -V 1} ) is positive if a high level, if negative, and outputs a low level.

The power is supplied to the comparator 44 from the voltage stabilizing circuit 40. The reference voltage V _ref is input to the terminal (+), the divided voltage V ₁ is input to the (−) terminal, and (V _ref −V ₂ ) is If it is positive, it outputs a high level voltage, and if it is negative, it outputs a low level voltage V _CP2 .

[0037] In the present embodiment, the power supply voltage of the comparator 42 and 44 is consistent with the reference voltage V _ref, if different from the reference voltage V _ref is the same configuration as FIG. 3,
It may be from the input voltage V _i to generate a power supply voltage.

The AND gate 45 receives the outputs V _CP1 and V _CP2 of the comparators 42 and 44 and takes a logical product. The resistor R4 is provided between the output terminal of the AND gate 45 and the cathode of the diode D3.
It is about 00Ω.

The diode D3 is provided between the resistor R4 and the cathode of the Zener diode ZD1, and has a DC / D
It is turned off when the C converter is started, operates the dropper circuit 8, and turned on after the DC / DC converter is started, short-circuits the Zener diode ZD1 and stops the operation of the dropper circuit 8.

The resistor R1 is used to limit the current flowing through the Zener diode ZD1, provided between the base of the input terminal I ₁ and the transistor Q1, for example,
30 KΩ. Zener diode ZD1 is for clamping the base of transistor Q1 to a constant voltage, is provided between the base and the input terminal I _2.

[0041] and the resistor R2 and the transistor Q1 is lowered the voltage of the input voltage V _i, constitutes the dropper circuit 8 for outputting a constant voltage (V _ZD1 + V _BE). The resistance R2 is, for example, 1 KΩ. The output terminal (the emitter of the transistor Q1) of the dropper circuit 8 is connected to the anode of the diode D1.

The primary winding 2 has an input terminal I ₁ and an FET Q 2
And the secondary winding 4 and the tertiary winding 6 respectively constitute a transformer. A forward-type transformer is provided between the primary winding 2 and the secondary winding 4,
Between the primary winding 2 and the tertiary winding 6 is a buck-boost type transformer.

The resistors R3, FETs Q3 and Q4 are synchronous rectifier circuits, and the choke coil L and the capacitor C2 are
It is a smoothing circuit and outputs a DC voltage from output terminals O ₁ and O ₂ . Here, the output terminal O ₁ is positive, the output terminal O ₂ is ground.

The tertiary winding 6 is provided between the source of the FET Q2 and the anode of the diode D2. The cathodes of the diodes D1 and D2 are connected to each other, and are connected to a power supply pin of the capacitor C1 and the regulator IC10.

In this embodiment, the diode D1 is used. However, after the DC / DC converter is started, the dropper circuit 8 stops operating, and the emitter of the transistor Q1 enters a high impedance state. D
1 does not have to be present.

The regulator IC10 is the power supply voltage input from the power supply pin, and inputs the control signal (not shown) for controlling the pulse width from the output terminal O ₁ side, from the standby state of the range the power supply voltage is constant, according to the control signal , FETQ
2 is a pulse width control circuit that generates two drive pulses. The capacitor C1 is for charging an AC voltage output from the diode D2, and is, for example, 0.15 μF
It is.

FIG. 4 is a time chart of FIG. Hereinafter, the operation of the DC / DC converter of FIG. 2 will be described with reference to FIG. Between the input terminals I _1, I _2, the DC input voltage V _i is, as shown in FIG. 4, it is assumed that gradually rises linearly. Resistors R21, R22 are, by dividing the DC input voltage V _i, the comparator 44 the voltages V ₁ represented by the formula (1)
Output to the terminal (+). Resistors R11, R12 are, by dividing the DC input voltage V _i, a voltage V ₂ represented by the formula (2) terminal of the comparator 42 - outputs to the ().

On the other hand, the voltage stabilizing circuit 40 applies the reference voltage _Vref to the terminal (+) of the comparator 42 and the comparator 44 by the Zener diode ZD2 and the transistor Q5 in FIG.
, And the power supply lines of the comparators 42 and 44.

At time t ₂ , voltage V ₁ becomes V ₁ = V
_ref , and when t ₀ ≦ t <t ₂ , V ₂ <V _ref and t ₂
At <t, V _ref <V ₁ . Voltage V ₂ is at time t ₁
, V ₂ = V _ref , and at t ₀ ≦ t <t ₁ ,
When V ₁ <V _ref and t ₁ <t, V _ref <V ₂ .

The comparator 42, the terminal (+) voltage of the terminal (-) is higher than the voltage of, i.e., a V _{re f} ≧ V ₁ t
_{When 0} ≦ t ≦ t ₂ , a high level is output, and the voltage of the terminal (+) is lower than the voltage of the terminal (−), that is, V ₁ ≧ V
_When t ₂ <t, which is _ref , a low level is output.

The comparator 44 outputs a high level signal when the voltage at the terminal (+) is higher than the voltage at the terminal (-), that is, when t ₁ ≤t, that is, V ₂ ≥V _ref. +) Is lower than the voltage of the terminal (−), that is, V ₂ ≦ V _ref
When t ₀ ≦ t <t ₁ , a low level is output.

The outputs V _CP1 and V of the comparators 42 and 44
_CP2 is ANDed by AND gate 45,
When t ₀ ≦ t ≦ t ₁ , low level (same potential as input terminal I ₂ ), and when t ₁ ≦ t ≦ t ₂ , high level (reference voltage V
_ref , where V _ref > clamp voltage V _ZD of Zener diode ZD 1), and when t ₂ ≦ t, it becomes low level (the same potential as input terminal I ₂ ).

On the other hand, the transistor Q1 of the dropper circuit 8
The base is biased via the resistor R1 by rising of the input voltage V _i. When t ₁ <t ≦ t ₂ , AND
Since the output of the gate 45 is high, the diode D3
Is reverse biased, the diode D3 is turned off, and t ₂ <
At time t, the output of the AND gate 45 is low level, so that the diode D3 is forward-biased and the diode D3
3 turns on.

Therefore, when t ₁ <t ≦ t ₂ , the diode D3 is turned off, so that the voltage V _ZD1 of the Zener diode ZD1 is clamped to a constant voltage, and the transistor Q1
Turns on. The transistor Q1 is turned on, the diode D1 is forward biased and turned on, and the voltage dropped by the resistor R2 and the transistor Q1 is applied to the regulator IC.
Output to 10 power pins.

When t ₂ <t, the diode D3 is turned on. However, since the resistor R4 is sufficiently smaller than the resistor R1,
The base potential of the transistor Q1 drops to ground, the zener diode ZD1 is short-circuited, and the voltage V _ZD1
= 0, the transistor Q1 turns off, and the diode D
1 turns off.

On the other hand, the regulator IC 10 satisfies t ₁ ≦ t
In ≦ t _2, a voltage is applied to the power supply pin than dropper circuit 8, a voltage that exceeds the standby voltage, and generates a driving pulse is applied to the gate of the FET Q2. F
The ETQ 2 is turned on / off by a drive pulse, and a voltage is induced in the secondary winding 4 and the tertiary winding 6.

The voltage excited in the secondary winding 4 is rectified by a synchronous rectifier circuit composed of a resistor R3 and FETs Q3 and Q4, and the output voltage of the synchronous rectifier circuit is smoothed by a smoothing circuit composed of chokes L and C2. , And then output from output terminals O ₁ and O ₂ .

When the FET Q2 is off, a positive voltage is applied to the anode of the diode D2 to turn on the diode D2, and the AC voltage induced in the tertiary winding 6 constituting the buck-boost type transformer is turned on. When the FET Q2 is on, a negative voltage is applied to the anode of the diode D2.

Thus, the DC / DC converter is started, and the tertiary winding 6 outputs an AC voltage. At t ₂ <t, the diode D1 is turned off, and the power supply voltage is supplied from the tertiary winding 6 to the power supply pin of the regulator IC 10.

When the anode of the diode D2 has a negative voltage, the diode D2 is turned off.
The regulator IC is discharged by discharging the electric charge
A power supply voltage is applied to 10 power supply pins.

[0061] By the above control, the rising input DC voltage V _i, only when starting the DC / DC converter, a power supply voltage is supplied from the dropper circuit 8 side to the regulator IC 10, after starting, tertiary winding 6 side Regulator I
The power supply voltage is supplied to C10, so that the conversion efficiency does not decrease.

According to the first embodiment described above, since the dropper circuit 8 which becomes unnecessary after the activation of the regulator IC 10 is completely cut off in circuit, the input voltage of the DC / DC converter changes and the tertiary winding is changed. Even when the voltage of the regulator 6 decreases, the operating voltage of the regulator IC 10 is always obtained from the tertiary winding 6 of the transformer, so that the power conversion efficiency is improved.

Also, at the time of circuit design, only the starting voltage required for the regulator IC 10 is obtained from the dropper circuit 8, and thereafter, only the voltage required for maintaining the operation of the regulator IC 10 is supplied from the tertiary winding 6. Therefore, it is not necessary to set the voltage value of the tertiary winding 6 of the transformer higher than necessary, so that there is a margin in the gate withstand voltage of the switching FET constituting the regulator IC 10, and as a result, a design with a margin becomes possible. .

Second Embodiment FIG. 5 is a block diagram of a DC / DC converter according to a second embodiment of the present invention. Elements that are substantially the same as those shown in FIG. It is.

The DC / DC converter shown in FIG.
The difference from the DC / DC converter shown in FIG.
Is provided in parallel with the capacitor C3. The reason for providing the capacitor C3 is that a switch or the like is used to instantaneously
Constant voltage from V, for example, when applying a DC input voltage V _i to 58V, in the circuit configuration of FIG. 2, the regulator I
Since the time (t ₂ −t ₁ ) for supplying the starting voltage to C10 from the dropper circuit 8 side is extremely short, the energy of the regulator IC 10 is not sufficiently supplied, the driving pulse is not output from the regulator IC 10, and the DC is not supplied. / DC
If the voltage reaches the operation start voltage before the converter is started, the supply of the power supply voltage from the dropper circuit 8 is stopped, and the power supply voltage is not output from the tertiary winding 6 side. This is because, in some cases, the converter does not start, so that the time for supplying the start-up voltage is extended and the converter is started reliably.

The capacitor C3 is connected to the regulator IC 10
There To ensure startup time required to start, which is delayed rise of the voltage V ₁ of the connection node of the resistors R21, R22, for example, a 1μF about. By a time constant determined by the resistor R21 and the capacitor C3, the capacitor C3 is charged, the voltage V ₁ was,
Get up slowly.

FIG. 6 is a time chart of FIG. Less than
Referring to FIG. 6 below, the operation of the DC / DC converter of FIG.
Explain the work. Use switches etc. as shown in FIG.
And instantaneously changes the input voltage V from 0V to the steady voltage._iWas applied
And Input voltage V_iIs applied, the resistance R21 and
The capacitor C3 is charged by the time constant of the capacitor C3.
And the voltage V₁Rises gradually. t₀≦ t ≦ t_FourTo
Then, V₁≤V_ref, T_Four<T, V_ref<V
₁Becomes Where t_Two<T_FourBecomes Note that t_TwoIs
V without capacitor C3₁= V_refTime
You.

The reason why the resistor R22 is provided is that the DC input voltage V
Even if _i is a high voltage, the voltage V _i can be controlled by the resistors R21 and R22.
By dividing by, by lowering the input voltage of the comparator 44, even if there is some variation range to the DC input voltage V _i, in order to widen the operating range of the comparator 44.

On the other hand, the resistors R21 and R22 connect the DC voltage V
_i is divided and the voltage V ₁ is output to the terminal (+) of the comparator 44. The voltage V ₁ becomes V ₁ = V _{ref at} time t ₃ .
When t ₀ ≦ t <t ₃ , V ₁ <V _ref and t ₃ <t ₃
Then, V _ref <V ₁ .

The output voltage V _cp1 of the comparator 42 is t ₀ ≦ t
When ≦ t ₄ , the level is high, and when t ₄ <t, the level is low. When the output voltage V _CP2 of the comparator 44 is t ₃ ≦ t,
When it is at the high level and t ₀ ≦ t <t ₁ , it is at the low level.

Thus, the Zener diode ZD1
Voltage V_ZD1Is t_Three≦ t ≦ t_FourTime, high level, it
At other times, the level is low. Regulator IC10
Is t _Three≦ t ≦ t_FourAt the dropper circuit 8 side
A dynamic voltage is supplied and activated.

Here, the activation time (t ₄ -t ₃ ) exceeds the time required for the regulator IC 10 to activate, and the regulator IC 10 is activated and outputs a drive pulse. Thereby, the DC / DC converter is activated. After the start of the DC / DC converter, the regulator IC 10 is supplied with power from the tertiary winding 6 side.

According to the second embodiment described above, the first
In addition to the same effects as in the embodiment, the input voltage is instantaneously
Regulator IC reliably even when the voltage changes from V to steady voltage
Can be started.

Third Embodiment FIG. 7 is a block diagram of a DC / DC converter according to a third embodiment of the present invention. Elements that are substantially the same as those in FIG. 5 are given the same reference numerals. It is.

The DC / DC converter shown in FIG.
Is different from the DC / DC converter shown in FIG.
1, R12, R4, AND gate 45, diode D3
And the comparator 44 is eliminated, and a Zener diode ZD3 is provided instead of the resistor R22.

As shown in this figure, the resistor R21 and the Zener diode ZD3 are connected in series between the input terminals I ₁ and I ₂ with the resistor R21 on the input terminal I ₁ side.
Zener diode ZD3 is a resistor R21 and the voltage V ₂ at the connection node of the Zener diode ZD3 is for clamping to a constant voltage.

[0077] Here, the provided zener diode ZD3, in a case of there are variations in the voltage of the input voltage V _i is also, by the voltages V ₁ to the constant voltage, in order to guarantee the operation of the comparator 42 It is.

The capacitor C3 is a Zener diode Z
It is provided in parallel with D3. The purpose of use of the capacitor C3 is the same as that of the second embodiment. The comparator 42 inputs the reference voltage V _ref to the input terminal (+) and inputs the voltage V ₁ to the input terminal (−). When the voltage V _ref is higher than the voltage V ₁ , the comparator 42 goes to a high level (Zener diode). outputs equal to the clamp voltage of ZD1), when the voltage V _ref is lower than the voltage V _1, and outputs a low level. Comparator 4
The output terminal 2 is connected to the base of the transistor Q1.

FIG. 8 is a time chart of FIG. Hereinafter, the operation of the DC / DC converter of FIG. 7 will be described with reference to FIG. As shown in FIG. 8, from 0V instantaneously using a switch that applies the input voltage V _i to the stationary voltage. When the DC input voltage V _i is applied, a resistor R21
And the capacitor C3 by the time constant of the capacitor C3 is charging, voltages V ₁ rises slowly, t ₀ ≦ t ≦ t
₄ , V ₁ ≦ V _ref , and at t ₄ <t, V _ref
<A V _1.

[0080] Here, voltages V _1, because they are clamped to a constant voltage by the Zener diode ZD3, the input voltage V _i exceeds a certain voltage, has a constant voltage,
Even if there are variations in the input voltage V _i, the voltage V ₁ was never exceeds a predetermined voltage.

The output voltage V _cp1 of the comparator 42 is t ₀ ≦ t
When ≦ t ₄ , the level is high (clamp voltage of the Zener diode ZD1), and when t ₄ <t, the level is low. The voltage V _ZD1 of the Zener diode ZD1 is t ₀ ≦ t ≦ t
_At the time of ₄ , the level becomes high, the transistor Q1 is turned on, and the regulator IC 10 is activated by supplying the activation voltage from the dropper circuit 8 side.

On the other hand, the voltage V of the Zener diode ZD1
_ZD1 becomes low level at t ₄ <t, the transistor Q1 turns off, the operation of the dropper circuit 8 stops, and the power supply voltage is supplied to the regulator IC 10 from the tertiary winding 6 side.

According to the third embodiment described above, the second
In addition to the same effects as in the second embodiment, it can be realized with a simpler circuit configuration than in the second embodiment. Fourth Embodiment FIG. 9 is a block diagram of a DC / DC converter according to a fourth embodiment of the present invention, wherein substantially the same components as those in FIG. 7 are denoted by the same reference numerals.

The DC / DC converter shown in FIG.
Is different from the DC / DC converter shown in FIG. 1 in that the voltage stabilizing circuit 40 and the comparator 42 are eliminated, and the N-FE
That is, TQ6 is provided.

The FET Q6 is turned off only when the DC / DC converter is started up, and the dropper circuit 8 is operated. After the DC / DC converter is started up, the FET Q6 is turned on to short-circuit the Zener diode ZD1, thereby dropping the dropper circuit. This is for stopping the operation of the circuit 8.

[0086] FETQ6 gate is connected to a connection node between the resistor R21 connected in series Zener diode ZD3, the drain is connected to the base of the transistor Q1, the source is connected to the input terminal I ₂ ing.

[0087] FETQ6 threshold voltage V _th of the is equivalent to the reference voltage V _ref of the third embodiment is as determined by the rising characteristics and the regulator IC10 of guaranteed activations time of the input DC voltage V _i.

FIG. 10 is a time chart of FIG.
Hereinafter, the operation of the DC / DC converter of FIG. 8 will be described with reference to FIG. As shown in FIG. 10, it is from 0V instantaneously using a switch that applies the input voltage V _i to the stationary voltage. When the input voltage V _i is applied, the resistance R2
1 and the time constant of the capacitor C3, the capacitor C3 is charged, the voltage V ₁ gradually rises, and t ₀ ≦ t ≦
In _{t 5, V 1 ≦ V th} , at t ₅ <t, V _th <
The V _1.

The N-FET Q6 operates at the voltage V ₁ (V ₁ =
V _gs : the voltage between the gate and the source of the FET Q6) is input to the gate. At t ₀ ≦ t ≦ t ₅ , V _gs ≦ V _th, so that it is turned off, and at t ₅ <t, V _th <V _gs So,
Turn on.

Voltage V of Zener diode ZD1
_ZD1 when the t ₀ ≦ t ≦ t _5, since N-FET Q6 is turned off, is clamped to a constant voltage, the transistor Q1 is turned on, the regulator IC10 is starting voltage is supplied from the dropper circuit 8 side, Is activated. This gives D
The C / DC converter is activated.

On the other hand, the voltage V of the Zener diode ZD1
_ZD1, in t ₅ <t, N-FETQ6 is turned on,
Since the ON resistance of the N-FET Q6 is sufficiently smaller than the resistance R1, the voltage becomes about 0 V, the transistor Q1 turns off, the operation of the dropper circuit 8 stops, and the regulator IC 10
, A power supply voltage is supplied from the tertiary winding 6 side.

According to the fourth embodiment described above, the third
There is an effect similar to that of the embodiment. Fifth Embodiment FIG. 11 is a block diagram of a DC / DC converter according to a fifth embodiment of the present invention, wherein substantially the same components as those in FIG. 16 are denoted by the same reference numerals.

The DC / DC converter shown in FIG.
6 is different from the DC / DC converter shown in FIG. 6 in that the output voltage of the secondary winding 4 is monitored to check whether the DC / DC converter has been started. A resistor R for stopping the dropper circuit 8
31, R32, R33, voltage stabilizing circuit 50, comparator 5
2 and the photocoupler 54 are provided.

[0094] resistor R31, R32 is for dividing the DC voltage V _out to be outputted from the output terminal O _1, are connected in series between the output terminal O ₁ and click round side. Here, the DC voltage is divided by the comparator 52
This is for setting the operating voltage range as follows.

[0095] resistor R33 is used to limit the current flowing to the light emitting diode of the photocoupler 54 is connected between the output terminal O ₁ and the anode of the light emitting diode.

The voltage stabilizing circuit 50 is constructed in the same manner as the voltage stabilizing circuit 40 in FIG. 2, and has input terminals I ₁ , I ₂
The reference voltage V _ref1 is generated from the DC voltage output from the controller.

The comparator 52 sets the high level when the input voltage at the terminal (+)> the input voltage at the terminal (−), and sets the low level when the input voltage at the terminal (+) ≦ the input voltage at the terminal (−). Output. The terminal (+) has a voltage stabilizing circuit 50
Output voltage V _ref1 is input, and the terminal (−) is connected to a resistor R
31, the voltage V ₃ of R32 connection node is entered.

The photocoupler 54 includes a light emitting diode that emits light when forward biased, and a light receiving diode that turns on when the light emitting diode emits light. The resistor R33 is connected to the anode of the light emitting diode, and the output terminal of the comparator 52 is connected to the cathode. A transistor Q is connected to each of the two electrodes of the light receiving diode.
1 of the base, the input terminal I ₂ is connected.

FIG. 12 is a time chart of FIG. Hereinafter, the operation of the DC / DC converter of FIG. 11 will be described with reference to FIG. When the input voltage V _i is applied, the input voltage V _i and the voltage drop by the dropper circuit 8, through Taiodo D1, a DC voltage is applied to the power pin of the regulator IC 10.

When a DC voltage is applied to the power supply pin, the regulator IC 10 goes through a standby state,
Activated and outputs a drive pulse to the gate of FET Q2. The DC / DC converter by the drive pulse is activated, the DC voltage V _out is output from the output terminal O _1.

[0102] resistor R31, R32 is a direct-current voltage V _out output from the output terminal O ₁ by dividing the voltage V ₃ terminal of the comparator 52 - outputs to the (). The voltage V ₃ is DC / D
Until the C converter is started, it is low level.
DC / DC converter is activated, at time t _6, a high level exceeding the reference voltage V _ref1.

The voltage stabilizing circuit 50 has input terminals I ₁ , I
Generates a reference voltage V _ref1 from the DC voltage V _i output from ₂ is output to the terminal (+) of the comparator 52. Reference voltage V _{re f1} is immediately become a constant voltage when the input voltage V _i rises.

Here, the reference voltage V_ref1Is the DC / DC
When the inverter is activated, the voltage V _ThreeSmaller than
Is set in advance as follows. Note that the reference voltage V_ref1Is the output
Terminal O₁, O_TwoMay be generated from the output voltage
No.

The comparator 52 compares the input voltage of the terminal (+) with the input voltage of the terminal (−), and if the terminal (+)> the terminal (−),
If high level, terminal (+) ≦ terminal (−), low level is output.

Therefore, until the DC / DC converter is started, the output _Vcp3 of the comparator 52 is at the high level. When the DC / DC converter is started, the output of the comparator 52 is high.
Output _Vcp3 becomes low level.

The light emitting diode constituting the photocoupler 54 _does not emit light because the output _Vcp3 of the comparator 52 becomes high level and is reverse biased until the DC / DC converter is started. When the converter is started, the output V _CP3 of the comparator 52 becomes low level and the anode side becomes high level, so that it is forward biased and emits light.

Since the light-emitting diode constituting the photocoupler 54 does not emit light until the DC / DC converter is started, it is turned off. When the DC / DC converter is started, the light-emitting diode emits light. Turn on.

When the light receiving diode is off, the Zener diode ZD1 is not short-circuited, and the output voltage of the dropper circuit 8 is applied to the regulator IC 10. When the light receiving diode is turned on, the Zener diode ZD1 is short-circuited and the dropper circuit is turned off. The output of 8 stops.

That is, the regulator IC 10 has a DC / D
Until the C converter is activated, the output voltage of the dropper circuit 8 is operated as a power supply. When the DC / DC converter is activated, the output of the dropper circuit 8 is stopped and the output voltage of the tertiary winding 6 is supplied to the power supply. Works as

According to the fifth embodiment described above, the first
There is an effect similar to that of the embodiment. Sixth Embodiment FIG. 13 is a block diagram of a DC / DC converter according to a sixth embodiment of the present invention. Elements that are substantially the same as those in FIG. 16 are given the same reference numerals.

The DC / DC converter shown in FIG.
6 is different from the DC / DC converter shown in FIG. 6 in that the output voltage of the tertiary winding 6 is monitored to check whether or not the DC / DC converter has been started. A diode D3, a capacitor C3, a resistor R41 and a photo MO for stopping the dropper circuit 8
That is, the S relay 60 is provided.

When a voltage is induced in the tertiary winding 6 and the anode is forward-biased, the diode D3 turns on and charges the capacitor C3. The capacitor C3 charges and discharges with the voltage induced in the tertiary winding 6 and converts it into a DC voltage, and is connected to the cathode side of the diode D3 and the ground.

The reason why the capacitor C3 is provided is that the DC / DC
When the converter is started, the induced voltage V ₄ induced in the tertiary winding 6 is an AC voltage, and after the DC / DC converter is started, the photo MOS relay 60 is always turned on.
The zener diode ZD1 is short-circuited and the dropper circuit 8
This is because it is necessary to stop the output.

The resistor R41 is for limiting the current flowing to the light emitting diode of the photo MOS relay 60. The resistor R41 is connected to the cathode side of the diode D3, the tertiary winding 6 side, and the anode side of the light emitting diode of the photo MOS relay 60.

The photo MOS relay 60 includes a light emitting diode that emits light when forward biased, and a light receiving diode that turns on when the light emitting diode emits light. The resistor R41 is connected to the anode of the light emitting diode of the photo MOS relay 60, and the input terminal I is connected to the cathode.
₂ is connected. The base of the transistor Q1 and the input terminal I2 are connected to _two electrodes of the light receiving diodes of the photo MOS relays 60 and 62, respectively.

FIG. 14 is a time chart of FIG. Hereinafter, the operation of the DC / DC converter of FIG. 13 will be described with reference to FIG. When the input voltage V _i is applied, the input voltage V _i and the voltage drop by the dropper circuit 8, through Taiodo D1, a DC voltage is applied to the power pin of the regulator IC 10.

When a DC voltage is applied to the power supply pin, the regulator IC 10 goes through a standby state,
Activated and outputs a drive pulse to the gate of FET Q2. The drive pulse activates the DC / DC converter, outputs a DC voltage from the output terminal O _1, and induces a voltage V _{4 in the} tertiary winding 6.

Since the tertiary winding 6 is configured as a buck-boost type, when the voltage V _{4 is} induced in the tertiary winding 6, when the drive pulse is at a low level, the diode D3 is turned on.
The capacitor C3 is charged.

When the diode D3 is turned on, the capacitor C3 is charged and outputs a DC voltage to the resistor R41.
The light emitting diode of the photo MOS relay 60 is DC / D
Until the C converter is activated, it is not forward biased,
Although no light is emitted, when the DC / DC converter is activated and a DC voltage is output from the capacitor C3,
The light is forward-biased through the resistor R41 and emits light.

The light receiving diode of the photo MOS relay 60 turns on when the light emitting diode emits light, and turns off when the light emitting diode does not emit light. Therefore, when the output voltage V _{4 of the} tertiary winding 6 is not present, the light receiving diode of the photo MOS relay 60
It turns off when the voltage V ₄ is induced in the tertiary winding 6.

The Zener diode ZD1 has a photo MO
When receiving diode of S relay 60 is turned off, no short-circuit, the receiving diode of the photo MOS relay 60 is turned on, a current flows into the input terminal I ₂ side from the base of the transistor Q1, short-dropper circuit 8 operates And the power supply voltage is supplied from the tertiary winding 6 side.

[0122] regulator IC10, when the rise of the DC voltage V _i is the Zener diode ZD1 is without short, the output voltage of the dropper circuit 8 is powered, DC /
The DC converter is activated.

When the voltage V ₄ is induced in the tertiary winding 6 in which the DC / DC converter is activated, the regulator IC 10 short-circuits the Zener diode ZD1, stops the output of the dropper circuit 8, stops the tertiary winding. the output voltage V ₄ of the line 6, through the diode D2, the power is supplied.

According to the sixth embodiment described above, the first
There is an effect similar to that of the embodiment. Seventh Embodiment FIG. 15 is a block diagram of a DC / DC converter according to a seventh embodiment of the present invention. Elements that are substantially the same as those in FIG. 13 are given the same reference numerals.

The DC / DC converter shown in FIG.
3 is different from the DC / DC converter shown in FIG.
After the start of the C converter, the photo MOS relay 7 is used to cut off the output terminal of the dropper circuit 8 and the diode D1 instead of short-circuiting the zener diode ZD1.
0 is provided.

The photo MOS relay 70 includes a light emitting diode that emits light when forward biased, and a normally-on type light receiving diode that turns on when the light emitting diode does not emit light and turns off when the light emitting diode does not emit light.

The resistor R41 is connected between the cathode of the diode D3 and the anode of the light emitting diode of the photo MOS relay 70. Photo MOS relay 70
Of the anode of the light emitting diode, the resistor R41 is connected to the cathode, the input terminal I ₂ is connected. The two electrodes of the light receiving element of the photo MOS relay 70 are connected between the emitter of the transistor Q1 and the cathode of the diode D2.

The operation of the DC / DC converter shown in FIG. 15 will be described below. When the input voltage V _i is applied, the input voltage V _i and the voltage drop by the dropper circuit 8, through Taiodo D1, a DC voltage is applied to the power pin of the regulator IC 10.

When a DC voltage is applied to the power supply pin, the regulator IC 10 goes through a standby state,
Activated and outputs a drive pulse to the gate of FET Q2. The drive pulse activates the DC / DC converter, outputs a DC voltage from the output terminal O _1, and induces a voltage V _{4 in the} tertiary winding 6.

[0130] The voltage V ₄ that is induced in the tertiary winding 6, as in the sixth embodiment, is charged capacitor C3, a DC voltage is applied to the resistor R41. Thereby, the light emitting diode of the photo MOS relay 70 is DC
Since the output voltage V ₄ does not exist from the tertiary winding 6 until the / DC converter is started, no light is emitted. When the DC / DC converter is started, the voltage V ₄ is induced from the tertiary winding 6. And emits light when forward biased.

The light receiving diode of the photo MOS relay 70 turns off when the light emitting diode emits light, and turns on when the light emitting diode does not emit light. Therefore, the light receiving diode of the photo MOS relay 70 is turned on because the light emitting diode does not emit light until the DC / DC converter is started, and the DC / DC converter is turned on.
When the DC converter is started, the light emitting diode emits light and turns off.

[0132] regulator IC10, when the rise of the DC voltage V _i, the photo MOS relay 70 is turned on, the output voltage of the dropper circuit 8 is powered, DC / DC converter is activated.

When the DC / DC converter is activated and the output voltage V ₄ is induced in the tertiary winding 6, the photo MOS relay 70 is turned off, the output of the dropper circuit 8 is cut off, and the output of the dropper circuit 8 is cut off. through the diode D2, the output voltage V ₄ of the winding 6, the power is supplied.

According to the seventh embodiment described above, the first
There is an effect similar to that of the embodiment. In the first to sixth embodiments, the transistor Q1 is turned off after the DC / DC converter is started. However, a switch circuit such as an FET is connected between the diode D3 and the main terminal of the dropper circuit 8. And the rise detection signals of the first to sixth embodiments (the output signal of the AND gate 45 in FIGS. 2 and 5, the output signal of the comparator 42 in FIG. 7, and the voltage of the capacitor C3 in FIG. 9).
Alternatively, the induced voltage detection signal (the output signal of the comparator 52 in FIG. 11, the light emitting signal of the light emitting diode of the photo MOS relay 60 or the charging voltage of the capacitor C3 in FIG. 13) is
The voltage may be applied to an ET or an optical switch, and the switch may be turned off after the DC / DC converter is activated.

For example, in the first embodiment, the resistors R14,
The output of the AND gate 45 may be input to the gate of the switch circuit without the diode D3. Conversely, the induced voltage detection signal (photo MO in FIG. 15) of the seventh embodiment
The zener diode ZD1 may be short-circuited from the light-emitting signal of the light-emitting diode of the S relay 70 or the charging voltage of the capacitor C3 to turn off the transistor Q1.

[0136]

As described above, according to the present invention,
Until the DC / DC converter is activated, power is supplied to the pulse width control circuit based on the output voltage of the activation circuit,
When the DC / DC converter is started, the output of the starting circuit is stopped or the power supply of the output of the starting circuit to the pulse width control circuit is cut off and the power is supplied from the auxiliary winding. Can be.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a configuration diagram of a DC / DC converter according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of a stabilized power supply circuit in FIG. 2;

FIG. 4 is a time chart of FIG. 2;

FIG. 5 is a configuration diagram of a DC / DC converter according to a second embodiment of the present invention.

FIG. 6 is a time chart of FIG. 5;

FIG. 7 is a configuration diagram of a DC / DC converter according to a third embodiment of the present invention.

FIG. 8 is a time chart of FIG. 7;

FIG. 9 is a configuration diagram of a DC / DC converter according to a fourth embodiment of the present invention.

FIG. 10 is a time chart of FIG. 9;

FIG. 11 is a configuration diagram of a DC / DC converter according to a fifth embodiment of the present invention.

FIG. 12 is a time chart of FIG. 11;

FIG. 13 is a configuration diagram of a DC / DC converter according to a sixth embodiment of the present invention.

FIG. 14 is a time chart of FIG.

FIG. 15 is a configuration diagram of a DC / DC converter according to a seventh embodiment of the present invention.

FIG. 16 is a configuration diagram of a conventional DC / DC converter.

[Explanation of symbols]

 Reference Signs List 20 primary winding 24 switch circuit 26 auxiliary winding 28 pulse width control circuit 30 start-up circuit 32 rising detection circuit 34 comparison circuit

Claims (13)

[Claims] A primary winding for inputting a DC input voltage; a switch circuit connected to the primary winding; a pulse width control circuit for generating a pulse for turning on / off the switch circuit; A starting circuit that receives an input voltage and outputs a first power supply voltage; an auxiliary winding that forms the primary winding and a transformer and outputs a second power supply voltage; A comparison circuit that compares the power supply voltage and outputs one of the power supply voltages to the pulse width control circuit; and detects a rise of the DC input voltage and is active only for a predetermined time from the rise of the DC input voltage. West,
Thereafter, a rise detection circuit that outputs a rise detection signal to be inactive is provided. When the rise detection signal indicates active, the start circuit is operated, and the rise detection signal is inactive. A DC / DC converter characterized by stopping the operation of the starting circuit when indicating active. 2. A primary winding for inputting a DC input voltage; a switch circuit connected to the primary winding; a pulse width control circuit for generating a pulse for turning on / off the switch circuit; A starting circuit that receives an input voltage and outputs a first power supply voltage; an auxiliary winding that forms the primary winding and a transformer and outputs a second power supply voltage; A comparison circuit that compares one of the power supply voltages with the power supply voltage and outputs one of the power supply voltages to the pulse width control circuit; and checks an induced voltage induced by the primary winding, and the voltage is induced. An activation voltage detection circuit that outputs an induction voltage detection signal that activates and, when the voltage is not induced, inactivates the voltage, the activation is performed when the induction voltage detection signal indicates inactivity. circuit Is operated, the auxiliary when the power detection signal indicates active, DC / DC converter, characterized in that stops the operation of the starting circuit. 3. A primary winding for inputting a DC input voltage, a first switch circuit connected to the primary winding, and a pulse width control circuit for generating a pulse for turning on / off the first switch circuit. A starting circuit that receives the DC input voltage and outputs a first power supply voltage; an auxiliary winding that forms the primary winding and a transformer and outputs a second power supply voltage; A second switch circuit that passes / blocks the first power supply voltage; and compares an output voltage of the second switch circuit with the second power supply voltage, and outputs one of the voltages to the pulse width control circuit. A comparing circuit that detects the rise of the DC input voltage, and activates it for a fixed time from the rise of the DC input voltage;
A rising edge detection circuit for outputting a rising edge detection signal for inactivating thereafter, and when the rising edge detection signal indicates active, the second switch circuit is turned on and the first power supply is turned on. Outputting a voltage to the comparison circuit, and when the rise detection signal indicates inactive, turning off the second switch circuit;
A DC / DC converter, wherein the output of the first power supply voltage to the comparison circuit is cut off. 4. A primary winding for inputting a DC input voltage, a first switch circuit connected to the primary winding, a pulse width control circuit for generating a pulse for turning on / off the switch circuit, A starting circuit that receives the DC input voltage and outputs a first power supply voltage; an auxiliary winding that forms the primary winding and a transformer and outputs a second power supply voltage; A second switch circuit for passing / cutting off an output of one power supply voltage, comparing an output voltage of the second switch circuit with the second power supply voltage, and outputting one of the voltages to the pulse width control circuit An induced voltage detection signal that checks an induced voltage induced by the primary winding, activates the voltage if it is induced, and inactivates the voltage if the voltage is not induced. Output induction A pressure detection circuit, wherein when the induced voltage detection signal indicates inactive, the second switch circuit is turned on, the first power supply voltage is output to the comparison circuit, and the induced voltage detection signal is output. Wherein the DC / DC converter turns off the second switch circuit and shuts off the output of the first power supply voltage to the comparison circuit. 5. The rising detection circuit includes: a first voltage divider that divides the DC input voltage and outputs a first divided voltage; and a voltage divider that divides the DC input voltage to produce a first divided voltage. A second voltage divider that outputs a second divided voltage that is larger than the first divided voltage at the first and second points in time when the DC input voltage is input and the DC input voltage becomes a stable voltage. And a reference voltage generating circuit that generates a reference voltage set to be equal to the second divided voltage, and a first comparison signal that compares the first divided voltage with the reference voltage and indicates a magnitude thereof. A second comparison circuit that compares the second divided voltage with the reference voltage and outputs a second comparison signal indicating the magnitude of the second divided voltage and the reference voltage; and the first and second comparison signals. And enter the first and second
4. The DC according to claim 1, further comprising: a detection signal output circuit that outputs the rise detection signal indicating a time point.
/ DC converter. 6. The D according to claim 5, wherein the first or second voltage divider further includes a delay circuit for delaying a rise of the first or second divided voltage.
C / DC converter. 7. The rising detection circuit, comprising: a voltage divider that divides the DC input voltage and outputs a divided voltage; and a voltage divider that inputs the DC voltage until the DC input voltage becomes a stable voltage. At a certain point in time, a reference voltage generation circuit that generates a reference voltage set to be equal to the divided voltage, and a second circuit that compares the divided voltage with the reference voltage and outputs the rise detection signal. 4. The DC according to claim 1, further comprising: a comparison circuit.
/ DC converter. 8. The DC / DC converter according to claim 7, wherein the voltage divider further includes a delay circuit that delays a rise of the divided voltage. 9. The control circuit according to claim 1, wherein the starting circuit includes a resistor and a Zener diode connected in series between the DC input voltage and a third power supply voltage, and a control signal from a connection node between the resistor and the Zener diode. And a third switch circuit for turning on / off between a first electrode for inputting a voltage based on the DC input voltage and a second electrode for outputting the first power supply voltage. Provided between a power supply voltage and the connection node;
The D switch according to claim 1, further comprising a fourth switch circuit that turns off when the rising detection signal is active and turns on when the rising detection signal is inactive.
C / DC converter. 10. The starting circuit, comprising: a resistor and a Zener diode connected in series between the DC input voltage and a third power supply voltage; and a control signal from a connection node between the resistor and the Zener diode. And a third switch circuit for turning on / off between a first electrode for inputting a voltage based on the DC input voltage and a second electrode for outputting the first power supply voltage. Provided between a power supply voltage and the connection node;
When the induced voltage detection signal is inactive, turn off,
When the induced voltage detection signal is active, turn on the fourth
3. The apparatus according to claim 2, further comprising a switch circuit.
A DC / DC converter as described. 11. The induced voltage detection circuit, comprising: a reference voltage generation circuit that receives the DC input voltage and generates a reference voltage; and compares the induced voltage with the reference voltage to generate an induced voltage detection signal. 5. A DC according to claim 2, further comprising: a fourth comparison circuit that outputs
/ DC converter. 12. The induced voltage detection circuit inputs a voltage induced by the primary winding, and emits a light emission signal when the voltage is induced and emits no light when the voltage is not induced. The DC / DC converter according to claim 10, further comprising a light emitting element that outputs an induced voltage detection signal, wherein the fourth switch circuit turns on / off according to the light emission signal. 13. The induced voltage detection circuit inputs a voltage induced by the primary winding and emits a light emission signal when the voltage is induced and emits no light when the voltage is not induced. The DC / DC converter according to claim 4, further comprising a light emitting element that outputs an induced voltage detection signal, wherein the second switch circuit is turned on / off in accordance with the light emission signal.