JPH11121896A - Circuit wiring board and method of manufacturing the same - Google Patents
Circuit wiring board and method of manufacturing the sameInfo
- Publication number
- JPH11121896A JPH11121896A JP28325197A JP28325197A JPH11121896A JP H11121896 A JPH11121896 A JP H11121896A JP 28325197 A JP28325197 A JP 28325197A JP 28325197 A JP28325197 A JP 28325197A JP H11121896 A JPH11121896 A JP H11121896A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- solder
- mother
- sub
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/366—Assembling printed circuits with other printed circuits substantially perpendicularly to each other
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】
【課題】本発明は、高密度三次元実装構造の実現に適し
た回路配線基板及びその製造方法に関する。
【解決手段】本発明は、母配線基板と、前記母配線基板
に実装される従配線基板と、前記母配線基板と前記従配
線基板とを電気的且つ機械的に接続する半田継手とを具
備する。
(57) Abstract: The present invention relates to a circuit wiring board suitable for realizing a high-density three-dimensional mounting structure and a method of manufacturing the same. The present invention includes a motherboard, a subsidiary board mounted on the motherboard, and a solder joint for electrically and mechanically connecting the motherboard and the subsidiary board. I do.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、母配線基板(マザ
ーボード)に対して従配線基板が組立てられてなる回路
配線基板及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit wiring board in which a sub wiring board is assembled on a mother wiring board (mother board) and a method of manufacturing the same.
【0002】[0002]
【従来の技術】一般に、母配線基板(マザーボード)8
1に対して従配線基板82を組立て・実装する場合、図
22に示すように、母配線基板81に半田付けされたコ
ネクタ83を利用していた。このコネクタ83は、上方
が開放された有底箱型のフレーム84と、このフレーム
84の両側部から延出され母配線基板81の電極85に
半田付けされるリード86と、フレーム84の嵌合穴8
4の内壁面に設けられ従配線基板82と電気的に接続す
るための接点87とを具備している。すなわち、従配線
基板82は、嵌合穴84aにより機械的に保持されると
ともに、接点87により電気的に接続される。2. Description of the Related Art In general, a mother wiring board (mother board) 8
In the case of assembling and mounting the sub wiring board 82 with respect to No. 1, the connector 83 soldered to the mother wiring board 81 is used as shown in FIG. The connector 83 includes a box-shaped frame 84 having an open top, leads 86 extending from both sides of the frame 84 and soldered to the electrodes 85 of the motherboard 81, and fitting of the frame 84. Hole 8
4 and a contact 87 provided on the inner wall surface for electrical connection with the sub-wiring board 82. That is, the sub wiring board 82 is mechanically held by the fitting holes 84 a and is electrically connected by the contact points 87.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、前記従
来のコネクタ83を介して、母配線基板81に対して従
配線基板82を組立て・実装する方式は、コネクタ83
などの別部品を利用するため、部品点数並びに実装工数
が増加するばかりか接続点数に制約を受ける等の欠点を
もっている。However, the method of assembling and mounting the slave wiring board 82 on the mother wiring board 81 via the conventional connector 83 is the same as that of the connector 83.
However, the use of separate components such as these has the drawback that not only the number of components and the number of mounting steps increase but also the number of connection points is restricted.
【0004】このため、母配線基板81に対して複数の
従配線基板82を実装する場合、コネクタ83を介する
分だけ余分のスペースが必要となる結果、省空間の障害
となる。このことは、近時、強力に推進されている高密
度三次元実装構造の実現の妨げともなっている。本発明
は、前記従来の欠点を参酌してなされたもので、高密度
三次元実装構造の実現に適した回路配線基板及びその製
造方法を提供することを目的とする。[0004] For this reason, when a plurality of sub-wiring boards 82 are mounted on the mother wiring board 81, an extra space is required for the interposition of the connector 83, which is an obstacle to space saving. This has hindered the realization of a high-density three-dimensional mounting structure that has been strongly promoted in recent years. SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described conventional drawbacks, and has as its object to provide a circuit wiring board suitable for realizing a high-density three-dimensional mounting structure and a method for manufacturing the same.
【0005】[0005]
【課題を解決するための手段】請求項1の回路配線基板
は、母配線基板と、前記母配線基板に実装される従配線
基板と、前記母配線基板と前記従配線基板とを電気的且
つ機械的に接続する半田継手とを具備する。According to a first aspect of the present invention, there is provided a circuit wiring board comprising: a mother wiring board; a sub-wiring board mounted on the mother wiring board; A mechanically connected solder joint.
【0006】請求項2の回路配線基板は、請求項1にお
いて、前記母配線基板及び前記従配線基板には端子電極
が形成され、前記半田継手は、前記端子電極に接合され
ている。According to a second aspect of the present invention, in the first aspect, a terminal electrode is formed on the mother wiring substrate and the slave wiring substrate, and the solder joint is joined to the terminal electrode.
【0007】請求項3の回路配線基板は、請求項1にお
いて、前記母配線基板の主板面には、複数の前記従配線
基板がそれらの主板面を前記母配線基板の主板面に前記
半田継手を介して直交させて実装されている。According to a third aspect of the present invention, there is provided the circuit wiring board according to the first aspect, wherein a plurality of the sub wiring boards have their main plate faces on the main plate face of the mother wiring board and the solder joints on the main plate face of the mother wiring board. Are implemented orthogonally.
【0008】請求項4の回路配線基板は、請求項1にお
いて、前記母配線基板に主板面を直交させて実装された
複数の前記従配線基板の隣接する一対の従配線基板に前
記半田継手を介して他の従配線基板が前記母配線基板に
平行に実装されている。According to a fourth aspect of the present invention, there is provided the circuit wiring board according to the first aspect, wherein the solder joint is attached to a pair of sub-wiring boards adjacent to the plurality of sub-wiring boards mounted on the mother wiring board with a main plate surface orthogonal thereto. Another sub-wiring board is mounted in parallel with the mother wiring board.
【0009】請求項5の回路配線基板は、請求項1にお
いて、前記母配線基板に接続されている前記従配線基板
の端部とは反対側の端部も母配線基板が接続されてい
る。請求項6の回路配線基板の製造方法は、母配線基板
と、前記母配線基板に実装される従配線基板とを具備
し、前記母配線基板及び前記従配線基板には対応関係に
ある端子電極が各別に設けられてなる回路配線基板の製
造方法において、前記端子電極端子電極に半田バンプを
形成する半田バンプ形成工程と、この半田バンプ形成工
程後に前記従配線基板を前記母配線基板に位置決めし前
記対応関係にある端子電極の半田バンプどうしを近接さ
せる基板組立工程と、この基板組立工程後に前記半田バ
ンプをリフローして前記近接した半田バンプどうし融合
させたのち冷却して前記母配線基板と前記従配線基板と
を電気的且つ機械的に接続する半田継手を得る半田継手
形成工程とを具備する。According to a fifth aspect of the present invention, in the circuit wiring board according to the first aspect, the mother wiring board is also connected to an end opposite to the end of the slave wiring board connected to the mother wiring board. 7. The method for manufacturing a circuit wiring board according to claim 6, further comprising a mother wiring board, and a sub-wiring board mounted on the mother wiring board, and terminal electrodes corresponding to the mother wiring board and the sub-wiring board. In the method for manufacturing a circuit wiring board, each of which is provided separately, a solder bump forming step of forming a solder bump on the terminal electrode, and positioning the slave wiring board on the mother wiring board after the solder bump forming step. A board assembling step of bringing the solder bumps of the terminal electrodes having the corresponding relationship close to each other, and after the board assembling step, the solder bumps are reflowed so that the adjacent solder bumps are fused and cooled, and then the mother wiring board is cooled. A solder joint forming step of obtaining a solder joint for electrically and mechanically connecting to the slave wiring board.
【0010】請求項7の回路配線基板の製造方法は、請
求項6において、半田バンプ形成工程にて形成される半
田バンプの形状は、円柱状である。請求項8の回路配線
基板の製造方法は、請求項7において、球状の半田バン
プは、端子電極以外の領域をレジスト膜で被覆すること
による選択的半田めっきにより形成する。According to a seventh aspect of the present invention, in the method of the sixth aspect, the shape of the solder bump formed in the solder bump forming step is cylindrical. In a method of manufacturing a circuit wiring board according to claim 8, in claim 7, the spherical solder bump is formed by selective solder plating by covering a region other than the terminal electrode with a resist film.
【0011】請求項9の回路配線基板の製造方法は、請
求項7において、前記母配線基板には2列に沿って円柱
状の半田バンプが突設され、前記基板組立工程において
は、これらの半田バンプにより前記従配線基板を前記母
配線基板に仮固定する。According to a ninth aspect of the present invention, in the method for manufacturing a circuit wiring board according to the seventh aspect, columnar solder bumps are protruded along the two rows on the mother wiring board. The slave wiring board is temporarily fixed to the mother wiring board by solder bumps.
【0012】請求項10の回路配線基板の製造方法は、
請求項6において、半田バンプ形成工程にて形成される
半田バンプの形状は、球状である。請求項11の回路配
線基板の製造方法は、請求項10において、球状の半田
バンプは、端子電極に配置された半田ボールを溶融する
ことにより形成する。According to a tenth aspect of the present invention, there is provided a method for manufacturing a circuit wiring board.
In claim 6, the shape of the solder bump formed in the solder bump forming step is spherical. In a method of manufacturing a circuit wiring board according to an eleventh aspect, in the tenth aspect, the spherical solder bump is formed by melting a solder ball disposed on the terminal electrode.
【0013】[0013]
【発明の実施の形態】以下、本発明の一実施形態を図面
を参照して詳述する。図1は、この実施形態の回路配線
基板1を示している。この回路配線基板1は、上下一対
の母配線基板2と、この母配線基板2に対し板面が直交
し且つ挟装状態にて組立て・実装された複数(例えば7
枚)の従配線基板3と、これら母配線基板2と従配線基
板3とを電気的且つ機械的に接続する例えば共晶半田か
らなる半田継手4とを具備している。なお、図示せぬ
が、母配線基板2及び従配線基板3には、電子部品が搭
載されている。An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a circuit wiring board 1 of this embodiment. The circuit wiring board 1 includes a pair of upper and lower mother wiring boards 2, and a plurality (for example, 7) assembled and mounted with the board surfaces orthogonal to the mother wiring board 2 and sandwiched therebetween.
), And a solder joint 4 made of, for example, eutectic solder for electrically and mechanically connecting the mother wiring board 2 and the sub-wiring board 3. Although not shown, electronic components are mounted on the mother wiring board 2 and the sub wiring board 3.
【0014】しかして、母配線基板2は、図2に示すよ
うに、長方形をなす例えばガラスエポキシ樹脂からなる
例えば縦200mm,横50mm,厚さ1.0mmの基
板本体2aと、この基板本体2aの一方の主面の長手方
向中央部に沿って等間隔2列(矢印R1,R2方向)に
敷設された円形(直径例えば0.6mm)をなす銅製の
端子電極2bと、基板本体2aの主面上に形成され且つ
前記端子電極2bに電気的に接続される配線パターン
(図示せず)とを有している。As shown in FIG. 2, the mother wiring board 2 is made of a rectangular body made of, for example, glass epoxy resin and has a length of, for example, 200 mm, a width of 50 mm, and a thickness of 1.0 mm. A copper terminal electrode 2b having a circular shape (diameter of, for example, 0.6 mm) laid in two rows (arrows R1 and R2 directions) at equal intervals along the central portion in the longitudinal direction of one main surface of the main body 2a; And a wiring pattern (not shown) formed on the surface and electrically connected to the terminal electrode 2b.
【0015】一方、従配線基板3は、図3に示すよう
に、長方形をなす例えばガラスエポキシ樹脂からなる例
えば縦40mm,横50mm,厚さ1.0mmの基板本
体3aと、この基板本体3aの両方の主面の長手方向縁
部に沿って等間隔1列に敷設された円形(直径例えば
0.6mm)をなす銅製の端子電極3bと、基板本体3
aの主面上に形成され且つ前記端子電極3bに電気的に
接続される配線パターン(図示せず)とを有している。On the other hand, as shown in FIG. 3, the slave wiring board 3 is made of a rectangular epoxy glass resin, for example, having a length of 40 mm, a width of 50 mm, and a thickness of 1.0 mm. A circular (diameter of, for example, 0.6 mm) copper terminal electrode 3b laid in a row at equal intervals along the longitudinal edges of both main surfaces;
and a wiring pattern (not shown) that is formed on the main surface of a and electrically connected to the terminal electrode 3b.
【0016】ここで、端子電極3b一つ当り一対の端子
電極2bが対応するように配置されている。なお、図示
せぬが、母配線基板2及び従配線基板3の配線パターン
には、チップ状部品が搭載されている。Here, a pair of terminal electrodes 2b are arranged corresponding to one terminal electrode 3b. Although not shown, chip-shaped components are mounted on the wiring patterns of the mother wiring board 2 and the sub wiring board 3.
【0017】しかして、半田継手4は、図4及び図5に
示すように、円弧状をなし、その両端部は、一対の端子
電極2bに接合されている。また、半田継手4の中途部
は、端子電極3bに接合されている。その結果、上下母
配線基板2に対して従配線基板3が、半田継手4を介し
て、等間隔(例えば15mm間隔)で機械的に固定され
ていると同時に、電気的に接続されている。このような
半田継手4は、各従配線基板3の下端部両側及び上端部
両側に例えば1.27mm間隔で50個設けられてい
る。As shown in FIGS. 4 and 5, the solder joint 4 has an arc shape, and both ends are joined to the pair of terminal electrodes 2b. Further, an intermediate portion of the solder joint 4 is joined to the terminal electrode 3b. As a result, the slave wiring board 3 is mechanically fixed to the upper and lower wiring boards 2 at equal intervals (for example, 15 mm intervals) via the solder joints 4 and is also electrically connected. Fifty such solder joints 4 are provided on both sides of the lower end portion and both sides of the upper end portion of each slave wiring board 3 at, for example, 1.27 mm intervals.
【0018】しかして、この実施形態の回路配線基板1
は、コネクタなどの接続手段を必要とせずして、電気的
接続と機械的接合を同時に得ることができる。また、コ
ネクタなどの接続手段を利用する場合に比べて省空間が
可能となるので、母配線基板2に対する従配線基板3の
配置間隔を小さくすることができ高密度実装の推進に寄
与することができる。さらに、コネクタなどの接続手段
を利用する場合に比べて部品点数が少なくて済むので、
コスト低減にも寄与できる。また、コネクタによる電気
的接続よりも半田による電気的接続のほうが接続の信頼
性が高く、当該回路配線基板1を組み込んだ装置の品質
向上にも寄与できる。Thus, the circuit wiring board 1 of this embodiment
Can simultaneously obtain an electrical connection and a mechanical connection without the need for a connecting means such as a connector. Further, space saving is possible as compared with the case of using a connecting means such as a connector, so that the arrangement interval of the sub-wiring board 3 with respect to the mother wiring board 2 can be reduced, which contributes to promotion of high-density mounting. it can. Furthermore, since the number of parts can be reduced as compared with the case where a connecting means such as a connector is used,
It can also contribute to cost reduction. Further, the electrical connection using solder has higher reliability than the electrical connection using a connector, which can contribute to the improvement of the quality of an apparatus incorporating the circuit wiring board 1.
【0019】つぎに、上記構成の回路配線基板1の製造
方法について述べる。この実施形態の回路配線基板1の
製造方法は、図6に示すように、母配線基板2及び従配
線基板3の端子電極2b,3b上に例えば径が0.6m
mの円柱状の半田バンプ6,7を形成する半田バンプ形
成工程(図6のステップS1参照)と、この半田バンプ
形成工程後に母配線基板2に対して従配線基板3を半田
バンプ6,7を介して組立て仮付け回路配線基板1aを
形成する基板組立工程(図6のステップS2参照)と、
この基板組立工程後に仮付け回路配線基板1aをリフロ
ー炉(図示せず)内にて例えば200°で3分加熱し半
田バンプ6,7を相互に溶融・冷却し半田継手4を形成
する半田継手形成工程(図6のステップS3参照)とを
具備している。なお、図示せぬが、母配線基板2及び従
配線基板3には、電子部品が搭載されている。Next, a method of manufacturing the circuit wiring board 1 having the above configuration will be described. As shown in FIG. 6, the method for manufacturing the circuit wiring board 1 according to this embodiment has a diameter of, for example, 0.6 m on the terminal electrodes 2b, 3b of the mother wiring board 2 and the sub wiring board 3.
The solder bump forming step (see step S1 in FIG. 6) for forming the columnar solder bumps 6 and 7 of the m. A board assembling process (see step S2 in FIG. 6) for forming an assembling temporary circuit wiring board 1a through
After this board assembling process, the soldering joint is formed by heating the temporary circuit wiring board 1a in a reflow furnace (not shown) at, for example, 200 ° for 3 minutes to melt and cool the solder bumps 6, 7 mutually to form a solder joint 4. Forming step (see step S3 in FIG. 6). Although not shown, electronic components are mounted on the mother wiring board 2 and the sub wiring board 3.
【0020】しかして、半田バンプ形成工程は、例えば
母配線基板2について述べると、基板本体2aにソルダ
レジスト11を形成するソルダレジスト形成工程(図7
(a)参照)と、このソルダレジスト形成工程後に端子
電極2b領域のみ選択露光する露光工程と、この露光工
程後にエッチング処理により露光領域のみ除去し円柱状
凹部12を形成するエッチング工程(図7(b)参照)
と、エッチング工程により形成された円柱状凹部12に
半田めっきにより半田を充填し半田バンプ6を形成する
半田めっき工程(図7(c)参照)と、この半田めっき
工程後にソルダレジスト11を除去するソルダレジスト
除去工程(図7(d)参照)とを具備する。In the solder bump forming step, for example, when the mother wiring board 2 is described, the solder resist forming step of forming the solder resist 11 on the board body 2a (FIG. 7)
7A), an exposure step of selectively exposing only the terminal electrode 2b area after the solder resist forming step, and an etching step of removing only the exposed area by etching after this exposure step to form the columnar recess 12 (FIG. 7 ( b))
And a solder plating step of filling the solder into the cylindrical concave portion 12 formed by the etching step by solder plating to form the solder bump 6 (see FIG. 7C), and removing the solder resist 11 after the solder plating step. And a solder resist removing step (see FIG. 7D).
【0021】しかして、母配線基板2上に形成される半
田バンプ6は、各従配線基板3を挟持するために、各従
配線基板3ごとに2列に沿って設けられている(図8矢
印R1,R2方向)。しかも、各列に配設された半田バ
ンプ6は、図8に示すように、一対の半田バンプ6a,
6bからなり、これら一対の半田バンプ6a,6bが各
列に沿って等間隔且つ相対向するどうしが等位置に配設
されている。なお、各従配線基板3に突設される各半田
バンプ7は、図9に示すように、母配線基板2上に形成
される一対の半田バンプ6a,6bに遊挿される位置に
配置されている。Thus, the solder bumps 6 formed on the mother wiring board 2 are provided in two rows for each of the slave wiring boards 3 so as to sandwich each of the slave wiring boards 3 (FIG. 8). Arrows R1, R2 directions). In addition, as shown in FIG. 8, the solder bumps 6 arranged in each row have a pair of solder bumps 6a,
The pair of solder bumps 6a and 6b are arranged at equal intervals and opposed to each other at equal intervals along each row. As shown in FIG. 9, each solder bump 7 protruding from each sub-wiring board 3 is arranged at a position where it is loosely inserted into a pair of solder bumps 6 a and 6 b formed on the mother wiring board 2. I have.
【0022】一方、基板組立工程は、図10及び図11
に示すように、従配線基板3を母配線基板2の2列上に
設けられた相対向する一対の半田バンプ6間に遊挿する
と同時に、従配線基板3の各半田バンプ7を母配線基板
2の同一列上に設けられた対応する一対の半田バンプ6
a,6間に遊挿することにより、従配線基板3を母配線
基板2に対して仮固定することにより行う。この場合、
一対の半田バンプ6a,6b間の間隔と半田バンプ7の
径との差(ギャップ)は、例えば0.5mmに設定して
おく。しかして、この基板組立工程は、下側の母配線基
板2に対して従配線基板3を仮固定する工程( 図10
(a),(b) 参照) と、下側の母配線基板2に対して仮固定
された従配線基板3に対して上側の母配線基板2を仮固
定する工程(図10(c) 参照)とからなっている。On the other hand, the board assembling process is performed as shown in FIGS.
As shown in FIG. 3, the slave wiring board 3 is loosely inserted between a pair of opposed solder bumps 6 provided on two rows of the mother wiring board 2 and at the same time, the solder bumps 7 of the slave wiring board 3 are 2 corresponding pairs of solder bumps 6 provided on the same row.
This is performed by temporarily fixing the slave wiring board 3 to the mother wiring board 2 by loosely inserting the wiring board between a and 6. in this case,
The difference (gap) between the distance between the pair of solder bumps 6a and 6b and the diameter of the solder bump 7 is set to, for example, 0.5 mm. In this board assembling step, the sub wiring board 3 is temporarily fixed to the lower mother wiring board 2 (FIG. 10).
(a) and (b)) and a step of temporarily fixing the upper motherboard 2 to the subordinate board 3 temporarily fixed to the lower motherboard 2 (see FIG. 10 (c)). ).
【0023】しかして、半田継手形成工程においては、
半田バンプ6,7が融解すると、それぞれの融体自身の
表面張力により、両者が融合して円弧状に一体化する。
この融合により一体化した融体は、室温にて冷却するこ
とにより固化し半田継手4となる(図4及び図5参
照)。この半田継手4は、一対の端子電極2b及び端子
電極3bに一体接続されている結果、上下母配線基板2
に対して従配線基板3が、半田継手4を介して、機械的
に固定されると同時に、電気的に接続される。In the solder joint forming step,
When the solder bumps 6 and 7 are melted, due to the surface tension of each melt itself, the two are fused and integrated into an arc shape.
The melt united by the fusion is solidified by cooling at room temperature to form a solder joint 4 (see FIGS. 4 and 5). The solder joint 4 is integrally connected to the pair of terminal electrodes 2b and the terminal electrodes 3b, so that the upper and lower mother wiring boards 2
The sub wiring board 3 is mechanically fixed and electrically connected via the solder joint 4.
【0024】以上のように、この実施形態の回路配線基
板1の製造方法は、コネクタなどの接続手段を必要とせ
ずして、接続する従配線基板3の多少にかかわらず、且
つ、複雑な三次元構造の場合でも、一回のリフロー工程
を実施するだけで、電気的接続と機械的接合を、同時且
つ一括且つ確実に達成することができる。その結果、回
路配線基板1の生産能率向上に寄与することが可能とな
る。As described above, the method of manufacturing the circuit wiring board 1 according to this embodiment does not require any connecting means such as a connector, and does not depend on the number of the sub-wiring boards 3 to be connected. Even in the case of the original structure, the electrical connection and the mechanical joining can be achieved simultaneously, collectively and reliably by performing only one reflow step. As a result, it is possible to contribute to an improvement in the production efficiency of the circuit wiring board 1.
【0025】なお、上記実施形態の半田継手4の形状
は、円弧状であるが、図12及び図13に示すように直
線状の半田継手40を複数個並設しても同様の効果を奏
することが可能となる。この半田継手40の製造方法
は、図14及び図15に示すように、母配線基板2上の
2列に沿って等間隔且つ相対向するものどうしが等位置
となるように前述したソルダレジストを用いる方法によ
り円柱状の半田バンプ60を形成するとともに、従配線
基板3を母配線基板2に直立させたとき半田バンプ60
の直上となる位置に円柱状の半田バンプ70を突設する
半田バンプ形成工程(図14参照)と、従配線基板3の
下端部を2列に沿って設けられた半田バンプ60に遊挿
し仮固定する基板組立工程(図15参照)と、この基板
組立工程後にリフローすることにより半田バンプ60,
70を相互に溶融・冷却させ半田継手40を形成する半
田継手形成工程とを具備している。Although the shape of the solder joint 4 in the above embodiment is arc-shaped, the same effect can be obtained by arranging a plurality of linear solder joints 40 side by side as shown in FIGS. It becomes possible. As shown in FIGS. 14 and 15, the method of manufacturing the solder joint 40 is such that the solder resist described above is so arranged that two parts on the mother wiring board 2 are equidistant and opposed to each other at equal positions. A columnar solder bump 60 is formed by the method used, and the solder bump 60 is formed when the sub-wiring board 3 is erected on the mother wiring board 2.
A solder bump forming step of projecting a columnar solder bump 70 at a position immediately above the solder bump 70 (see FIG. 14), and the lower end of the subordinate wiring board 3 is loosely inserted into the solder bumps 60 provided along two rows. A board assembling step for fixing (see FIG. 15), and solder bumps 60,
And a solder joint forming step of forming a solder joint 40 by mutually melting and cooling the solder joints 70.
【0026】さらに、図1に示す構造の回路配線基板1
に限ることなく、図16に示す回路配線基板100のよ
うに、母配線基板2に対して直立させた複数の従配線基
板3に他の従配線基板30を母配線基板2に平行となる
ように半田継手4aにより支持させるようにしてもよ
い。こうすることにより、より高密度の三次元実装構造
を得ることができる。この場合、従配線基板3の一方の
主面には、従配線基板30を係止するための半田バンプ
60a,60bが形成されている(図17参照)。Further, the circuit wiring board 1 having the structure shown in FIG.
However, the present invention is not limited to this. Like the circuit wiring board 100 shown in FIG. May be supported by the solder joint 4a. By doing so, a higher-density three-dimensional mounting structure can be obtained. In this case, solder bumps 60a and 60b for locking the sub wiring board 30 are formed on one main surface of the sub wiring board 3 (see FIG. 17).
【0027】このような回路配線基板100の製造方法
は、半田バンプ6a,6bを介して従配線基板3に従配
線基板30を係止する工程(図17(a),(b) 参照)と、
従配線基板30が係止されている従配線基板3を下側の
母配線基板2に対してを仮固定する工程と、下側の母配
線基板2に対して仮固定された従配線基板3に対して上
側の母配線基板2を仮固定する工程(図17(c) 参照)
と、半田バンプ6a,6b,7,60a,60bを加熱
・融合・冷却させるリフロー工程とからなっている。The method of manufacturing the circuit wiring board 100 includes a step of locking the wiring board 30 to the sub wiring board 3 via the solder bumps 6a and 6b (see FIGS. 17A and 17B). ,
A step of temporarily fixing the slave wiring board 3 on which the slave wiring board 30 is locked to the lower mother wiring board 2, and a step of temporarily fixing the slave wiring board 3 to the lower mother wiring board 2. For temporarily fixing the upper motherboard 2 to the substrate (see FIG. 17C)
And a reflow step of heating, fusing, and cooling the solder bumps 6a, 6b, 7, 60a, 60b.
【0028】この回路配線基板100の製造方法も、回
路配線基板1の製造方法と同様の効果を奏する。さら
に、上記実施形態においては、母配線基板2及び従配線
基板3の端子電極2b,3b上に形成したのは円柱状の
半田バンプ6,7であるが、この代わりに球状の半田バ
ンプ81を形成するようにしてもよい(図18参照)。
このような半田バンプ81をリフロー処理することによ
っても半田継手4を得ることができる。The method for manufacturing the circuit wiring board 100 has the same effect as the method for manufacturing the circuit wiring board 1. Further, in the above embodiment, the columnar solder bumps 6 and 7 are formed on the terminal electrodes 2b and 3b of the mother wiring board 2 and the sub wiring board 3, but instead of this, spherical solder bumps 81 are provided. It may be formed (see FIG. 18).
The solder joint 4 can also be obtained by performing a reflow process on such a solder bump 81.
【0029】このような球状の半田バンプ81の製法
は、母配線基板2及び従配線基板3の端子電極2b,3
b上に半田球91を配置する工程(図19参照)と、端
子電極2b,3b上に配置された半田球91をリフロー
する工程とからなっている。The method of manufacturing such a spherical solder bump 81 is based on the terminal electrodes 2 b and 3 of the mother wiring board 2 and the sub wiring board 3.
The process includes a step of arranging the solder balls 91 on the contact electrodes b (see FIG. 19) and a step of reflowing the solder balls 91 arranged on the terminal electrodes 2b and 3b.
【0030】同様に、半田継手40についても、母配線
基板2上の2列に沿って等間隔且つ相対向するものどう
しが等位置となるように球状の半田バンプ81を形成す
るとともに、従配線基板3を母配線基板2に直立させた
とき半田バンプ81の直上となる位置に球状の半田バン
プ81を形成し(図20参照)、リフロー処理すること
により得ることができる。Similarly, the solder joints 40 are also formed with spherical solder bumps 81 so that the opposing ones at equal intervals and along the two rows on the mother wiring board 2 are located at the same position. It can be obtained by forming a spherical solder bump 81 at a position directly above the solder bump 81 when the substrate 3 is erected on the mother wiring board 2 (see FIG. 20) and performing a reflow process.
【0031】さらに、第21図に示すように、半田継手
4を、母配線基板2の1個の端子電極2bと、従配線基
板3の2個の端子電極3bに設けた円柱状(又は球状)
の半田バンプをリフローすることにより形成してもよ
い。Further, as shown in FIG. 21, the solder joint 4 is formed in a columnar (or spherical) shape provided on one terminal electrode 2b of the mother wiring board 2 and two terminal electrodes 3b of the sub wiring board 3. )
May be formed by reflowing the solder bump.
【0032】[0032]
【発明の効果】請求項1乃至請求項5の回路配線基板
は、母配線基板と、前記母配線基板に実装される従配線
基板と、前記母配線基板と前記従配線基板とを電気的且
つ機械的に接続する半田継手とを具備するので、コネク
タなどの接続手段を必要とせずして、電気的接続と機械
的接合を同時に得ることができる。また、コネクタなど
の接続手段を利用する場合に比べて省空間が可能となる
ので、母配線基板に対する従配線基板の配置間隔を小さ
くすることができ高密度実装の推進に寄与することがで
きる。さらに、コネクタなどの接続手段を利用する場合
に比べて部品点数が少なくて済むので、コスト低減にも
寄与できる。また、コネクタによる電気的接続よりも半
田による電気的接続のほうが接続の信頼性が高く、当該
回路配線基板を組み込んだ装置の品質向上にも寄与でき
る。According to a first aspect of the present invention, there is provided a circuit wiring board comprising: a mother wiring board; a sub-wiring board mounted on the mother wiring board; Since a solder joint for mechanical connection is provided, electrical connection and mechanical connection can be obtained at the same time without the need for connecting means such as a connector. Further, space saving is possible as compared with the case where a connecting means such as a connector is used, so that the arrangement interval of the slave wiring board with respect to the mother wiring board can be reduced, which can contribute to promotion of high-density mounting. Furthermore, the number of components can be reduced as compared with the case where a connecting means such as a connector is used, which can contribute to cost reduction. In addition, the electrical connection using solder has higher reliability than the electrical connection using a connector, which can contribute to the improvement of the quality of a device incorporating the circuit wiring board.
【0033】請求項6乃至請求項11の回路配線基板の
製造方法は、母配線基板と、前記母配線基板に実装され
る従配線基板とを具備し、前記母配線基板及び前記従配
線基板には対応関係にある端子電極が各別に設けられて
なる回路配線基板の製造方法において、前記端子電極端
子電極に半田バンプを形成する半田バンプ形成工程と、
この半田バンプ形成工程後に前記従配線基板を前記母配
線基板に位置決めし前記対応関係にある端子電極の半田
バンプどうしを近接させる基板組立工程と、この基板組
立工程後に前記半田バンプをリフローして前記近接した
半田バンプどうし融合させたのち冷却して前記母配線基
板と前記従配線基板とを電気的且つ機械的に接続する半
田継手を得る半田継手形成工程とを具備するものであっ
て、コネクタなどの接続手段を必要とせずして、接続す
る従配線基板の多少にかかわらず、且つ、複雑な三次元
構造の場合でも、一回のリフロー工程を実施するだけ
で、電気的接続と機械的接合を、同時且つ一括且つ確実
に達成することができる。その結果、回路配線基板の生
産能率向上に寄与することが可能となる。A method of manufacturing a circuit wiring board according to any one of claims 6 to 11, comprising a mother wiring board and a sub-wiring board mounted on the mother wiring board, wherein the mother wiring board and the sub-wiring board are In a method for manufacturing a circuit wiring board, wherein terminal electrodes in a corresponding relationship are separately provided, a solder bump forming step of forming a solder bump on the terminal electrode terminal electrode,
After the solder bump forming step, the sub-wiring board is positioned on the mother wiring board, and the solder bumps of the terminal electrodes in the corresponding relationship are brought close to each other, and the solder bump is reflowed after the board assembling step. A solder joint forming step of obtaining a solder joint for electrically and mechanically connecting the mother wiring board and the sub wiring board by cooling after the adjacent solder bumps are fused together, and the connector No connection means is required, regardless of the number of sub-wiring boards to be connected, and even in the case of a complicated three-dimensional structure, electrical connection and mechanical bonding can be performed only by performing a single reflow process. Can be achieved simultaneously, collectively and reliably. As a result, it is possible to contribute to an improvement in the production efficiency of the circuit wiring board.
【図1】本発明の一実施形態の回路配線基板の正面図で
ある。FIG. 1 is a front view of a circuit wiring board according to an embodiment of the present invention.
【図2】図1の回路配線基板の要部拡大平面図である。FIG. 2 is an enlarged plan view of a main part of the circuit wiring board of FIG. 1;
【図3】図1の回路配線基板の要部拡大平面図である。FIG. 3 is an enlarged plan view of a main part of the circuit wiring board of FIG. 1;
【図4】図1の回路配線基板の要部拡大正面図である。FIG. 4 is an enlarged front view of a main part of the circuit wiring board of FIG. 1;
【図5】図4の回路配線基板の要部拡大側面図である。FIG. 5 is an enlarged side view of a main part of the circuit wiring board of FIG. 4;
【図6】本発明の一実施形態の回路配線基板の製造方法
の概要を説明するためのフローチャートである。FIG. 6 is a flowchart illustrating an outline of a method for manufacturing a circuit wiring board according to one embodiment of the present invention.
【図7】本発明の一実施形態の回路配線基板の製造方法
の説明図である。FIG. 7 is an explanatory diagram of a method for manufacturing a circuit wiring board according to one embodiment of the present invention.
【図8】本発明の一実施形態の回路配線基板の製造方法
の半田バンプ形成工程の説明図である。FIG. 8 is an explanatory diagram of a solder bump forming step of the method for manufacturing a circuit wiring board according to one embodiment of the present invention.
【図9】本発明の一実施形態の回路配線基板の製造方法
の基板組立工程の説明図である。FIG. 9 is an explanatory diagram of a board assembling step of the method for manufacturing a circuit wiring board according to one embodiment of the present invention.
【図10】本発明の一実施形態の回路配線基板の製造方
法の基板組立工程の説明図である。FIG. 10 is an explanatory diagram of a board assembling step of the method for manufacturing a circuit wiring board according to one embodiment of the present invention;
【図11】本発明の一実施形態の回路配線基板の製造方
法の基板組立工程の説明図である。FIG. 11 is an explanatory diagram of a board assembling step of the method for manufacturing a circuit wiring board according to one embodiment of the present invention.
【図12】本発明の他の実施形態の回路配線基板の要部
拡大正面図である。FIG. 12 is an enlarged front view of a main part of a circuit wiring board according to another embodiment of the present invention.
【図13】本発明の他の実施形態の回路配線基板の要部
拡大側面図である。FIG. 13 is an enlarged side view of a main part of a circuit wiring board according to another embodiment of the present invention.
【図14】本発明の他の実施形態の回路配線基板の製造
方法の説明図である。FIG. 14 is an explanatory diagram of a method for manufacturing a circuit wiring board according to another embodiment of the present invention.
【図15】本発明の他の実施形態の回路配線基板の製造
方法の説明図である。FIG. 15 is an explanatory diagram of a method for manufacturing a circuit wiring board according to another embodiment of the present invention.
【図16】本発明の他の実施形態の回路配線基板の正面
図であるFIG. 16 is a front view of a circuit wiring board according to another embodiment of the present invention.
【図17】本発明の他の実施形態の回路配線基板の製造
方法の説明図である。FIG. 17 is an explanatory diagram of a method for manufacturing a circuit wiring board according to another embodiment of the present invention.
【図18】本発明の他の実施形態の回路配線基板の正面
図であるFIG. 18 is a front view of a circuit wiring board according to another embodiment of the present invention.
【図19】本発明の他の実施形態の回路配線基板の製造
方法の説明図である。FIG. 19 is an explanatory diagram of a method for manufacturing a circuit wiring board according to another embodiment of the present invention.
【図20】本発明の他の実施形態の回路配線基板の製造
方法の説明図である。FIG. 20 is an explanatory diagram of a method for manufacturing a circuit wiring board according to another embodiment of the present invention.
【図21】本発明の他の実施形態の回路配線基板の要部
拡大正面図である。FIG. 21 is an enlarged front view of a main part of a circuit wiring board according to another embodiment of the present invention.
【図22】従来技術の説明図である。FIG. 22 is an explanatory diagram of a conventional technique.
1:回路配線基板,2:母配線基板,3:従配線基板,
4:半田継手,2b,3b:端子電極,6a,6b,
7:半田バンプ。1: circuit wiring board, 2: mother wiring board, 3: slave wiring board,
4: solder joint, 2b, 3b: terminal electrode, 6a, 6b,
7: Solder bump.
Claims (11)
る従配線基板と、前記母配線基板と前記従配線基板とを
電気的且つ機械的に接続する半田継手とを具備すること
を特徴とする回路配線基板。A first wiring board mounted on the first wiring board; and a solder joint for electrically and mechanically connecting the first wiring board and the second wiring board. Characteristic circuit wiring board.
子電極が形成され、前記半田継手は、前記端子電極に接
合されていることを特徴とする請求項1記載の回路配線
基板。2. The circuit wiring board according to claim 1, wherein terminal electrodes are formed on the mother wiring board and the slave wiring board, and the solder joint is joined to the terminal electrodes.
従配線基板がそれらの主板面を前記母配線基板の主板面
に前記半田継手を介して直交させて実装されていること
を特徴とする請求項1記載の回路配線基板。3. A method according to claim 1, wherein the plurality of sub-wiring boards are mounted on the main board surface of the mother wiring board with their main board faces orthogonal to the main board face of the mother wiring board via the solder joints. The circuit wiring board according to claim 1, wherein:
された複数の前記従配線基板の隣接する一対の従配線基
板に前記半田継手を介して他の従配線基板が前記母配線
基板に平行に実装されていることを特徴とする請求項3
記載の回路配線基板。4. A pair of sub-wiring boards adjacent to a plurality of sub-wiring boards mounted on the main wiring board with a main plate surface orthogonal to the other sub-wiring board, the other sub-wiring board being connected to the main wiring board via the solder joint. 4. The mounting method according to claim 3, wherein
The circuit wiring board as described.
線基板の端部とは反対側の端部にも母配線基板が接続さ
れていることを特徴とする請求項3記載の回路配線基
板。5. The circuit wiring according to claim 3, wherein the mother wiring board is also connected to an end of the slave wiring board opposite to the end connected to the mother wiring board. substrate.
る従配線基板とを具備し、前記母配線基板及び前記従配
線基板には対応関係にある端子電極が各別に設けられて
なる回路配線基板の製造方法において、前記端子電極に
半田バンプを形成する半田バンプ形成工程と、この半田
バンプ形成工程後に前記従配線基板を前記母配線基板に
位置決めし前記対応関係にある端子電極の半田バンプど
うしを近接させる基板組立工程と、この基板組立工程後
に前記半田バンプをリフローして前記近接した半田バン
プどうし融合させたのち冷却して前記母配線基板と前記
従配線基板とを電気的且つ機械的に接続する半田継手を
得る半田継手形成工程とを具備することを特徴とする回
路配線基板の製造方法。6. A mother wiring board, and a sub-wiring board mounted on the bus wiring board, wherein the mother wiring board and the sub-wiring board are provided with corresponding terminal electrodes. In the method for manufacturing a circuit wiring board, a solder bump forming step of forming solder bumps on the terminal electrodes, and after the solder bump forming step, positioning the slave wiring board on the mother wiring board and soldering the corresponding terminal electrodes A board assembling step of bringing the bumps close to each other, and after the board assembling step, the solder bumps are reflowed to fuse the adjacent solder bumps and then cooled to electrically and mechanically connect the mother wiring board and the sub wiring board. And a solder joint forming step of obtaining a solder joint to be electrically connected.
ンプの形状は、円柱状であることを特徴とする請求項6
記載の回路配線基板の製造方法。7. The solder bump formed in the solder bump forming step has a columnar shape.
A method for manufacturing the circuit wiring board according to the above.
をレジスト膜で被覆することによる選択的半田めっきに
より形成することを特徴とする請求項7記載の回路配線
基板の製造方法。8. The method according to claim 7, wherein the spherical solder bump is formed by selective solder plating by covering a region other than the terminal electrode with a resist film.
半田バンプが突設され、前記基板組立工程においては、
これらの半田バンプにより前記従配線基板を前記母配線
基板に仮固定することを特徴とする請求項7記載の回路
配線基板の製造方法。9. The mother wiring board has columnar solder bumps protruding along two rows, and in the board assembling step,
8. The method for manufacturing a circuit wiring board according to claim 7, wherein said slave wiring board is temporarily fixed to said mother wiring board by said solder bumps.
バンプの形状は、球状であることを特徴とする請求項6
記載の回路配線基板の製造方法。10. The solder bump formed in the solder bump forming step is spherical in shape.
A method for manufacturing the circuit wiring board according to the above.
れた半田ボールを溶融することにより形成することを特
徴とする請求項10記載の回路配線基板の製造方法。11. The method according to claim 10, wherein the spherical solder bump is formed by melting a solder ball disposed on the terminal electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28325197A JPH11121896A (en) | 1997-10-16 | 1997-10-16 | Circuit wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28325197A JPH11121896A (en) | 1997-10-16 | 1997-10-16 | Circuit wiring board and method of manufacturing the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11121896A true JPH11121896A (en) | 1999-04-30 |
Family
ID=17663045
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28325197A Pending JPH11121896A (en) | 1997-10-16 | 1997-10-16 | Circuit wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11121896A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004335682A (en) * | 2003-05-07 | 2004-11-25 | Matsushita Electric Ind Co Ltd | Printed wiring board bonding structure |
| WO2005119765A3 (en) * | 2004-06-02 | 2006-03-09 | Tessera Inc | Assembly including vertical and horizontal joined circuit panels |
| JP2011077412A (en) * | 2009-09-30 | 2011-04-14 | Toshiba Corp | Electronic apparatus and circuit module |
| WO2016057105A1 (en) * | 2014-10-08 | 2016-04-14 | Raytheon Company | Interconnect transition apparatus |
| US9660333B2 (en) | 2014-12-22 | 2017-05-23 | Raytheon Company | Radiator, solderless interconnect thereof and grounding element thereof |
| US9780458B2 (en) | 2015-10-13 | 2017-10-03 | Raytheon Company | Methods and apparatus for antenna having dual polarized radiating elements with enhanced heat dissipation |
| US10361485B2 (en) | 2017-08-04 | 2019-07-23 | Raytheon Company | Tripole current loop radiating element with integrated circularly polarized feed |
-
1997
- 1997-10-16 JP JP28325197A patent/JPH11121896A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004335682A (en) * | 2003-05-07 | 2004-11-25 | Matsushita Electric Ind Co Ltd | Printed wiring board bonding structure |
| WO2005119765A3 (en) * | 2004-06-02 | 2006-03-09 | Tessera Inc | Assembly including vertical and horizontal joined circuit panels |
| US7489524B2 (en) | 2004-06-02 | 2009-02-10 | Tessera, Inc. | Assembly including vertical and horizontal joined circuit panels |
| JP2011077412A (en) * | 2009-09-30 | 2011-04-14 | Toshiba Corp | Electronic apparatus and circuit module |
| WO2016057105A1 (en) * | 2014-10-08 | 2016-04-14 | Raytheon Company | Interconnect transition apparatus |
| US9468103B2 (en) | 2014-10-08 | 2016-10-11 | Raytheon Company | Interconnect transition apparatus |
| US9660333B2 (en) | 2014-12-22 | 2017-05-23 | Raytheon Company | Radiator, solderless interconnect thereof and grounding element thereof |
| US10333212B2 (en) | 2014-12-22 | 2019-06-25 | Raytheon Company | Radiator, solderless interconnect thereof and grounding element thereof |
| US9780458B2 (en) | 2015-10-13 | 2017-10-03 | Raytheon Company | Methods and apparatus for antenna having dual polarized radiating elements with enhanced heat dissipation |
| US10361485B2 (en) | 2017-08-04 | 2019-07-23 | Raytheon Company | Tripole current loop radiating element with integrated circularly polarized feed |
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