JPH11111855A - Photomask and manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a well region with different substrate concentrations by one ion implantation, by forming a pattern in a first translucent region and a second translucent region which is smaller than the first translucent region. SOLUTION: A field oxide film 12 is formed on a semiconductor board 11, and an oxide film 13 is formed by thermal oxidation. Then, photoresist 14 which becomes a mask for ion implantation is applied, the photoresist 14 is opened to a specified size, a rectangular opening part 15 is provided, and a plurality of small slit-like opening parts 16 wherein partial opening of the photoresist 14 is regularly repeated is also provided. Then, boron is implanted, the photoresist 14 is peeled and boron is subjected to heat treatment for forming a region having different substrate concentrations of a high concentration P-well region 17 as a first translucent region and a low concentration P-well region 18 as a second translucent region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOS type semiconductor device and a photomask used for manufacturing the same.

[0002]

2. Description of the Related Art In order to increase the driving speed of a MOS semiconductor integrated circuit device, a method of lowering the threshold voltage of a MOSFET is used. However, when the threshold voltage is reduced, the OFF current of the MOSFET increases, so that the power consumption during standby increases. In order to suppress this increase in power consumption, a method of increasing the threshold voltage of some MOSFETs in the circuit and reducing the OFF current has been used.

In order to manufacture a MOS type semiconductor integrated circuit device having MOSFETs of the same conductivity type and having different threshold voltages as described above, it is necessary to improve the impurity concentration of the substrate for each MOSFET region having a different threshold voltage. Needs to be changed. In other words, a high threshold voltage MOS
The region of the FET increases the concentration of the substrate, and the region of the MOSFET having a lower threshold voltage decreases the concentration of the substrate.

Heretofore, in order to form such regions having different impurity concentrations on the same substrate, mask patterns capable of selectively performing impurity implantation have been formed in different regions on the substrate in different steps. First, the resist applied on the substrate is selectively opened using the first photomask,
A first ion implantation is performed in a region that will have a first substrate concentration. Next, after removing the resist used in the first ion implantation, the resist applied on the substrate is selectively opened again by using the second photomask to have a second substrate concentration. The second ion implantation is performed in the region of interest.

An example of this conventional manufacturing method will be described with reference to the drawings. FIGS. 4A and 4B show patterns of a photomask used to form regions having different substrate concentrations.
FIGS. 5A to 5C and FIGS. 6A to 6C illustrate a method of forming regions having different substrate concentrations using the pattern.
It is shown in the cross-sectional view of FIG. FIG. 4A is a plan view of a pattern of a first photomask 8 used for forming a mask pattern for selectively ion-implanting a region to be a high-concentration P well region, and FIG. FIG. 9 is a plan view of a pattern of a second photomask 9 used for forming a pattern for selectively ion-implanting a region to be a low-concentration P-well region. The first photomask 8 and the second photomask 9 are patterned so that the rectangular light transmitting portion 2 and the rectangular light transmitting portion 7 are surrounded by the light shielding portion 4, respectively. They are arranged in different areas without overlapping.

Next, a manufacturing method using the first photomask 8 and the second photomask 9 will be described with reference to FIGS. FIG. 5A shows a state in which a field oxide film 12 for element isolation and an oxide film 13 for preventing damage due to ion implantation are formed on a semiconductor substrate 11 by thermal oxidation. Subsequently, a photoresist 14 serving as a mask for ion implantation is applied, and exposure is performed using the first photomask 8, and as shown in FIG. 5B, a P-well region having a high substrate concentration is exposed. Open. Thereafter, as shown in FIG. 5C, boron ion implantation for determining the impurity concentration in the P well region is performed, for example, by input energy of 300 keV and dose of 3 × 10 ¹³ atoms / cm ^2.
The boron ion implantation for determining the threshold voltage of the MOSFET is performed, for example, at an input energy of 40 keV and a dose of 1 × 10 ¹³ atoms / cm ² .

Subsequently, the photoresist 14 is peeled off,
Again, a photoresist 15 serving as a mask is applied,
Exposure is performed by using the photomask 9 described above, and as shown in FIG. 6A, an opening is formed on a P-well region having a low substrate concentration. As in the case of forming the high-concentration P-well region, as shown in FIG. 6B, boron ion implantation for determining the impurity concentration of the P-well region is performed by, for example, input energy of 300 keV and dose of 1 × 10 ¹³ atoms / cm ^Two
Boron ion implantation for determining the threshold voltage of the MOSFET is performed, for example, at an input energy of 40 keV and a dose of 5 × 10 ¹² atoms / cm ² .

Finally, the photoresist 15 is peeled off, and then a heat treatment for activating and indenting and diffusing impurities is performed, for example, at 1100 ° C. for 1 hour in a nitrogen atmosphere, as shown in FIG. Thus, P-well regions having different substrate concentrations such as a high-concentration P-well region 16 and a low-concentration P-well region 17 can be formed. Here, only the method of forming the P-well is shown. However, in order to form a CMOS circuit, if N-type ion implantation is performed in another region by the same process, N-well regions having different substrate concentrations are formed. be able to.

[0009]

SUMMARY OF THE INVENTION As described above, the conventional P
In the method of manufacturing a well (or N well), many steps are required for a lithography step and an ion implantation step in order to perform ion implantation using different photomasks 8 and 9 for regions having different substrate concentrations. In addition, the time required for the diffusion process is long, and the manufacturing cost is high, which has been a barrier to shortening the diffusion period and reducing the chip cost.

It is an object of the present invention to provide a photomask and a method of manufacturing a semiconductor device in which well regions having different substrate concentrations can be formed by a single ion implantation.

[0011]

A photomask according to the present invention comprises a first light transmitting region which is an opening having a predetermined size on a mask plate surface, and a light smaller than the first light transmitting region. The transmission region has a pattern with a second light transmission region including a plurality of small openings in which openings are regularly repeated.

In the method of manufacturing a semiconductor device according to the present invention, a first region of the insulating film is opened to a predetermined size on a semiconductor substrate on which the insulating film is formed, and is different from the first region. A step of opening a second region at a plurality of small openings that are regularly repeated in a short cycle; and a step of doping impurities in the opened first and second regions using the insulating film as a mask. Removing the insulating film; and performing a heat treatment on the doped impurity to diffuse the impurity in the semiconductor substrate to make the impurity concentration uniform.

[0013]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of a pattern of a photomask 1 for selectively performing ion implantation using a photoresist as a mask according to an embodiment of the present invention. The photomask 1 of the present embodiment includes a rectangular light transmitting portion 2 and a slit light transmitting portion 3.

A method of manufacturing a semiconductor device using the photomask of FIG. 1 will be described with reference to FIGS.
First, as shown in FIG. 2A, a field oxide film 12 for element isolation is formed on a semiconductor substrate 11, and an oxide film 13 for preventing damage due to ion implantation is formed by thermal oxidation. Subsequently, a photoresist 14 serving as a mask for ion implantation is applied, and exposure is performed using the photomask of FIG. FIG. 1 shows a rectangular light transmitting portion 2 for exposing a photoresist on a region to be a high-concentration P-well region, and a slit-shaped light transmitting portion 3 for exposing a photoresist on a region to be a low-concentration P-well region. It is shown.

The state of the photoresist after the pattern of the photomask 1 of FIG. 1 has been transferred onto the semiconductor substrate is as follows.
FIG. 2B is a cross-sectional view taken along the line AA running on the pattern of the photomask of FIG. By exposure using the photomask 1, as shown in FIG. 2B, a photoresist 14 on an area to be a high-concentration P-well area is opened to form a rectangular opening 15, and a low-concentration P is formed. Photoresist 1 on the area to be a well area
4 are partially opened to form slit-shaped openings 16 (for example, the line width and space width of the slits are 0.25 μm and 0.25 μm, respectively).

Subsequently, as shown in FIG. 2C, boron ion implantation for forming a P-well region is performed, for example, at an implantation energy of 300 keV and a dose of 3 × 10 ^{13 at.}
ms / cm ² , and then boron ion implantation is performed to determine the threshold voltage of the MOSFET, for example, at an implantation energy of 40 keV and a dose of 1 × 10 ¹³ atoms.
s / cm ² . After that, the photoresist 14 is peeled off, and a heat treatment for activating the implanted boron is performed, so that different substrate concentrations such as the high concentration P well region 17 and the low concentration P well region 18 as shown in FIG. Can be formed simultaneously. At this time, the heat treatment for activating boron is performed, for example, in a nitrogen atmosphere at 1100 to make the substrate concentration in the low-concentration P well region 18 uniform.
C. for 1 hour.

FIG. 3A is a plan view of a pattern of a photomask according to a second embodiment of the present invention, which comprises a rectangular light transmitting portion 2 and a checkered light transmitting portion 5. Here, the checkered light transmitting portion 5 has a square checker pattern having a length of 0.25 μm on a side, for example, as a shape after being transferred to a photoresist on a semiconductor substrate through an exposure device on a photomask. Is patterned.

Further, the pattern of the photomask according to the third embodiment of the present invention comprises a rectangular light transmitting portion 2 and a mesh light transmitting portion 6, as shown in the plan view of FIG. Here, the mesh-shaped light transmitting portion 6 has a shape on a photomask after being transferred to a photoresist on a semiconductor substrate through an exposure device, for example, 0.5 μm on a side.
It is patterned so as to form a square space having a length of m and a line having a width of 0.2 μm.

The photomask pattern of the second embodiment,
When the well region is formed using the photomask pattern according to the third embodiment, as in the case where the photomask pattern according to the first embodiment is used, FIGS.
In the process shown in (1), the effect that regions having different substrate concentrations can be simultaneously formed is obtained.

In the method for fabricating the semiconductor device according to the present embodiment, a mask pattern for selectively performing ion implantation is formed by using a photolithography technique. However, a direct drawing by an electron beam or the like without using a photomask is performed. A slit, checkerboard, or mesh opening may be formed on the photoresist 14 by another method. Also,
Here, the description has been given of the formation of the P well, but the N well can be manufactured in the same manner as the method of manufacturing the P well.

[0021]

As described above, when a well region is formed using a photomask according to the present invention, a region of a photoresist pattern having a large opening and a region of a photoresist pattern having a small opening are used as patterns for selectively performing ion implantation on a semiconductor substrate. Since the opening and the region of the pattern from which the photoresist has been partially removed can be formed at the same time, there is a great effect that regions having different substrate concentrations can be formed by a single ion implantation. In addition, it is possible to simultaneously obtain the effects that the diffusion period is shorter than before, the manufacturing cost is reduced, and the chip cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view of a photomask pattern used for forming a well region of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device illustrating a step of simultaneously forming a high-concentration P-well region and a low-concentration P-well region using the photomask pattern of FIG. 1;

FIG. 3 is a plan view of a photomask pattern according to the second and third embodiments of the present invention.

FIG. 4 is a plan view showing a pattern of a photomask used for forming a conventional well region.

FIG. 5 is a cross-sectional view of a semiconductor device illustrating a step of separately forming a high-concentration P-well region and a low-concentration P-well region using a conventional photomask pattern.

FIG. 6 is a cross-sectional view of a semiconductor device illustrating a step of separately forming a high-concentration P-well region and a low-concentration P-well region using a conventional photomask pattern.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Photomask 2, 7 Rectangular light transmission part 3 Slit light transmission part 4 Shield part 5 Checkered light transmission part 6 Mesh light transmission part 8 First photomask 9 Second photomask 11 Semiconductor substrate 12 Field oxidation Film 13 Oxide film 14 Photoresist 15 Rectangular opening 16 Slit opening 17 High concentration P well region 18 Low concentration P well region

Claims (6)

[Claims] 1. A small light-transmitting region which is an opening having a predetermined size and a light-transmitting region which is smaller than the first light-transmitting region on a mask plate surface. A photomask having a pattern with a second light transmitting region including a plurality of openings. 2. The photomask according to claim 1, wherein the second light transmitting area is a slit-shaped opening that is repeated in parallel at a predetermined period on the mask plate surface. 3. The checkerboard or mesh-like opening that is repeated in the horizontal and vertical directions at a predetermined cycle on the mask plate surface.
The photomask as described. 4. The photomask according to claim 1, wherein the opening of the second light transmitting region is transferred to the semiconductor substrate through an exposure device in a shape that is repeated at intervals of 1 μm or less. 5. On a semiconductor substrate on which an insulating film is formed, a first region of the insulating film is opened to a predetermined size, and a second region different from the first region is shortened. A step of opening a plurality of small openings regularly repeated in a cycle, a step of doping impurities in the opened first and second regions using the insulating film as a mask, and a step of removing the insulating film And applying a heat treatment to the doped impurities to diffuse the impurities in the semiconductor substrate to make the impurity concentration uniform. 6. The method of manufacturing a semiconductor device according to claim 5, wherein each opening is opened using the photomask according to claim 1.