JPH11111758A - Semiconductor chip mounting structure, semiconductor device, and semiconductor chip mounting method - Google Patents

Abstract

(57) [Summary] [Problem] When a high-density mounting of a semiconductor chip is to be performed by adopting a so-called chip-on-chip structure, a support member for supporting a semiconductor chip such as a substrate is subjected to troublesome processing. It is possible to eliminate the necessity, and to appropriately reduce the overall thickness and to appropriately conduct the conductive connection of the semiconductor chip. A main surface (20A, 20A) having terminals (21, 22).
B, the first semiconductor chip 2A and the second semiconductor chip 2B each having
Is a mounting structure of a semiconductor chip mounted on a desired support member 1 in a state where a second semiconductor chip 2B is placed on the first semiconductor chip 2B. The first semiconductor chip 2A has a main surface 20A facing upward. It is arranged on the lower surface side of the support member 1 and penetrates the support member 1 in the thickness direction of the support member 1 so that the upper part of the terminal of the first semiconductor chip 2A is not covered by the support member 1. An opening hole 12 is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a technique for increasing the mounting density of semiconductor chips by mounting a plurality of semiconductor chips on a desired substrate in a state of being stacked in a vertical thickness direction.
That is, the present invention relates to a technology for mounting a plurality of semiconductor chips at a high density by adopting a so-called chip-on-chip structure.

[0002]

2. Description of the Related Art As is well known, when a desired electronic circuit or semiconductor device is manufactured by using a plurality of semiconductor chips, the mounting density of the semiconductor chips is increased to reduce the size of the entire electronic circuit or semiconductor device. Is often strongly required. In this case, simply arranging a plurality of semiconductor chips in a plane on the substrate has a certain limit in increasing the mounting density. In addition, making a plurality of semiconductor chips into one chip complicates the operation of manufacturing the semiconductor chips, so that the manufacturing cost becomes extremely high. For this reason, conventionally, as means for increasing the mounting density of semiconductor chips, there is a means employing a so-called chip-on-chip structure described in, for example, JP-A-2-74046. For example, as shown in FIG. 19 of the present application, when two semiconductor chips 9a and 9b are mounted on a substrate 90, these means can be used.
a, 9b are stacked vertically. Further, a bottomed concave portion 91 is formed in the substrate 90, and a lower semiconductor chip 9 a is mounted on the bottom surface of the concave portion 91.

When the above-mentioned so-called chip-on-chip structure is adopted, two semiconductor chips 9a and 9
It is required that the respective terminals 92 and 93 of b can be appropriately conductively connected to the terminals 94 of the substrate 90. In general, when two terminals are conductively connected using a wire such as a gold wire, the smaller the height difference between the two terminals, the higher the adhesion of the wires to the terminals can be, and the lower the connection failure. can do. The maximum vertical movement stroke of the capillary of a general wire bonder is generally set within a stroke range of about ± 300 μm from the reference height. Therefore, in the structure shown in FIG. 19, from the viewpoint of appropriately performing a wire connection operation using a wire bonder, the height difference H1 between the terminal 93 of the upper semiconductor chip 9b and the terminal 94 of the substrate 90 is as small as possible. It is required to be smaller. When a chip-on-chip structure is adopted, it is also required that the overall thickness of the portion where the semiconductor chips are vertically stacked is not increased as much as possible.

Considering the structure shown in FIG. 19, in the above structure, the lower semiconductor chip 9a is arranged in a concave portion 91 formed in a substrate 90. For this reason, in the above structure, as shown in FIG. 20, compared with the case where two semiconductor chips 9c and 9d are mounted on the flat upper surface of the substrate 90a, the overall thickness is reduced by the depth dimension S of the concave portion 91. The advantage that the thickness can be reduced is obtained. The terminal 93 of the upper semiconductor chip 9b and the substrate 9
The height difference H1 from the zero terminal 94 can be made smaller than the height H2 of the structure shown in FIG.

[0005]

However, the above-mentioned conventional means has the following disadvantages.

First, in the above-mentioned conventional means, since the lower semiconductor chip 9a is mounted on the bottom surface of the concave portion 91 of the substrate 90, the bottomed concave portion 91 is formed in the substrate 90. Therefore, the operation of forming the concave portion 91 is complicated. More specifically, the concave portion 91 is
Unlike the through-hole, it is difficult to easily form it by a punching press or the like because the bottom needs to be closed.For example, after forming the through-hole, a process of closing the bottom opening of the through-hole is required. It is necessary to perform a troublesome operation such as performing a masking process on the substrate surface and then performing an etching process on the substrate surface. As a result, conventionally, there has been a problem that the processing cost of the substrate 90 is increased, and the manufacturing cost of a semiconductor device, an electronic circuit, or the like configured using a semiconductor chip is expensive.

Second, in the above-mentioned conventional means, the total thickness of the mounting location of the two semiconductor chips 9a and 9b is not the sum of the thicknesses of these two semiconductor chips 9a and 9b, but always This is a value obtained by adding the thickness t of the bottom of the recess 91 to the value. Therefore, conventionally, there is still room for improvement in reducing the overall thickness of the mounting portion of the semiconductor chip.

Third, in the above-described conventional means, when the thickness of the substrate 90 is small, the depth of the concave portion 91 is necessarily small. Moreover, the depth dimension must be smaller than the thickness of the substrate 90. Therefore, conventionally,
When the thickness of the substrate 90 is reduced to some extent,
To form two semiconductor chips 9a, 9
It is impossible to expect the height of b to be sufficiently low with respect to the substrate 90. As a result, conventionally, for example, the substrate 90
When a thin member is used, the height of the terminal 93 of the upper semiconductor chip 9b cannot be reduced, and it may be difficult to appropriately wire-connect the terminal 93 and the terminal 94 of the substrate 90. there were. Such a problem is caused by mounting a semiconductor chip separate from the two semiconductor chips 9a and 9b on top of the upper semiconductor chip 9b, and connecting the uppermost semiconductor chip to a terminal of the substrate by a wire. In the case of connecting, it became more noticeable.

The present invention has been conceived under such circumstances, and when a high-density mounting of a semiconductor chip is to be achieved by adopting a so-called chip-on-chip structure, a substrate such as a substrate is required. It is an object of the present invention to eliminate the necessity of performing a complicated process on a support member for supporting a semiconductor chip, and to appropriately reduce the thickness of the entire device and to appropriately perform a conductive connection operation of the semiconductor chip.

[0010]

DISCLOSURE OF THE INVENTION In order to solve the above problems, the present invention employs the following technical means.

According to a first aspect of the present invention, there is provided a semiconductor chip mounting structure. The mounting structure of the semiconductor chip is such that a first semiconductor chip and a second semiconductor chip each having a main surface with terminals are provided in a state where the second semiconductor chip is overlaid on the first semiconductor chip. A mounting structure of a semiconductor chip mounted on the supporting member, wherein the first semiconductor chip is disposed on a lower surface side of the supporting member with its main surface facing upward, and Is characterized in that an opening hole is provided through the support member in the thickness direction so that the upper part of the terminal of the first semiconductor chip is not covered by the support member.

The supporting member may be a film-like substrate having a thin synthetic resin film having a conductive wiring portion formed thereon, a metal lead frame, or a plate-like substrate having a conductive wiring portion formed on the surface. Can be used.

Further, on the second semiconductor chip,
The second semiconductor chip and one or more other semiconductor chips separate from the first semiconductor chip may be provided so as to be further overlapped.

In the present invention, since the first semiconductor chip is arranged on the lower surface side of the support member, the height of the first semiconductor chip with respect to the upper surface of the support member can of course be reduced. The height of the second semiconductor chip stacked on one semiconductor chip can also be reduced. Although the first semiconductor chip is disposed on the lower surface side of the support member, the support member is provided with a through-hole-shaped opening, so that the terminal of the first semiconductor chip is provided. Because the upper part is not covered by the support member,
For example, it is possible to appropriately connect the terminals of the first semiconductor chip to the terminals provided on the upper surface of the support member by wire. In addition, instead of such a wire connection means, it is also possible to employ a means for connecting a terminal of the second semiconductor chip to a terminal of the first semiconductor chip. Therefore, the disadvantage that the first semiconductor chip is arranged on the lower surface side of the support member, thereby making it difficult to make the conductive connection between the first semiconductor chip and the terminal of the support member difficult is appropriately avoided. Therefore, electrical connection between the first semiconductor chip and the second semiconductor chip can be appropriately performed.

In the present invention, an opening is formed in the support member, but this opening is penetrated in the thickness direction of the support member, unlike a conventional bottomed recess.
Therefore, this opening can be formed very simply and quickly by a simple working process such as punching and pressing the support member. As a result, as compared with the related art, the processing cost of the supporting member can be reduced as much as the processing operation of the supporting member is simplified, and the overall manufacturing cost can be reduced.

Further, in the present invention, since the first semiconductor chip is disposed on the lower surface side of the support member, a structure in which the support member does not exist below the first semiconductor chip can be provided. The entire thickness of the mounting location of the first semiconductor chip or the second semiconductor chip can be reduced.
That is, in the conventional means in which the semiconductor chip is mounted on the bottom surface of the bottomed concave portion of the support member, the entire thickness of the mounting position of the semiconductor chip is always increased by the thickness of the bottom portion of the support member. However, in the present invention, such a situation can be appropriately avoided. Therefore, it is more advantageous than before in reducing the overall thickness.

Further, in the present invention, by disposing the first semiconductor chip on the lower surface side of the support member, it is possible to reliably dispose the first semiconductor chip at a position lower than the upper surface of the support member. Unlike the related art, it is possible to solve the problem that it is difficult to reduce the height of the first semiconductor chip and the second semiconductor chip when the thickness of the support member is reduced. Therefore, in the present invention, the height difference between the terminal of the second semiconductor chip and the terminal provided on the upper surface of the support member can be reduced.
As a result, when these terminals are connected and connected by employing a wire bonding operation, the operation can be appropriately performed.

[0018] In a preferred embodiment of the present invention, the support member is provided with a plurality of the opening holes at an interval, so that an auxiliary piece portion for partitioning between the plurality of opening holes is formed. And the first semiconductor chip and the second semiconductor chip can be configured to be bonded to the lower surface and the upper surface of the auxiliary piece so as to sandwich the auxiliary piece from above and below. . Instead of such a configuration, the support member is formed with an auxiliary piece extending from a part of the periphery of the opening to the inside of the opening, and the first semiconductor chip and The second semiconductor chip may be configured to be bonded to the lower surface and the upper surface of the auxiliary piece so as to sandwich the auxiliary piece from above and below.

According to such a configuration, the first semiconductor chip and the second semiconductor chip can be adhered to the auxiliary piece of the support member from above and below the auxiliary piece, so that the first and second semiconductor chips can be bonded to each other. The first semiconductor chip and the second semiconductor chip can be securely and firmly bonded to the support member. Therefore, it is preferable to increase the bonding strength of the first semiconductor chip and the second semiconductor chip to the support member.

In another preferred embodiment of the present invention,
The second semiconductor chip is arranged at a location that does not cover above the terminals of the first semiconductor chip,
The main surface thereof is directed upward, and the terminals of the second semiconductor chip and the first semiconductor chip are connected to the terminals provided on the upper surface of the support member by wire. be able to.

According to such a configuration, each of the first semiconductor chip and the second semiconductor chip is appropriately conductively connected to the terminal on the upper surface of the support member via the wire. Semiconductor chip and the second semiconductor chip,
Since the main surfaces of the first and second semiconductor chips are directed upward, the operation of wire-connecting the terminals of the respective main surfaces of the first semiconductor chip and the second semiconductor chip to the terminals of the support member is performed in the same manner as in the related art. It can be easily and appropriately performed by a normal wire bonding operation using a wire bonder.

In another preferred embodiment of the present invention,
The second semiconductor chip is electrically connected to the first semiconductor chip with the main surface thereof facing downward, and one of the first semiconductor chip and the second semiconductor chip is connected to the second semiconductor chip. In addition, a configuration may be employed in which the terminal is electrically connected to a terminal provided on the support member.

According to such a configuration, before the first semiconductor chip and the second semiconductor chip are loaded into the support member, the first semiconductor chip and the second semiconductor chip are electrically connected to each other. For example, the first semiconductor chip and the second semiconductor chip can be collectively put into a supporting member. Further, it is not necessary to electrically connect each of the first semiconductor chip and the second semiconductor chip to the terminal of the support member, and only one of the first semiconductor chip and the second semiconductor chip is required. Can be conductively connected to the terminals of the support member, so that it is possible to simplify the operation of putting the semiconductor chips into the support member and then conducting the conductive connection therebetween. Therefore,
In order to improve the work efficiency of semiconductor chip mounting work,
It will be preferable.

In another preferred embodiment of the present invention,
The terminal of the support member is a tab-shaped terminal protruding inward of the opening from the edge of the opening of the support member, and may be one of the first semiconductor chip and the second semiconductor chip. One side may be provided with a terminal that is electrically connected to the tab-shaped terminal.

According to such a configuration, for one of the first semiconductor chip and the second semiconductor chip, a desired conductive connection can be obtained by connecting the terminal to the tab-shaped terminal of the support member. It can be done easily.

In another preferred embodiment of the present invention,
The first semiconductor chip and the second semiconductor chip may be configured to be bonded to the lower surface and the upper surface of the outer peripheral edge of the opening so as to sandwich the outer peripheral edge of the opening from above and below.

According to such a configuration, the first semiconductor chip and the second semiconductor chip can be adhered to the outer peripheral edge of the opening of the supporting member by being sandwiched from above and below. Both the first semiconductor chip and the second semiconductor chip can be securely and firmly bonded to the support member. Therefore, it is preferable to increase the bonding strength of the first semiconductor chip and the second semiconductor chip to the support member.

In another preferred embodiment of the present invention,
The first semiconductor chip and the second semiconductor chip may be bonded to each other, and only one of them may be bonded to the support member.

According to such a configuration, only one of the first semiconductor chip and the second semiconductor chip is adhered to the support member, but the first semiconductor chip and the second semiconductor chip are bonded to each other. Since these semiconductor chips are joined to each other, both of these two semiconductor chips can be appropriately mounted on the support member. In the above configuration, only one of the first semiconductor chip and the second semiconductor chip needs to be adhered to the support member.
Compared with a method of bonding both of them to the support member, the operation of mounting the semiconductor chip on the support member can be simplified, and the efficiency of the operation of mounting the semiconductor chip can be increased.

According to a second aspect of the present invention, there is provided a semiconductor chip mounting structure. This semiconductor chip mounting structure is a semiconductor chip mounting structure in which a first semiconductor chip and a second semiconductor chip are stacked on each other and mounted on a desired support member. An opening is provided through the supporting member in the thickness direction, and one of the first semiconductor chip and the second semiconductor chip is disposed in the opening. Can be

In the semiconductor chip mounting structure provided by the second aspect of the present invention, one of the first semiconductor chip and the second semiconductor chip is disposed in the opening of the support member. Therefore, unlike the structure in which the first semiconductor chip and the second semiconductor chip are stacked on the surface of the support member, the overall thickness is reduced by the amount of one of the semiconductor chips arranged in the opening. can do. Further, since the height of the second semiconductor chip can be reduced, when performing the wire bonding operation on the second semiconductor chip, the operation can be appropriately performed. Of course, since the opening hole provided in the support member is a hole penetrating in the thickness direction of the support member, as in the case of the first aspect of the present invention, the support member can be easily processed and manufactured. Cost can be reduced. In addition, it becomes possible to establish adhesion and electrical connection between the first semiconductor chip and the second semiconductor chip through an opening hole penetrating in the thickness direction of the support member, and to electrically connect the semiconductor chip to the support member. Various conveniences can also be achieved for the work of connecting to.

According to a third aspect of the present invention, a semiconductor device is provided. This semiconductor device is characterized by having a semiconductor chip mounting structure provided by the first aspect or the second aspect of the present invention.

In the semiconductor device provided by the third aspect of the present invention, the same effects as those obtained by the mounting structure of the semiconductor device provided by the first or second aspect of the present invention can be obtained. Further, the effects of reducing the manufacturing cost of the semiconductor device and reducing the overall thickness can be obtained.

In a preferred embodiment of the present invention, at least a main surface of each of the plurality of semiconductor chips and a peripheral portion thereof may be covered with a mold resin.

According to such a configuration, it is possible to provide a semiconductor device in which the main surface of each semiconductor chip and the wiring portion located on the periphery thereof are appropriately protected by the mold resin.

In another preferred embodiment of the present invention,
The support member is a film-shaped substrate in which a conductive wiring portion is formed on a thin synthetic resin film, and a lower surface of the substrate is electrically connected to each terminal of the plurality of semiconductor chips. A configuration in which a protruding terminal made of a solder ball is provided can be employed.

According to such a configuration, by heating and reflowing the solder balls constituting the protruding terminals, the semiconductor device can be surface-mounted at a desired position via the solder balls. Become. That is, according to the above configuration, despite the use of a film-shaped substrate as the support member, the surface mounting is performed at a desired position by solder reflow, similarly to a semiconductor device manufactured using a metal lead frame. A possible semiconductor device can be provided. For this reason, in the case of manufacturing a surface-mount type semiconductor device, an advantage is obtained in that the manufacturing cost of the semiconductor device can be reduced by using a film-shaped substrate instead of using a relatively expensive lead frame. Can be

According to a fourth aspect of the present invention, there is provided a method of mounting a semiconductor chip. The method of mounting a semiconductor chip includes mounting the first semiconductor chip and the second semiconductor chip on a desired support member with the second semiconductor chip stacked on the first semiconductor chip. In the mounting method of (1), the supporting member has an opening formed in advance in the thickness direction thereof, and when the first semiconductor chip is mounted on the supporting member,
It is characterized in that the first semiconductor chip is arranged and fixed on the lower surface side of the support member such that the terminals of the first semiconductor chip face the opening or are arranged in the opening.

According to the semiconductor chip mounting method provided by the fourth aspect of the present invention, the semiconductor chip mounting structure provided by the above-described first aspect of the present invention can be appropriately obtained. .

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a perspective view of an essential part showing an example of a semiconductor device intermediate product having a semiconductor chip mounting structure according to the present invention. FIG. 2 is an enlarged sectional view taken along the line II-II of FIG.

Semiconductor device intermediate product A shown in FIGS. 1 and 2
Is mounted on the substrate 1 in a state where two semiconductor chips 2A and 2B are stacked in the vertical direction which is the thickness direction thereof, and the two semiconductor chips 2A and 2B are connected to each other through a wire W such as a gold wire. It has a structure in which it is conductively connected to the conductive wiring portion 10 of the substrate 1. In the present embodiment, of the semiconductor chips 2A and 2B, the lower semiconductor chip 2A is a first semiconductor chip, and the upper semiconductor chip 2B is a second semiconductor chip.

The substrate 1 is a film-like substrate having a base made of a synthetic resin film such as polyimide formed in a thin and long strip shape, and has both sides extending in the longitudinal direction. A large number of small-diameter holes 11 are used at a constant pitch and are used to transfer the particles along a predetermined transfer path. The surface of the substrate 1 is provided with a conductive wiring portion 10 (omitted for convenience in FIG. 1) provided with a plurality of pad portions for wire bonding by attaching a copper foil or the like.

The substrate 1 is provided with a plurality of substantially rectangular opening holes 12 in plan view that penetrate in the thickness direction of the substrate 1. Each of the plurality of openings 12 is a set of two openings 12 adjacent to each other at a predetermined interval La, and the openings 12 are arranged at appropriate intervals in the longitudinal direction of the substrate 1. A plurality of sets are provided (see FIG. 3).
reference). In the present embodiment, each of the sets of opening holes 12
The band-like portion that separates the space between them is an auxiliary piece 13.
In FIG. 2, a hole denoted by reference numeral 14 is a hole used as a through hole for conducting a predetermined solder ball to the conductive wiring portion 10 in a process of manufacturing a semiconductor device described later.

The first semiconductor chip 2A and the second semiconductor chip 2B are configured as, for example, an LSI chip or another IC chip, and a desired electronic circuit is integrated on a silicon chip to be integrated. It is built in. One side surface of the first semiconductor chip 2A is:
The main surface 20A has a plurality of terminals 21. Similarly, one side surface of the second semiconductor chip 2B is also a main surface 20B having a plurality of terminals 22. Each of the plurality of terminals 21 and 22 is configured as a relatively flat pad portion for wire bonding, and the material thereof is, for example, aluminum, but preferably, the wire W
Gold plating is applied to the surface as a means for improving the conductive connection with the substrate.

The first semiconductor chip 2A is mounted on the lower surface side of the substrate 1 after the main surface 20A is set to be oriented upward. On the other hand, the second semiconductor chip 2B is mounted on the upper surface side of the substrate 1 after the main surface 20B is set to be in an attitude of facing upward. More specifically, in the main surface 20A of the first semiconductor chip 2A, the central portion in the width direction where the terminals 21 are not formed is disposed on the lower surface of the auxiliary piece 13 of the substrate 1 via the adhesive layer 30. Accordingly, each of the plurality of terminals 21 of the first semiconductor chip 2A is arranged below or below the two opening holes 12, 12. On the other hand, the second semiconductor chip 2B has its main surface 2
The surface opposite to OB is bonded to the upper surface of the auxiliary piece 13 via an adhesive layer 31. The width of the second semiconductor chip 2B is equal to that of the first semiconductor chip 2A.
Of the first semiconductor chip 2
It is arranged at a position that does not cover the upper part of the plurality of terminals 21 of A.

The semiconductor device intermediate product A can be obtained by the following semiconductor chip mounting method.

First, as shown in FIG. 3, a substrate 1 having a plurality of openings 12 is used in advance.
However, the operation of forming each of the openings 12 in the substrate 1 is performed by transferring the substrate 1 and adding two semiconductor chips 2A,
This can be performed before the work process for mounting 2B. Since each of the opening holes 12 is a through hole, it can be easily formed by, for example, press working for punching the substrate 1. Next, after the adhesive is applied to the upper and lower surfaces of the auxiliary piece 13 in the transfer path of the substrate 1, the second semiconductor chip 2B is placed on the upper surface of the auxiliary piece 13 using a chip mount device. I do. Also, the first
The semiconductor chip 2A is bonded to the lower surface of the auxiliary piece 13 by contacting the lower surface of the auxiliary chip 13 from below. Thereby, as shown in FIG. 4, the two semiconductor chips 2A, 2A
B can be bonded to the substrate 1 in a state where they are overlapped with each other.

In the above structure, although the first semiconductor chip 2A is arranged on the lower surface side of the substrate 1, all of the plurality of terminals 21 are located below the opening hole 12, and the upper part thereof is located on the substrate 1 It is in an open state that is not covered by. Therefore, as shown in FIG. 2, each terminal 21 of the first semiconductor chip 2A and the conductive wiring portion 10 of the substrate 1 can be appropriately conductively connected via the wire W. Since each of the terminals 21 has a height that is slightly lower than the upper surface of the substrate 1, the bonding operation of the wire W that connects each of the terminals 21 to the conductive wiring unit 10 is performed by:
It can be appropriately performed using a normal wire bonder.

On the other hand, although the second semiconductor chip 2B is disposed above the first semiconductor chip 2A, the second semiconductor chip 2B is substantially mounted on the upper surface of the substrate 1. I have. Therefore, the height dimension from the upper surface of the substrate 1 to the terminal 22 of the second semiconductor chip 2B is
The thickness is substantially the same as the thickness of the second semiconductor chip 2B, and can be set to a small size. As a result, the operation of connecting each terminal 22 of the second semiconductor chip 2B to the conductive wiring portion 10 using the wire W can be appropriately performed using a normal wire bonder.

In particular, in the above structure, the wire bonding position with respect to the substrate 1 is different between the two semiconductor chips 2A and 2A.
Since the height of each of the terminals 21 and 22 of B is intermediate, the position of the wire bonding to the substrate 1 is set as the reference height, and any one of the terminals 21 and 22 of the two semiconductor chips 2A and 2B is used. Can be prevented from deviating so much from the reference height. For this reason, the terminals 21 and 22 of the two semiconductor chips 2A and 2B
When the wire bonding operation is performed, it is possible to prevent the capillary of the wire bonder from being largely inclined and to press the capillary at an angle nearly perpendicular to the joining surface of the terminals 21 and 22, thereby making the conductive connection. Thus, wire bonding with good performance can be performed.

In the above structure, the total thickness of the mounting portions of the two semiconductor chips 2A and 2B is substantially the same as the sum of the total thickness of these two semiconductor chips 2A and 2B plus the thickness of the substrate 1. is there. Therefore, the substrate 1
When the thickness is small, it is optimal to reduce the overall thickness. Further, the two semiconductor chips 2A, 2
Since B is bonded to the auxiliary piece 13 in such a manner that the auxiliary piece 13 of the substrate 1 is sandwiched from above and below, the bonding strength of the substrate B to the substrate 1 can be increased.

Further, in the present embodiment, the bonding operation of the plurality of wires W to the conductive wiring portion 10 of the substrate 1 is performed such that the bonding positions are arranged in a staggered shape in plan view. More specifically, as best seen in FIG. 2, the terminals 21 of the first semiconductor chip 2A
Wiring portion 10 of wire W (W1) having one end connected to
And the bonding position N2 of the wire W (W2), one end of which is connected to the terminal 22 of the second semiconductor chip 2B, to the conductive wiring portion 10 by an appropriate dimension L in the direction in which the wires W extend. The positions are shifted from each other, and one bonding position N2 is located farther from the semiconductor chips 2A and 2B than the other bonding position N1.

By bonding a plurality of wires W in this manner, it is possible to substantially widen the bonding pitch interval of the wires W in the conductive wiring portion 10 and to bond the bonding portions of the adjacent wires W in the conductive wiring portion 10. Is undesirably conducted to prevent undesired conduction and short circuit. In the structure viewed from the side view direction shown in FIG. 2, two types of wires W1 and W
The two do not overlap each other. For this reason, it is convenient to eliminate the situation in which the wires W come into contact with each other and unduly conduct.

When a plurality of semiconductor chips are wire-connected to the conductive wiring portion of the substrate by adopting a chip-on-chip structure, it may be necessary to perform a large number of wire bondings at fine pitch intervals. The above-described wire connection structure employed in the present embodiment is advantageous in preventing unreasonable conductive contact between these many wires. Also, even if the wires touch each other,
In order to prevent an electrical short circuit between these wires, for example, a means using a wire whose entire surface is coated with an insulating material such as polyethylene may be employed.

Next, a method of manufacturing a semiconductor device as a finished product from the semiconductor device intermediate product A and an example of the configuration of the semiconductor device will be described.

FIG. 5 is a cross-sectional view of a main part showing an operation process for manufacturing a semiconductor device from the semiconductor device intermediate product A. FIG. 6 is a cross-sectional view of a main part showing an example of the configuration of a semiconductor device B as a finished product manufactured from the semiconductor device intermediate product.

From the semiconductor device intermediate product A to the semiconductor device B
First, as shown in FIG. 5, a resin package operation for covering the mounting locations of the two semiconductor chips 2A and 2B and the peripheral portions thereof with the mold resin 4 is performed. This resin package operation can be performed successively and continuously by using, for example, a transfer molding method while transferring the long substrate 1 to the position where the resin molding die is disposed in the longitudinal direction thereof. As the mold resin 4, for example, a thermosetting epoxy resin can be used. By this resin package operation, the two semiconductor chips 2A and 2B
The main surfaces 20A and 20B, the wire W, the bonding position of the wire W, and the peripheral portion thereof can be resin-sealed and can be protected.

Next, as shown by phantom lines in FIG. 5, a plurality of solder balls 5 ′ are respectively bonded to the openings of the plurality of holes 14 provided on the lower surface side of the substrate 1. The solder balls 5 'may be bonded using, for example, a suitable adhesive. The substrate 1 is provided above the plurality of holes 14.
Is located. After the bonding of the plurality of solder balls 5 ′ is completed, the plurality of solder balls 5 ′ are once melted and then hardened by carrying the semiconductor device intermediate product into a heating furnace. Such a heating operation and a curing operation of the solder balls 5 ′ can be performed with the bonding surface of the solder balls 5 ′ of the substrate 1 facing downward.

By performing the above operation, as shown in FIG. 6, a plurality of projecting terminals 5 are formed by the plurality of solder balls 5 '. When the solder balls 5 ′ are heated and melted, a part of the terminals 5 flows into the holes 14, so that the upper portions of the terminals 5 are connected to the substrate 1.
Are electrically connected to the conductive wiring portion 10. Further, the overall shape is a shape solidified into a substantially ball shape due to the surface tension of the solder, and the lower end tip portion protrudes downward by an appropriate dimension L1 from the lower surface of the first semiconductor chip 2A. . After the operation of forming the terminal 5 is completed,
The elongated substrate 1 is placed at an appropriate position N on both sides of the terminal 5.
3, cut at N3. Thereby, the individual semiconductor devices B can be sequentially cut and separated from the long substrate 1, and a large number of semiconductor devices B can be manufactured continuously.

When the semiconductor device B is mounted on a desired circuit board, for example, the surface mounting can be easily performed by the solder reflow method. That is, since the plurality of terminals 5 of the semiconductor device B are made of solder, after mounting the semiconductor device B on a desired circuit board, the circuit board is loaded into a heating furnace and the terminals 5 are connected. When heated and melted, the terminals 5 are appropriately electrically connected to the terminals on the circuit board, and the surface mounting operation of the semiconductor device B can be performed simply and reliably.

FIG. 7 is a sectional view of a main part showing another example of a semiconductor device intermediate product having a semiconductor chip mounting structure according to the present invention. In the drawings after FIG. 7, the same parts as those in the previous embodiment are denoted by the same reference numerals, and the detailed description thereof will be omitted.

The semiconductor device intermediate product Aa shown in FIG.
The semiconductor chip 2C and the second semiconductor chip 2D are not wire-connected to the conductive wiring portion 10A of the substrate 1A, but are connected by a so-called tab method. More specifically, the second semiconductor chip 2D is
The adhesive layer 31 is set after D is set to a downward position.
Is adhered to the upper surface of the auxiliary piece portion 13 of the substrate 1A via the. A plurality of terminals 22A provided on the main surface 20D
Are bump-shaped terminals protruding downward. On the other hand, the first semiconductor chip 2C is adhered to the lower surface of the auxiliary piece portion 13 via the adhesive layer 30, and the bump-like first terminal 23 and the first terminal 23 are connected to the upward main surface 20C. And two terminals 24. The first terminal 23 is conductively connected to the terminal 22A of the second semiconductor chip 2D, and the second terminal 24 is conductively connected to the tab-like terminal 15 of the substrate 1A. Tab-shaped terminal 15
Is formed by projecting a relatively thick and hard conductive member such as copper, which is connected to the conductive wiring portion 10A provided on the surface of the substrate 1A, in a cantilever beam shape toward the inside of the opening hole 12. Things. The conductive connection between the tab-shaped terminal 15 and the second terminal 24 and the conductive connection between the first terminal 23 and the terminal 22A are performed by interposing an anisotropic conductive film or an anisotropic conductive adhesive between the terminals. After that, the connection can be easily performed by bringing the terminals into pressure contact with each other while heating the portion to be connected. Note that an anisotropic conductive adhesive or an anisotropic conductive film is an adhesive or a film in which conductive particles are diffused inside an insulating material, and pressure is applied by a bump-shaped terminal or the like. The configuration is such that conductivity can be provided only between the parts.

In the semiconductor device intermediate product Aa having the above structure, the first semiconductor chip 2C is connected to the substrate 1A via the second terminal 24.
Of the second semiconductor chip 2D, a terminal 22A, a first terminal 23, a wiring portion inside the first semiconductor chip 2C, and a tab-shaped terminal via the second terminal 24. 15 are electrically connected. As understood from the embodiments shown in FIGS. 1 and 2, the present invention has a preferable effect that wire connection to a semiconductor chip can be simplified, but the mounting structure of the semiconductor chip according to the present invention is obtained. In this case, it is not always necessary to connect the semiconductor chip with a wire, and the semiconductor chip may be conductively connected to a predetermined position on the substrate without using a wire as in the semiconductor intermediate product Aa. When the first semiconductor chip 2C and the second semiconductor chip 2D are electrically connected to each other as in the case of the semiconductor device intermediate product Aa, only one of the first semiconductor chips 2C is connected to the substrate 1A. Since it is only necessary to electrically connect the two semiconductor chips 2C and 2D to the substrate 1A, there is no need to directly connect the semiconductor chips to the substrate 1A. It is possible to collectively perform the operations efficiently.

FIG. 8 is an exploded perspective view showing another example of the mounting structure of the semiconductor chip according to the present invention.

In the configuration shown in FIG.
B is provided with an opening hole 12A having a substantially H-shaped opening shape in plan view, so that the substrate 1B has the opening hole 12A.
A pair of auxiliary pieces 13A, 13A extending from a part of the peripheral edge of the opening 12A toward the inside of the opening 12A are formed. The pair of auxiliary pieces 13A, 13A have the same configuration as that of the auxiliary piece 13 shown in FIG. 3 which is divided into two regions at the middle portion in the longitudinal direction.

When the first semiconductor chip 2A or the second semiconductor chip 2B is mounted on the substrate 1B, the auxiliary pieces 13A, 13A are sandwiched from above and below.
The first semiconductor chip 2A and the second semiconductor chip 2B can be bonded to the lower and upper surfaces of the auxiliary pieces 13A, 13A, respectively. Therefore, even when the substrate 1B is used, the two semiconductor chips 2A and 2B can be securely and firmly adhered to the substrate similarly to the embodiment shown in FIGS. it can. Opening holes 12 forming the auxiliary pieces 13A, 13A
A can be easily formed on the substrate 1B by a working process such as punching press working, for example, by using a tool having an H-shaped punching blade in plan view. As described above, the specific method and shape of the auxiliary piece referred to in the present invention are not limited. Of course,
By removing one of the pair of auxiliary pieces 13A, 13A, one auxiliary piece 13A is inserted into the opening 12A.
Only the auxiliary pieces may be provided in a protruding state, and the specific number of the auxiliary pieces is not limited.

FIG. 9 is a perspective view of an essential part showing another example of the substrate used for the mounting structure of the semiconductor chip according to the present invention. FIG. 10 is a cross-sectional view of a main part showing an example of a mounting structure of a semiconductor chip configured using the substrate shown in FIG.

The substrate 1C shown in FIG. 9 has, for example, a plurality of openings 12C each having a substantially rectangular shape in plan view. The substrate 1C has the auxiliary piece 13 provided in each of the above embodiments. Alternatively, no means corresponding to the auxiliary piece 13A is provided. In the semiconductor chip mounting structure shown in FIG. 10, the first semiconductor chip 2E is attached to the lower surface of the periphery of the opening 12C by an adhesive layer so as to sandwich the periphery of the opening 12C of the substrate 1C from above and below. 30C, and the second semiconductor chip 2F is adhered to the upper surface of the peripheral portion via an adhesive layer 31C. As described above, in the present invention, even when the means corresponding to the above-described auxiliary piece is not provided on the substrate, the two semiconductor chips 2E and 2F sandwich a part of the substrate 1C so as to sandwich them. Substrate 1 of two semiconductor chips 2E and 2F
Adhesion to C can be performed reliably. In addition,
In the structure shown in FIG. 10, the first semiconductor chip 2E and the second
Is connected to each other via bump-shaped terminals 23 and 22A, and the second semiconductor chip 2F is connected to the substrate 1C via other bump-shaped terminals 24C.
The two semiconductor chips 2E and 2F are electrically connected to predetermined positions of the substrate 1C without using wire bonding means. If the adhesive layer 31C has a configuration using an anisotropic conductive adhesive, for example, the second semiconductor chip 2F
The operation of bonding the terminal 24C to the substrate 1C and the operation of electrically connecting the terminal 24C to a predetermined position of the substrate 1C can be performed simultaneously.

FIG. 11 is a cross-sectional view of a principal part showing another example of the mounting structure of the semiconductor chip according to the present invention.

In the structure shown in FIG. 11, a first semiconductor chip 2G is bonded to the lower surface of the outer peripheral edge of the opening 12C of the substrate 1C via an adhesive layer 32, and the terminal of the first semiconductor chip 2G is Reference numeral 21 faces the opening 12C. On the other hand, the second semiconductor chip 2H has a main surface 20H.
And the lower surface thereof is bonded to the main surface 20H of the first semiconductor chip 2G via an adhesive layer 33. The plurality of terminals 21 and 22 of the two semiconductor chips 2G and 2H are conductively connected to predetermined positions on the upper surface of the substrate 1C via wires W. In the structure shown in FIG. 11, the second semiconductor chip 2H has a structure that is not directly bonded to the substrate 1C.
The semiconductor chip 2H is mounted in a state where it is appropriately positioned and fixed to the substrate 1C by being bonded to the first semiconductor chip 2G appropriately bonded to the substrate 1C.

As described above, in the present invention, it is not always necessary to mount each of the two semiconductor chips directly on the substrate, and after mounting one of the semiconductor chips on the substrate, the other semiconductor chip is mounted on one of the substrates. It may have a structure bonded to a semiconductor chip.

FIGS. 12 and 13 are cross-sectional views of essential parts showing another example of the mounting structure of the semiconductor chip according to the present invention.

The structure shown in these figures corresponds to the second embodiment of the present invention.
Is a structure corresponding to an example of a semiconductor chip mounting structure provided by the aspect of (1). That is, in the structure shown in FIG. 12, although the first semiconductor chip 2P is bonded to the lower surface of the substrate 1D via the adhesive layer 34, the terminals 23a of the first semiconductor chip 2P are connected to the substrate 1D. Is not opposed to the through hole 12D. On the other hand, at a position facing the terminal 23a on the lower surface of the substrate 1D, for example, the conductive wiring portion 1 on the upper surface of the substrate 1D is provided.
A terminal 19 is provided which is electrically connected to the terminal 0 via a through hole (illustrating force) or the like. On the other hand, the second semiconductor chip 2Q
Is an adhesive layer 33 on the upper surface of the first semiconductor chip 2P.
And is located in the opening hole 12D. The terminal 22 of the second semiconductor chip 2Q is conductively connected to the conductive wiring section 10 of the substrate 1D via the wire W.

In the structure shown in FIG. 12, the terminals 23a of the first semiconductor chip 2P do not face the opening 12D, and the upper surface thereof is covered by the substrate 1D. Can be appropriately electrically connected to the terminal 19 provided on the lower surface of the. On the other hand, in the above structure, since the first semiconductor chip 2P is arranged on the lower surface side of the substrate 1D and the second semiconductor chip 2Q is arranged in the opening 12D, these two semiconductor chips 2P, 2Q It is possible to reduce the overall thickness of the mounting location.

As described above, according to the present invention, the through-hole formed in the substrate does not necessarily have to be provided above the terminal of the first semiconductor chip. Need not be used to electrically connect to other desired parts. In the present invention,
The opening provided in the substrate may be used for disposing the second semiconductor chip. Of course, when the thickness of the substrate 1D is large and the depth of the opening 12D is large, the entire second semiconductor chip 2Q is disposed in the opening 12D. Regardless of whether the semiconductor chip 2Q is disposed in its entirety in the opening 12D or only a part thereof, the semiconductor chip 2Q may be any one in the present invention.

The structure shown in FIG. 13 is different from the structure shown in FIG. 12 in that the first semiconductor chip 2I is arranged in the opening 12E of the substrate 1E and the second semiconductor chip 2J
Is bonded to the upper surface of the substrate 1E via an adhesive layer 33a. Main surface 2 of the second semiconductor chip 2J
The first terminal 26 is electrically connected to a predetermined position of the substrate 1E. Further, the first semiconductor chip 2I and the second semiconductor chip 2J are bonded to each other via an adhesive layer 33b, and the first semiconductor chip 2I
Terminal 23 and the second terminal 22A of the second semiconductor chip 2J.
Are electrically connected to each other.

In the structure shown in FIG. 13, by arranging the first semiconductor chip 2I in the opening 12E, the overall thickness of the mounting location of the two semiconductor chips is also increased, similarly to the structure shown in FIG. Can be reduced. As described above, in the present invention, when the means for reducing the overall thickness by accommodating the semiconductor chip in the opening hole is employed, the first semiconductor chip and the second semiconductor chip which are vertically stacked are used. May be arranged in the opening.

FIGS. 14 and 15 are cross-sectional views of main parts showing another example of the mounting structure of the semiconductor chip according to the present invention.

Each of the structures shown in these figures has a structure in which a total of three semiconductor chips are mounted so as to be vertically stacked. Specifically, in the structure shown in FIG. 14, in the mounting structure of the semiconductor chip shown in FIGS. 1 and 2, a third semiconductor chip 2K is further provided on main surface 20B of second semiconductor chip 2B. The terminals 25 of the third semiconductor chip 2K are electrically connected to the pad-shaped terminals of the conductive wiring portion 10 of the substrate 1 via wires W. In the structure shown in FIG. 15, the first semiconductor chip 2L is bonded to the lower surface of the auxiliary piece 13 of the substrate 1 via the adhesive layer 35, and the second semiconductor chip 2M is attached to the auxiliary piece 13 By bonding the bump-shaped terminals 26 and 26a to each other by bonding to the upper surface via an adhesive layer 36, the third semiconductor chip 2N is bonded to the upper surface of the second semiconductor chip 2M. doing. The terminal 25a of the third semiconductor chip 2N and the terminal 25b of the first semiconductor chip 2L are conductively connected to the pad-like terminal of the conductive wiring portion 10 of the substrate 1 via the wire W.

According to each of the above-described structures, a total of three semiconductor chips are mounted so as to be stacked one above the other.
It is possible to further increase the integration density of those semiconductor chips. As is apparent from the structure shown in FIG. 14, when each of the three semiconductor chips 2A, 2B, and 2K is conductively connected to a predetermined position on the substrate 1 using the wire W, the number of the wires W is further increased. As a result, the wiring density of the large number of wires W increases. Therefore, in such a case, as shown in the figure, the bonding position of the wire W on the substrate 1 is shifted in the direction in which the wire W extends, and one end is connected to each of the terminals 21, 22, 25. It is preferable that the three types of wires W (W1, W2, W3) do not cross each other in a side view.

As described above, the present invention can be applied not only to the case where two semiconductor chips are mounted on top of each other but also to the case where three semiconductor chips are mounted on top of each other. The present invention can also be applied to a case where one semiconductor chip or more semiconductor chips are mounted in a vertically stacked state. In the present invention, the point is that at least two or more semiconductor chips may be stacked vertically, and the number of the semiconductor chips is not limited. According to the present invention, when the third semiconductor chip is mounted on the first semiconductor chip and the second semiconductor chip in addition to the first semiconductor chip and the second semiconductor chip, the third semiconductor chip is placed under the second semiconductor chip. It may be arranged further on the lower surface side of the first semiconductor chip located on the side.

FIG. 16 is a plan view of an essential part showing an example of a lead frame applied to a semiconductor chip mounting structure according to the present invention. FIG. 17 is a plan view of a principal part showing an example of a mounting structure of a semiconductor chip configured using the lead frame shown in FIG. FIG. 18 is a fragmentary cross-sectional view showing one example of a semiconductor device manufactured using a lead frame.

The lead frame 6 shown in FIG. 16 is a long member formed by punching and pressing a metal plate such as copper, for example, and is similar to a lead frame conventionally used in the manufacture of semiconductor devices. The basic configuration is common. In other words, this lead frame 6 is formed by forming a plurality of die pads 60 for mounting a semiconductor chip at regular intervals in the longitudinal direction thereof, and supporting leads 61 supporting the die pads 60 and separating from the die pads 60. There are provided a plurality of internal leads 62 provided and a plurality of external leads 64 connected to the plurality of internal leads 62 via tie bars 63. However, this lead frame 6 is a die pad 6
0, two opening holes 12B, 12B are formed, and an auxiliary piece 65 is formed between these opening holes 12B, 12B.

In the semiconductor chip mounting structure shown in FIG. 17, the first semiconductor chip 2A and the second semiconductor chip 2B are connected to the auxiliary piece 65 so as to sandwich the auxiliary piece 65 of the lead frame 6 from above and below. The lower surface and the upper surface of the portion 65 are bonded to each other. However, the plurality of terminals 21 provided on the upward main surface of the first semiconductor chip 2A
Is located below or below the opening 12B, and above it is open. Therefore, the first semiconductor chip 2
Regarding A, the terminal 21 can be appropriately connected to the internal lead 62 via the wire W. Of course, second
A plurality of terminals 22 provided on the main surface of the semiconductor chip 2B can also be connected to the internal leads 62 via the wires W.

The semiconductor device Ba shown in FIG.
7 is obtained by performing a resin package operation of covering the two semiconductor chips 2A and 2B having the structure shown in FIG. 7 and a peripheral portion thereof with the mold resin 4a, and then forming the lead frame 6. Such a resin package operation and a forming operation of a lead frame are the same as those in a manufacturing process of a semiconductor device using a conventional lead frame, and a detailed description thereof will be omitted for convenience. The main surfaces of the semiconductor chips 2A and 2B and the conductive wiring portions such as the wires W are appropriately protected. Further, the external lead 64 serves as a terminal for soldering the semiconductor device Ba,
Surface mounting on a desired part can be appropriately performed.

As described above, in the present invention, the support member on which a plurality of semiconductor chips are mounted is not limited to the case where a thin film substrate made of a synthetic resin is used, and a case where a metal lead frame is used. I don't care. Furthermore, in the present invention, instead of the lead frame, for example, a ceramic plate-like substrate having a conductive wiring portion formed on the surface, or a synthetic resin plate-like substrate such as an epoxy resin may be used as the support member. I don't care. The specific type of the support member referred to in the present invention is not limited.

The present invention is not limited to the contents of the above embodiments. Regardless of the specific type of the semiconductor chip referred to in the present invention, semiconductor chips such as various memory elements such as ferroelectric memories (ferroelectrics-RAM) and various other IC chips and LSI chips can be used. Can be applied.

[Brief description of the drawings]

FIG. 1 is a perspective view of an essential part showing an example of a semiconductor device intermediate product having a semiconductor chip mounting structure according to the present invention.

FIG. 2 is an enlarged sectional view taken along the line II-II of FIG.

3 is a perspective view of relevant parts showing a step of manufacturing the intermediate semiconductor device product shown in FIGS. 1 and 2. FIG.

FIG. 4 is an essential part perspective view showing a step of manufacturing the semiconductor device intermediate product shown in FIGS. 1 and 2;

5 is a fragmentary cross-sectional view showing an operation step of manufacturing a semiconductor device from the semiconductor device intermediate product shown in FIGS. 1 and 2;

FIG. 6 is a cross-sectional view of a principal part showing an example of the configuration of a semiconductor device manufactured from the semiconductor device intermediate product shown in FIGS. 1 and 2;

FIG. 7 is a sectional view of a main part showing another example of a semiconductor device intermediate product having a semiconductor chip mounting structure according to the present invention.

FIG. 8 is an exploded perspective view showing another example of a semiconductor chip mounting structure according to the present invention.

FIG. 9 is a main part perspective view showing another example of the substrate used for the mounting structure of the semiconductor chip according to the present invention.

10 is a fragmentary cross-sectional view showing one example of a mounting structure of a semiconductor chip configured using the substrate shown in FIG. 9;

FIG. 11 is a fragmentary cross-sectional view showing another example of the mounting structure of the semiconductor chip according to the present invention.

FIG. 12 is a fragmentary cross-sectional view showing another example of a semiconductor chip mounting structure according to the present invention.

FIG. 13 is a fragmentary cross-sectional view showing another example of the mounting structure of the semiconductor chip according to the present invention.

FIG. 14 is a fragmentary cross-sectional view showing another example of a semiconductor chip mounting structure according to the present invention.

FIG. 15 is a fragmentary cross-sectional view showing another example of a semiconductor chip mounting structure according to the present invention.

FIG. 16 is a plan view of a principal part showing an example of a lead frame applied to a semiconductor chip mounting structure according to the present invention.

17 is a plan view of a principal part showing an example of a mounting structure of a semiconductor chip configured by using the lead frame shown in FIG. 16;

FIG. 18 is a fragmentary cross-sectional view showing an example of a semiconductor device manufactured using a lead frame.

FIG. 19 is a cross-sectional view of a principal part showing an example of a conventional semiconductor chip mounting structure.

FIG. 20 is a cross-sectional view of a principal part showing another example of a conventional semiconductor chip mounting structure.

[Explanation of symbols]

1, 1A-1C Substrate (supporting member) 2A, 2C, 2E, 2G, 2I, 2L, 2P First semiconductor chip 2B, 2D, 2F, 2H, 2J, 2M, 2Q Second semiconductor chip 2K, 2N 3 semiconductor chip 6 lead frame (supporting member) 10, 10A conductive wiring portion 12, 12A to 12C opening hole 13, 13A auxiliary piece portion 15 terminal 20A, 20B main surface 21 terminal 22, 22A terminal 23 terminal 25 terminal 26, 26a Terminal 65 Auxiliary piece W Wire A, Aa Intermediate semiconductor device B, Ba Semiconductor device

Claims (15)

[Claims] A first surface having a main surface with a terminal;
Of the first semiconductor chip and the second semiconductor chip
A semiconductor chip mounting structure in which a second semiconductor chip is mounted on a desired support member in a state where the second semiconductor chip is stacked on the semiconductor chip, wherein the first semiconductor chip has a main surface facing upward. And is disposed on the lower surface side of the support member, and the support member penetrates in the thickness direction of the support member so that the upper part of the terminal of the first semiconductor chip is not covered by the support member. A mounting structure for a semiconductor chip, wherein an opening is provided. 2. The support member may be a film-shaped substrate having a conductive wiring portion formed on a thin synthetic resin film, a metal lead frame, or a plate having a conductive wiring portion formed on the surface. The mounting structure of the semiconductor chip according to claim 1, which is a substrate. 3. The supporting member is provided with a plurality of the opening holes at an interval, so that an auxiliary piece portion for partitioning between the plurality of opening holes is formed, and 3. The semiconductor chip according to claim 1, wherein the first semiconductor chip and the second semiconductor chip are bonded to a lower surface and an upper surface of the auxiliary piece so as to sandwich the auxiliary piece from above and below. Mounting structure. 4. The support member is formed with an auxiliary piece extending from a part of a peripheral edge of the opening to an inside of the opening, and the first semiconductor chip and the second semiconductor are formed. 3. The semiconductor chip mounting structure according to claim 1, wherein the chip is bonded to a lower surface and an upper surface of the auxiliary piece so as to sandwich the auxiliary piece from above and below. 5. The second semiconductor chip is arranged at a position not covering the terminals of the first semiconductor chip and has a main surface facing upward. The mounting structure of a semiconductor chip according to claim 1, wherein each terminal of the semiconductor chip and the first semiconductor chip is wire-connected to a terminal provided on an upper surface of the support member. 6. The second semiconductor chip is electrically connected to the first semiconductor chip with its main surface facing down, and the first semiconductor chip and the second semiconductor chip are connected to each other. 5. The semiconductor chip mounting structure according to claim 1, wherein any one of the semiconductor chips is electrically connected to a terminal provided on the support member. 6. 7. The terminal of the support member is a tab-shaped terminal projecting inward from the edge of the opening of the support member, and the first semiconductor chip and the second semiconductor. One of the chips is provided with a terminal that is electrically conductively connected to the tab-shaped terminal.
A mounting structure of the semiconductor chip according to claim 6. 8. The semiconductor device according to claim 1, wherein the first semiconductor chip and the second semiconductor chip are bonded to a lower surface and an upper surface of the outer periphery of the opening so as to sandwich the outer periphery of the opening from above and below. Or the mounting structure of the semiconductor chip of 2. 9. The semiconductor device according to claim 1, wherein the first semiconductor chip and the second semiconductor chip are bonded to each other, and only one of them is bonded to the supporting member.
Or the mounting structure of the semiconductor chip of 2. 10. A second semiconductor chip and one or more other semiconductor chips separate from the first semiconductor chip are further provided on the second semiconductor chip. A mounting structure of the semiconductor chip according to claim 1. 11. A semiconductor chip mounting structure in which a first semiconductor chip and a second semiconductor chip are stacked on each other and mounted on a desired support member, wherein the support member includes A hole provided in the thickness direction of the semiconductor chip, and one of the first semiconductor chip and the second semiconductor chip is disposed in the hole. Chip mounting structure. 12. A semiconductor device having the mounting structure of the semiconductor chip according to claim 1. Description: 13. The semiconductor device according to claim 12, wherein at least a main surface of each of the plurality of semiconductor chips and a peripheral portion thereof are covered with a mold resin. 14. The support member is a film-like substrate, and a lower surface portion of the substrate is provided with a protruding terminal made of a solder ball that is electrically connected to each terminal of the plurality of semiconductor chips. The semiconductor device according to claim 13, wherein: 15. A method for mounting a semiconductor chip, comprising mounting the first semiconductor chip and the second semiconductor chip on a desired support member with the second semiconductor chip stacked on the first semiconductor chip. In the support member, an opening hole that penetrates the support member in the thickness direction is formed in advance, and when the first semiconductor chip is mounted on the support member, terminals of the first semiconductor chip are connected. A method of mounting a semiconductor chip, characterized in that the first semiconductor chip is arranged and fixed on the lower surface side of the support member so as to face the opening or to be arranged in the opening.