JPH11111683A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) Abstract: Provided is a method for manufacturing a semiconductor device capable of effectively planarizing the surface of a film formed by a CVD method and improving in-plane uniformity of the film thickness. SOLUTION: SiO _{2 is formed} on a Si substrate 1 by a CVD method.
The film 2a is formed, the SOG film 2b is coated, and the interlayer insulating film 2 is formed. Next, the Si substrate 1 is divided into two regions, a center portion and an end portion, and the film thickness of the interlayer insulating film 2 in these two regions is measured. Interlayer insulating film 2 in each of two regions
The entire surface of the interlayer insulating film 2 is etched back by the RIE method while heating the Si substrate 1 so as to have a temperature substantially proportional to the thickness of the film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method suitable for application to planarization of an interlayer insulating film.

[0002]

2. Description of the Related Art In a conventional semiconductor device manufacturing process, if an interlayer insulating film is formed on a substrate by a chemical vapor deposition (CVD) method, the surface is poor in flatness. Even if a wiring made of aluminum (Al) or the like is formed, there is a problem that the wiring is disconnected.

Therefore, as a method of flattening the surface of an interlayer insulating film, spin-on glass (SOG, Spin
On glass), a method of covering the surface of the interlayer insulating film, an etch back method using a photoresist or the like, a method of reflowing by heat-treating a boron phosphorus silicate glass (BPSG) film or the like at a high temperature are used.

In recent years, with the increase in the density of wiring patterns, an interlayer insulating film made of a material having more excellent filling characteristics has been used.

[0005]

However, since these interlayer insulating films have a strong dependence on the density of the wiring pattern and the quality of the underlying film, it has been difficult to secure a sufficient flatness. Since the surface flatness of the interlayer insulating film is not sufficiently ensured as described above, if the density of the upper wiring formed on the interlayer insulating film is increased, the depth of focus is affected by the step of the base in the lithography process. There has been a problem that shortage has occurred and the pattern of the upper wiring cannot be transferred.

In addition, the in-plane uniformity of a film formed by a CVD apparatus cannot meet the requirement for uniform flatness in the plane as the number of interlayer insulating films to be formed increases.

Conventionally, the improvement of in-plane uniformity has been studied independently in each of a process of forming an interlayer insulating film by a CVD method or the like and a process of flattening an interlayer insulating film by an etch-back method or the like. It has been. However, like this,
If the in-plane uniformity is to be improved independently in each step, the tendency of the thickness of the interlayer insulating film after the execution of each step shows the same tendency in each step. After all the steps related to the film formation, the in-plane uniformity of the interlayer insulating film deteriorates. This will be specifically described as follows.

That is, as shown in FIG. 4A, first, silicon (Si) on which elements (not shown) such as wirings and transistors made of Al or the like are formed in advance.
Silicon oxide (SiO 2) is formed on the substrate 101 by CVD.
₂ ) Form the film 102a. Thereafter, as shown in FIG. 4B, the entire surface is coated with an SOG film 102b, and the surface is flattened. Next, as shown in FIG. 4C, the SiO ₂ film 102a and the SOG
The surface of the interlayer insulating film 102 including the film 102b is planarized.

Here, the S formed on the Si substrate 101
Although the surface of the iO ₂ film 102a rises at its center, the same film thickness tends to be exhibited even if the entire surface is etched back after coating the SOG film 102b. Therefore, the tendency that the film thickness at the center of the interlayer insulating film 102 becomes large is emphasized, and the difference between the film thickness at the center and the film thickness at the end is further increased.
That is, even after the step of coating the SOG film 102b and the step of flattening the surface by the etch back method over the whole surface,
It is difficult to make the thickness of the interlayer insulating film 102 uniform over the entire surface of the substrate 101. As a result, the difference between the film thickness at the center and the film thickness at the end of the interlayer insulating film 102 is up to 30
It becomes 0 nm or more.

In addition, as a film in which the in-plane non-uniformity as described above is observed, there is a polycrystalline Si film other than the insulating film.

Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device capable of effectively flattening the surface of a film formed by a CVD method and improving the in-plane uniformity of the film thickness. It is in.

[0012]

In order to achieve the above-mentioned object, the present invention provides a method of manufacturing a semiconductor device in which a film is formed on a substrate by a chemical vapor deposition method and then the film is etched back. Wherein the etch-back is performed while heating the substrate so that the temperature distribution is such that the in-plane non-uniformity of the film thickness is offset by the etch-back.

In the present invention, typically, the substrate is divided into a plurality of regions, the film thickness of the film formed on the substrate is measured for each region, and the substrate is measured for each region. Heat to a temperature approximately proportional to

In the present invention, typically, C
A plurality of gas passages are provided in a substrate heating table in a dry etching apparatus used for etching back a film formed by the VD method, and a flow rate of a temperature control gas flowing through the plurality of gas passages is controlled, thereby forming the film by a CVD method. The in-plane non-uniformity of the thickness of the formed film has a temperature distribution that is offset by the etch back.

In the present invention, the film formed on the substrate is typically a SiO ₂ film, silicon nitride (SiN)
Film, SOG film, phosphosilicate glass (PSG) film, B
This is an insulating film such as a PSG film, and the film other than the insulating film includes, for example, a polycrystalline Si film.

In the present invention constructed as described above, the substrate is heated so that the in-plane non-uniformity of the thickness of the film formed on the substrate by the CVD method has a temperature distribution that is offset by the etch back. By performing the etch-back while the film thickness on the substrate is large, the etching rate of the portion having a large film thickness can be made higher than that of the portion having a small film thickness.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. In all the drawings of the following embodiments, the same or corresponding portions are denoted by the same reference numerals.

In this embodiment, as shown in FIG. 1A, first, an Si substrate 1 on which elements such as wirings and transistors made of Al or the like (both not shown) are formed.
An SiO ₂ film 2a is formed thereon by, for example, a CVD method. Here, CVD in forming the SiO ₂ film 2a is performed.
As an example of the conditions, a mixed gas of tetraethoxysilane (TEOS) and oxygen (O ₂ ) is used as a reaction gas, and the flow rates thereof are 800 sccm and 600 s, respectively.
ccm, RF power 700 W, pressure 8.2 Ton
rr, the substrate heating temperature is 400 ° C.

Next, as shown in FIG. 1B, the SiO ₂ film 2
An SOG film 2b is coated on the entire surface of a at a thickness of, for example, 575 nm. Subsequently, after performing a curing process on the SOG film 2b, a surface process is performed in an O ₂ plasma atmosphere. These SiO ₂ film 2a and SOG film 2b constitute an interlayer insulating film 2.

Next, as shown in FIG. 2, the Si substrate 1 is divided into two regions, for example, a central portion 1a and an end portion 1b, and a plurality of regions including the inside of these two regions on the surface of the interlayer insulating film 2 are formed. The film thickness is measured at, for example, nine locations (indicated by x in the figure) by, for example, ellipsometry.

In this embodiment, the interlayer insulating film 2
Since the surface is coated with the SOG film 2b, it is locally flattened, but the film thickness of the central portion 1a is generally larger than the film thickness of the end portion 1b. The thickness of the interlayer insulating film 2 is not uniform over the entire surface.

Next, the Si substrate 1 is transported into a dry etching apparatus (not shown), and is placed on the heater stage 3 as shown in FIG. 1C. Here, as shown in FIG. 3, the heater stage 3 is provided with, for example, two cooling gas flows for controlling the substrate heating temperature below two regions of the central portion 1a and the end portion 1b of the Si substrate 1. Gas lines 4a, 4
b is provided. And these gas lines 4
a, 4b by controlling the flow rate of the cooling gas
The substrate heating temperature at the center 1a and the end 1b of the i-substrate 1 can be controlled.

Next, data of the film thickness of the interlayer insulating film 2 in the region between the central portion 1a and the end portion 1b is converted into a circuit (not shown) for controlling a substrate heating temperature in a dry etching apparatus.
While heating the heater stage 3 so that the substrate heating temperature has a temperature distribution substantially proportional to the distribution of the thickness of the interlayer insulating film 2, for example, by reactive ion etching (RIE). Is etched back to make the film thickness uniform. More specifically, for example, based on the data of the film thickness of the central portion 1a and the end portion 1b of the interlayer insulating film 2 fed back to the circuit for controlling the substrate heating temperature in the dry etching apparatus, for example, The film thickness of the central portion 1a of the end portion 2 is
When the thickness is about 100 nm larger than the film thickness of b, two gas lines 4 a provided on the heater stage 3,
4b, the flow rate of the gas flowing through the gas line 4a below the central portion 1a of the Si substrate 1 is reduced so that the substrate heating temperature of the central portion 1a of the Si substrate 1 increases by about 70 ° C. Perform the whole etch-back. by this,
The etching rate at the portion where the thickness of the central portion 1a of the interlayer insulating film 2 is large is higher than the etching rate at the portion where the thickness of the end portion 1b of the interlayer insulating film 2 is small, and the etching of the portion where the film thickness is large is thin. Since the etching proceeds faster than the etching of the small portion, the thickness of the interlayer insulating film 2 is made uniform over the entire surface. Here, as an example of the etch-back condition, a mixed gas of CHF ₃ , CF ₄ and Ar is used as an etching gas, RF power is set to 1000 W, and pressure is set to 240 Pa.

As described above, as shown in FIG. 1D, the thickness of the interlayer insulating film 2 is made uniform over the entire surface of the Si substrate 1.

As described above, according to this embodiment, the Si substrate 1 is divided into two regions of the central portion 1a and the end portion 1b, and the film thickness of the interlayer insulating film 2 in those regions is measured. Thereafter, the entire surface of the interlayer insulating film 2 is etched back by RIE while heating the Si substrate 1 so that the temperature of those regions becomes a temperature substantially proportional to the thickness of the interlayer insulating film 2 in those regions. By doing so,
The surface of the interlayer insulating film 2 can be effectively flattened, and the thickness of the interlayer insulating film 2 can be made uniform over the entire surface of the Si substrate 1. As a result, the step on the surface of the interlayer insulating film 2 can be eliminated, so that the lack of depth of focus in the lithography process performed later can be eliminated, and a high-density wiring pattern can be transferred onto the interlayer insulating film 2. Can be.

As described above, one embodiment of the present invention has been specifically described. However, the present invention is not limited to the above-described embodiment, and various modifications based on the technical idea of the present invention are possible. .

For example, the numerical values and materials given in the above-described embodiment are merely examples, and different numerical values and materials may be used as needed.

For example, in the above-described embodiment, the RIE method is used as the etch-back method. However, if the etching rate can be controlled by the substrate heating temperature, a dry etching method other than the RIE method may be used. Method may be used.

Further, for example, in the above-described embodiment, of the two gas lines 4a and 4b provided on the heater stage 3, the gas flow rate is changed by using Si gas.
Although only the gas line 4a below the central portion 1a of the substrate 1 was used, the flow rate of the cooling gas flowing through the gas line 4b below the end portion 1b of the Si substrate 1 may be changed as necessary. Alternatively, the flow rate of the cooling gas flowing through the two gas lines 4a and 4b may be changed together.

Further, for example, in the above-described embodiment, the gas lines 4a,
4b was two, but if necessary, three gas lines
More than this may be provided.

Further, for example, in the above-described embodiment, the temperature of the heater stage 3 is set at the central portion 1 of the Si substrate 1.
In the case where the selection ratio becomes non-uniform due to the change between the end portion 1a and the end portion 1b, which hinders the etching, the lower electrode of the dry etching apparatus is connected to the center portion 1a and the end portion 1 of the Si substrate 1.
b, and an optimized RF power is applied to the lower electrode of each of these two portions to eliminate non-uniformity in the etching selectivity. You may.

[0032]

As described above, according to the present invention, the etch-back is performed while heating the substrate so that the temperature distribution is such that the in-plane non-uniformity of the film thickness is offset by the etch-back. By doing so, the surface of the film on the substrate can be effectively flattened, and the film thickness can be made uniform over the entire surface of the substrate. As a result, the step on the surface of the film on the substrate can be eliminated, so that the lack of depth of focus due to the step in the base in the subsequent lithography step can be eliminated, and a high-density pattern can be transferred onto the film. it can.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view for explaining the method for manufacturing a semiconductor device according to one embodiment of the present invention;

FIG. 3 is a plan view showing a heater stage according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view for explaining a problem of flattening a surface of a conventional insulating film.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Si substrate, 2 ... Interlayer insulating film, 2a ... S
SiO ₂ film, 2b SOG film, 3 heater stage, 4a, 4b gas line

Claims (4)

[Claims] In a method of manufacturing a semiconductor device, a film is formed on a substrate by a chemical vapor deposition method, and then the film is etched back. A method of manufacturing a semiconductor device, wherein the etchback is performed while heating the substrate so as to have a temperature distribution in which uniformity is offset. 2. The method according to claim 1, wherein the substrate is divided into a plurality of regions, and the film thickness of the film formed on the substrate is measured for each of the regions. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is heated to a proportional temperature. 3. A plurality of gas passages are provided in a substrate heating table in a dry etching apparatus used for the etch back,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the temperature distribution is provided by controlling a flow rate of a temperature control gas flowing through the plurality of gas passages. 4. The method according to claim 1, wherein said film is an insulating film.