JPH10321535A - Semiconductor substrate having compound semiconductor layer, method of manufacturing the same, and electronic device manufactured on the semiconductor substrate - Google Patents

Abstract

(57) [Problem] To provide a method for manufacturing a semiconductor substrate capable of economically manufacturing a single crystal compound semiconductor film with few crystal defects on a large-area silicon substrate with high productivity, high uniformity, high controllability. And a semiconductor substrate produced thereby, and a semiconductor element manufactured on the substrate. SOLUTION: A semiconductor layer 1 made of a single crystal compound is provided on a surface 13 having a sealed hole 12 of a porous region 11.
4. A semiconductor substrate having 4. Further, a step (b) of heat-treating the Si substrate 10 having the porous region 11 in order to seal the holes 12 on the surface of the porous region; A step (c) of heteroepitaxially growing a single crystal compound semiconductor layer 14 on the region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method for manufacturing the same, and more particularly, to a semiconductor substrate having a single crystal compound semiconductor formed on a Si substrate and suitable for forming electronic devices and integrated circuits. The present invention relates to a method for manufacturing the electronic device and an electronic device manufactured on the semiconductor substrate.

[0002]

2. Description of the Related Art Group IV elements belonging to Group IV of the periodic table, such as Si and Ge, have been used as substrates (wafers) of semiconductor devices for a long time and have been highly developed. As is well known today, DRAM, MPU, logic IC, analog IC
It is fabricated on a Si substrate as many electronic devices,
It is used as an active region of a diode, a MOS transistor, or a bipolar transistor. But these
Group IV elements are not suitable for light emitting devices.

On the other hand, GaAs, GaP, InP, Ga
Compound semiconductors of the III-V and II-VI groups represented by N, ZnSe, etc. are very suitable for light emitting devices such as LEDs and lasers, and many studies have been made, and LEDs and semiconductor lasers have already been put into practical use. ing. In addition, HEMT transistors and the like are created using these compound semiconductors, and GH
High frequency circuits that can be used in the z band have also been put to practical use.

[0004] However, compound semiconductor substrates have low mechanical strength, so that it is difficult to manufacture large-area wafers of compound semiconductors. Therefore, since the size of the wafer is considerably smaller than that of the silicon wafer, the production efficiency is lower than that of the silicon process. Further, the manufacturing cost of the wafer itself is more than ten times that of a silicon wafer of the same size.

In order to overcome such a problem, GaAs is used.
Attempts have been made to heteroepitaxially grow a compound semiconductor on an Si substrate that is inexpensive, has high mechanical strength, and can produce a large-area wafer, as typified by on Si.
This technology can improve productivity by forming light-emitting devices such as LEDs and lasers and high-speed electronic devices using compound semiconductors on a silicon substrate that has high mechanical strength, is inexpensive, and has high thermal conductivity. It aims to increase the use of these devices and reduce costs. Further, since such a light emitting device and a high-speed electronic device can be integrated on the same substrate as a highly developed Si-LSI, an optoelectronic integrated circuit (OEIC) can be realized.

[0006] However, several problems have been pointed out in the growth of compound semiconductors on Si.
There are many difficulties in fabricating devices using compound powders grown on Si.

One is the generation of antiphase grains due to polarity / non-polarity.
Large stress and lattice defects occur in the epitaxial layer.

Another is that stress and lattice defects are generated between the Si substrate and the compound semiconductor film due to a difference in thermal expansion coefficient and lattice mismatch.

The former can be suppressed by using a Si substrate having an off-angle. The latter cannot be easily solved, and although many research institutes have studied various crystal growth techniques, the dislocation density, which is an indicator of crystallinity, is currently difficult to overcome with a wall of 106 / cm ^2. You can't break through. This is said to be due to lattice distortion caused by mismatch between the lattice constants of the Si substrate and the compound semiconductor layer. Crystal defects introduced at a high density are not practical because they degrade device characteristics such as light emission characteristics and lifetime.
Therefore, III-V, II-
It is required to form a compound semiconductor thin film such as VI on a Si substrate.

[0010] Also, many research reports have been made on semiconductor single crystal films of IV-IV compounds such as SiC and SiGe as light emitting materials. It is desired that these compound semiconductor single crystal films are also formed on the Si substrate. As described above, a single crystal film of an IV-IV compound such as SiGe or SiC is
In the case of forming on an i-substrate, such reduction of crystal defects has been strongly demanded for the same reason.

As described in detail above, there is a high demand for heteroepitaxy of a single crystal having good crystallinity on a Si substrate, but the possibility of realization is still low.

There have been many reports on such heteroepitaxial growth on a silicon substrate.

[0013] Among them, a porous Si is provided on the surface of a Si substrate.
Attempts have been made to reduce crystal defects by forming a layer and performing heteroepitaxial growth thereon.

Ohmachi et al., 198, Japan Society of Applied Physics.
7 years 20aX5 "GaAs growth on porous Si" NT
T ECL Y. Ohmachi, Y .; Watanab
e, Y. Kadota, And H .; In Okamoto, MOCVD, M
The crystal growth was performed by the BE method, and it was reported that there was a difference in surface properties and half width between the offset substrate and the just substrate.

MB on porous silicon of 10 μm thickness
It is also known that when GaAs is crystal-grown by the E method and cross-sectional TEM observation is performed, it has more defects than GaAs crystals grown on a Si substrate under the same conditions.

As described above, some attempts have been reported to improve the crystallinity by using porous silicon.
Although the lattice strain of the compound semiconductor layer grown by heteroepitaxial growth may be reduced, the crystallinity of the compound semiconductor is poor, and it has been very difficult to apply the compound semiconductor to a device.

Further, S having a (100) plane as a principal plane
In heteroepitaxial growth on an i-substrate, the surface of the grown film is generally rough. To solve this (1
It was necessary to use a so-called offset substrate that was tilted several degrees from the (00) plane. PA in FIG. 3 shows the off-angle dependence of the surface roughness (mean square roughness). To obtain good surface morphology, the off-angle must be precisely controlled. Such precision control tends to increase the substrate cost in combination with the yield.

On the other hand, in the case of homoepitaxial growth on porous Si, the present inventors have found that in silicon homoepitaxial growth by a thermal CVD method using a hydrogen-diluted source gas, surface pores are pre-baked immediately before the source gas is supplied. Was found to improve the crystallinity when clogged. (N. Sato, K. Sakaguchi, KY)
amagata, Y .; Fujiyama, and T,
Yonehara, J.M. Electrochem. So
c. 142 (1995) p. 3116) FIG. 2 is a schematic cross-sectional view for explaining a process of the prior art. In FIG. 2, reference numeral 20 denotes a porous layer, 21 denotes a wall of the porous layer, 22 denotes a porous hole, and 24 denotes a compound. The semiconductor single crystal film 25 is a crystal defect.

First, a porous Si substrate 20 is prepared.
(FIG. 2A) Next, the porous Si substrate 20 is placed in a reaction chamber of a CVD apparatus, and trimethylgallium (TMGa), arsine (AsH ₃ ) or the like is used as a source gas to form a porous Si substrate. A single crystal 24 of a compound semiconductor such as GaAs is heteroepitaxially grown on 20. (FIG. 2B) In the compound semiconductor single crystal 24 thus obtained, crystal defects 25 such as distortion, lattice mismatch, and grain boundaries are generated on the surface 26 side of the porous Si substrate 20.

According to the present invention, a single-crystal compound semiconductor film having few crystal defects can be formed on a large-area silicon substrate at high cost with high productivity, high uniformity, and high controllability. It is an object to provide a possible semiconductor substrate.

Still another object of the present invention is to provide a method for forming a single-crystal compound semiconductor film having a smooth surface and few crystal defects on a large-area silicon substrate having no particularly defined offset.

Still another object of the present invention is to provide a semiconductor substrate having a semiconductor layer on a porous region of a Si substrate having a porous region, wherein the semiconductor substrate has a single layer on a surface of the porous region having a sealed hole. An object of the present invention is to provide a semiconductor substrate having the semiconductor layer made of a crystalline compound.

Still another object of the present invention is to heat-treat a Si substrate having a porous region in order to seal holes on the surface of the porous region, and to remove the holes sealed by the heat treatment. And heteroepitaxially growing a single-crystal compound semiconductor layer on the porous region.

According to the present invention, a compound semiconductor layer having good crystallinity and a smooth surface can be formed over a large area on a Si substrate whose surface off-angle is not particularly defined.

In particular, a substrate having a low off-angle, for example, (10
Even on Si substrates widely available in the market where the off angle is 1 ° or less with respect to 0), compound epitaxial layers having both good crystallinity and a smooth surface are heteroepitaxially grown over a large area. Can be formed.

Further, according to the present invention, it is possible to provide a semiconductor device, a semiconductor substrate, and a method for manufacturing the same, which can solve the problems of the prior art. That is, a high-quality compound semiconductor substrate can be manufactured using an inexpensive Si substrate, and an inexpensive compound semiconductor device having good characteristics can be manufactured using this substrate.

In the present invention, before the single-crystal compound semiconductor layer is heteroepitaxially grown on the porous Si, the single-crystal compound semiconductor layer whose crystallinity has been improved by performing a heat treatment in hydrogen in advance is formed on the Si substrate. Can be formed.

Further, according to the present invention, in obtaining a compound semiconductor layer having good crystallinity on a Si substrate, productivity, uniformity,
Excellent controllability and economy.

Further, according to the present invention, it is possible to realize the advantages of the conventional compound semiconductor device and propose a method of manufacturing a semiconductor substrate which can be applied.

Further, according to the present invention, the pores on the surface of the porous silicon formed by processing an Si substrate originally having good crystallinity are formed while supplying a small amount of Si to the pores on the surface of the porous Si layer. By heat treatment and sealing, a high-quality compound semiconductor single crystal layer is formed.It is possible to process a large number of wafers at once, and to improve the crystallinity without deteriorating the productivity and economic efficiency. It can be improved to the level of a compound semiconductor single crystal substrate or more.

Further, according to the present invention, the pores on the surface of the porous silicon formed by processing an Si substrate having good crystallinity are heat-treated while supplying a small amount of Si, thereby sealing. A high-quality compound semiconductor single crystal layer is formed over a large area without introducing defects due to lattice mismatch into the compound semiconductor single crystal layer. Light-emitting elements such as solar cells, lasers, and light-emitting diodes, and transistors such as HEMTs can be formed with the same characteristics as when formed, and they are excellent in terms of productivity, uniformity, controllability, and economy. Can be.

[0032]

FIG. 1 is a schematic sectional view showing a method for manufacturing a semiconductor substrate according to a preferred embodiment of the present invention.

In FIG. 1, reference numeral 10 denotes a Si substrate having a porous region, which includes a hole 12 in the porous region and a wall portion 11 forming the hole 12. Here, the hole 12 is drawn in a simple shape for easy understanding, but the hole 12 actually has a complicated shape like a branched communication hole in many cases.

As shown in FIG. 1A, first, an Si substrate 10 having a porous region is prepared. Such an Si substrate 10 can be made porous by subjecting a publicly available silicon wafer (non-porous Si substrate) to anodization treatment, thereby making the entire wafer or only the surface portion of the wafer porous.

Next, the Si substrate having the porous region is heat-treated in a hydrogen atmosphere.

By the heat treatment in hydrogen, the natural oxide film unintentionally formed on the surface of the substrate is removed. The natural oxide film is removed by the following reaction in high-temperature hydrogen.

SiO ₂ + Si → 2SiO ↑ When the heat treatment in hydrogen is further continued, the surface of the porous silicon is subjected to migration of surface atoms in order to smooth the minute roughness and reduce the surface energy.
ion) occurs. As a result, the holes on the surface are closed, and the surface portion 13 in which the hole density is significantly reduced is formed.

The surface portion 13 can be regarded as an extremely thin non-porous Si layer as shown in FIG.
This Si layer is sufficiently thinner than a compound semiconductor layer to be formed later.

Next, as shown in FIG. 1C, a compound semiconductor single crystal 14 is heteroepitaxially grown on a Si substrate having a porous region in which holes on the surface are sealed.

As described above, if the compound semiconductor single crystal film 14 is formed, the crystal introduced due to the lattice mismatch with Si, the temperature drop from the film formation temperature to room temperature, and the difference in the thermal expansion coefficient, etc. The defect 15 is introduced only into the ultra-thin Si layer 13 that seals the pores of the porous Si, and is not introduced into the compound semiconductor single crystal film 14. This is because an extremely thin Si layer formed on a porous region that is more fragile than bulk Si is much more fragile than a compound semiconductor single crystal film. Therefore, the defect 15 is preferentially introduced into the Si layer 13.

As a result, the defects 15 are preferentially introduced into the Si layer 13, so that a compound semiconductor single crystal 14 with few defects can be obtained even when heteroepitaxial growth is performed.

In the above-described sealing process of the hole 12, S
Although the heat treatment is performed in a hydrogen atmosphere in which a gas containing i atoms does not exist, the heat treatment may be performed in a hydrogen atmosphere to which a small amount of a gas containing Si atoms is added.

Specifically, only hydrogen gas, a mixed gas of hydrogen and an inert gas, a mixed gas of hydrogen and a silicon compound,
This is an atmosphere such as a mixed gas of hydrogen, an inert gas, and a silicon compound.

If any residual oxygen or moisture is undesirably present in the heat treatment atmosphere, these react with silicon to form silicon oxide, and the reaction proceeds according to the above reaction formula. As a result, the pore size, heat treatment temperature In some cases, silicon is etched and pores on the porous surface are not sealed.

Therefore, in the present invention, the porous holes are sealed by compensating for the silicon lost by the etching or by performing a heat treatment while supplying the silicon in a slightly excessive amount. In this heat treatment, of the Si atoms supplied from the atmosphere gas as well as the Si atoms on the porous surface,
As a result of the migration of the Si atoms adsorbed on the porous Si surface to lower the surface energy, pores on the surface are closed, and a surface with significantly reduced pore density is formed.

Hereinafter, each step which can be adopted in the method of manufacturing a semiconductor substrate of the present invention will be described in more detail.

[Porous Si] The porous silicon is 196
Since Uhlir et al.'S discovery in 4 years, research in the 1970s with an eye on application to the FIPOS method has been
In the 990's, porous silicon Photoluminin
esence is L. T. The group of Canham et al.
And U.S. Since its discovery by the group of Gosele et al., Researches have been made for application to this light emitting device. The study of the light emitting device based n ^-, p ^- silicon substrate are preferred. On the other hand, when a non-porous single crystal is epitaxially grown on porous Si, n ⁺ and p ⁺ substrates are preferred over n ⁻ and p ⁻ because of the stability of the structure and the good crystallinity of the epitaxial silicon layer. The porous Si targeted in the present invention is essentially the same as these conventionally studied porous silicon, and is produced by a method such as anodization. It is not limited to the impurity, the position, the method of production, and the like.

The pore density of the porous surface will vary with the impurity concentration of the manufacturing method and the substrate, for example 10 ¹⁰ 10 ¹²
/ Cm ² .

When porous silicon is formed by anodization, the chemical conversion solution is an aqueous solution containing HF as a main component.
In general, the addition of alcohol such as ethanol increases the contact angle on the silicon surface, thereby accelerating the desorption of the attached air bubbles, so that chemical formation occurs uniformly. Of course, the porosity is formed without adding alcohol. The porosity (p) of the porous silicon in the present invention
It is preferable that the (ority) is lower than that used in the FIPOS method (approximately 50% or less, more preferably 30% or less), but it is not limited thereto.

Since the porous silicon is formed by the electrolytic etching action in the anodization, the surface thereof is slightly roughened even in a portion other than the holes, and the surface is formed in a field emission field.
session type scanning electr
Observed by Microscope (FESEM).

[Pre-oxidation] Since the thickness of the wall between adjacent holes of the porous silicon is as very small as several nm to several tens nm,
At the time of epitaxial growth, thermal oxidation of the surface of the epitaxial growth layer, or other heat treatment in a later step, rearrangement of the pores inside the porous layer may occur, and the porous enhanced etching characteristics may be impaired. Therefore, a thin protective film may be previously formed on the wall surface of the hole wall by a method such as thermal oxidation after the formation of the porous material and before the epitaxial growth. Thereby, the coarsening of the holes is suppressed. When forming the protective film, particularly in the case of oxidation, it is essential to leave a single crystal silicon region inside the hole wall. Therefore, the thickness of the protective film is at most about several nm.

This step can be omitted if the heat treatment temperature is sufficiently lowered and the change in the porous structure is suppressed.

[HF Soaking] A protective film such as a silicon oxide film is formed on the surface of the porous silicon and the inner wall surface of the porous hole due to the preliminary oxidation or by natural oxidation after the formation of the porous material. Because of this, low concentration H
By immersing in the F aqueous solution, the protective film is removed only near the surface of the porous region. According to this method, since the oxide film on the pore wall at the back of the porous body is not removed, even if the subsequent heat treatment is performed at a high temperature, the coarsening of the pores inside the porous body is sufficiently suppressed.

[Heat Treatment] In the present invention, the porous Si region is subjected to a heat treatment in order to seal the pores on the surface of the porous Si region.

The heat treatment for sealing the pores on the surface of the porous Si layer is carried out in an atmosphere free of a gas containing Si atoms or in an atmosphere containing S atoms.
The treatment is preferably performed in an atmosphere containing a gas containing i atoms.

The heat treatment temperature in hydrogen containing no gas containing Si atoms is 600 ° C. or more and 1400 ° C. or less, preferably 900 ° C. or more and 1200 ° C. or less. The pressure is not particularly limited, but is preferably equal to or lower than the atmospheric pressure. The hydrogen gas used has a dew point of −92 ° C. or lower. Hydrogen gas having a high dew point has a large amount of residual oxygen and moisture, which oxidize silicon, and the formed silicon oxide is removed by a reaction.

As a result, silicon is excessively etched, and in this case, the amount of Si atoms necessary for sealing the holes is insufficient, and the amount of decrease in the hole density is reduced. Careful attention must be paid to chamber leaks so that the dew point does not rise.

The heat treatment atmosphere used in the present invention may be a mixed atmosphere of not only hydrogen but also an inert gas such as a rare gas (eg, argon or helium). Since the residual water in the gas, oxygen, etc. affect the same,
Also in this case, a mixed gas having a dew point of -92 ° C or less is used. In the mixed gas, the hydrogen concentration is reduced, so that the safety in the event of a leak can be improved.

The migration of the surface Si atoms seals the pores on the surface of the porous region. The thickness of the Si layer required for sealing the surface holes is extremely thin, approximately equal to or less than the diameter of the holes, specifically 100 nm or less, more preferably 30 nm or less. On the surface in which the holes are sealed, 0.5 to 50 μm period, more preferably 1 to 50 μm
The surface has smooth irregularities (undulations) having a period of 9 μm, typically several μm, and an amplitude of about 1 to 10 nm. Observation of this surface with an atomic force microscope confirms that atomic steps along irregularities are formed.
These irregularities (undulations) have a pressure dependency, and the pressure of the heat treatment atmosphere is preferably at most atmospheric pressure,
By setting the pressure to 00 Torr or less and 0.001 Torr or more, the amplitude of the undulations increases. As a result, the surface morphology of the compound semiconductor film formed thereon by heteroepitaxial growth is smoother and does not depend on the off-angle as shown in FIG. It is considered that this is because even if the off-angle is small, the step density becomes high similarly to the off-substrate due to the generation of gentle irregularities (undulations).

Further, in order to avoid undesired nitridation and oxidation of the silicon surface, the temperature is increased before and after the steady-state heat treatment step.
When the temperature is lowered, at least 800 ° C. or more, more preferably 6 ° C.
At a temperature of 00 ° C. or higher, it is desirable that the atmosphere be replaced with hydrogen.

Next, a small amount of Si atom-containing gas is supplied in the heat treatment used in the present invention, so that a small amount of Si atom-containing gas is supplied.
The step of heat-treating porous Si in an atmosphere containing an atom-containing gas will be described.

The atmosphere during the heat treatment is preferably a non-oxidizing atmosphere, more preferably an atmosphere composed of hydrogen or hydrogen and an inert gas. Alternatively, it may be in a vacuum. When heat treatment is performed in these atmospheres, pores on the surface of the porous Si are sealed. However, if residual oxygen or moisture is present in the atmosphere, silicon reacts with these to form silicon oxide, and as a result of the further reaction, silicon is etched and pores on the porous surface are not sealed. There is.

Therefore, in the present invention, the porous holes are sealed by compensating for the silicon lost by the etching or by performing the heat treatment while supplying the silicon in a slightly excessive amount. In this heat treatment, in order to smooth the minute roughness on the surface of the porous silicon and reduce the surface energy, Si atoms on the porous surface and S supplied from the gas phase are used.
Among the i atoms, the Si atoms adsorbed on the porous Si surface migrate to lower the surface energy,
The pores on the surface are plugged, forming a surface with significantly reduced pore density. Migration of Si atoms on the surface is performed by the supplied thermal energy.

In the present invention, the temperature of the heat treatment is desirably a relatively high temperature equal to or lower than the melting point of Si in order to particularly efficiently migrate the surface Si atoms. Specifically, 600 ° C. or higher and 1400 ° C. or lower, more preferably 800 ° C.
The temperature is desirably in the range of not lower than 1200 ° C and not lower than 1000 ° C. The pressure is not particularly limited, but is preferably equal to or lower than the atmospheric pressure. In particular, the surface tends to be smooth in an atmosphere containing hydrogen.

After the heat treatment, when the cross-sectional structure is observed, the porous structure remains, only the pores on the surface are sealed, and a very thin Si thin film of 1 to 100 nm is formed on the surface.

The surface in which the porous holes are sealed is
The surface has undulations (smooth irregularities) having a period of 0.5 to 50 μm, more preferably a period of 1 to 9 μm, typically several μm, and an amplitude of about 1 to 10 nm. Observation of this surface with an atomic force microscope confirms that atomic steps are formed along the irregularities. These undulations (smooth irregularities) have a pressure dependency, and the amplitude of the undulations is increased by setting the pressure during the heat treatment in hydrogen to preferably atmospheric pressure or less, more preferably 200 Torr or less.

As a result, the surface morphology of the compound semiconductor film formed thereon becomes smoother irrespective of the off angle as compared with CE on a bulk without an off angle as shown in FIG. It is considered that this is because when the off-angle is small, the undulation occurs and the step density becomes high similarly to the off-substrate.

When an excessive amount of Si is supplied from the gas phase in comparison with silicon lost from the porous region by etching, an extremely thin film of Si is formed along with the sealing of the hole. When the thickness of the ultra-thin film increases, defects are introduced into the compound semiconductor layer when the compound semiconductor single crystal layer is formed, which is not suitable for the purpose of the present invention. It is desirable that the thickness of the ultra-thin film is smaller than the thickness of the compound semiconductor layer, for example, one fifth or less, more preferably one tenth or less.

Specifically, the thickness may be selected from the range of 1 nm to 100 nm in consideration of the thickness of the compound semiconductor layer.

The formation rate of the Si ultra-thin film is determined by using SiH ₂ Cl ₂ , SiH ₄ , SiCl
₃ , when using a silicon source gas such as SiCl ₄ , 20 nm / min or less, more preferably 10 nm / min.
min, more preferably, the flow rate of the source gas is set so that the growth rate is 2 nm / min or less. MBE
Si is supplied from a solid source as in the method, and the substrate temperature is 8
In the case of a film formation method as low as 00 ° C. or less, the growth rate is 0.1
It is desirably at most nm / min.

[Heteroepitaxial growth of compound semiconductor single crystal] A compound semiconductor single crystal is formed by MOCVD or MBE on a silicon substrate having a porous silicon layer in which holes on the surface are sealed. In ordinary heteroepitaxial growth on a single-crystal silicon wafer, prior to growth, one hour in ultra-high vacuum to remove a natural oxide film on the silicon surface.
Although heating is performed to about 200 ° C., the heat treatment temperature is preferably sufficiently lower than 1200 ° C. in the present invention because porous silicon that is easily thermally degraded is used.

The natural oxide film removal temperature is set in advance to HF
For example, the natural oxide film is removed by immersion in a heat treatment vessel, and the temperature is lowered by heat treatment using H ₂ gas having a low dew point.

If the substrate is placed in a highly clean hydrogen atmosphere after immersion in HF in advance, the natural oxide film is naturally removed even at a low temperature of about 800 ° C., and thereafter epitaxial growth proceeds.

Alternatively, if the Si substrate is placed in a chamber for growing a compound semiconductor single crystal without exposing the Si substrate to the atmosphere after the above-described heat treatment, formation of a natural oxide film is significantly suppressed. Heat treatment for removing the film becomes unnecessary. Desirably, the heat treatment in hydrogen and the compound semiconductor single crystal growth are performed in the same chamber. More desirably, the temperature of the substrate must not be lower than the lower one of the two processes between the heat treatment in hydrogen and the growth of the compound semiconductor single crystal.

When a compound semiconductor single crystal film is formed as described above, crystal defects introduced due to lattice mismatch with Si, a difference in the coefficient of thermal expansion from the temperature drop from the film formation temperature to room temperature, and the like are reduced. The compound semiconductor single crystal film 14 introduced only into the porous region and the ultra-thin Si layer sealing the pores of the porous Si.
Will not be introduced. This is because an ultra-thin Si layer formed on a porous region that is fragile compared to bulk Si, which is porous, is much more fragile than a compound semiconductor single crystal film, and is likely to introduce defects.

In order to obtain the above characteristics, it is desirable that the thickness of the compound semiconductor single crystal film to be heteroepitaxially grown is large. Preferably it is at least 50 nm or more, more preferably 200 nm or more.

The compound semiconductor referred to here is a III-V compound (GaAs, GaP, InP, GaInAs, etc.) and a II-VI compound (ZnTe, ZnSe, ZnS, C
Representative examples include dTe, HgTe, CdHgTe) and IV-IV compounds (SiGe, SiC, etc.), but are not necessarily limited thereto.

[Production of Device] The compound semiconductor single crystal film formed by the above-described method can be used as a light emitting element such as a light emitting diode or a semiconductor laser, or a HEM.
When used for the production of high-speed electronic devices such as T-transistors, the characteristics are as follows: when using a compound semiconductor substrate itself, when homoepitaxially grown on a compound semiconductor single crystal substrate, or when heteroepitaxial growth with extremely small lattice distortion is performed. Equal or better characteristics can be obtained.

[0079]

Embodiments of the present invention will be described below.

Example 1 Four p-type (or n-type) 6-inch diameter (100) single-crystal Si substrates having a thickness of 615 μm and a specific resistance of 0.01 Ω · cm were subjected to H
By anodizing F in a solution diluted with alcohol, a porous Si layer was formed on one of the mirror-finished main surfaces.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. Due to this oxidation, the inner wall surface of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the two substrates were heated at a dew point of minus 95 ° C.
In a H ₂ atmosphere at 1050 ° C. and 760 Torr for 10 minutes. The remaining two substrates have a dew point of minus 90 ° C
1 at 1050 ° C and 760 Torr in the following H ₂ atmosphere
Heat treated for 0 minutes. The atmosphere was a hydrogen atmosphere during the temperature rise and fall.

In this state, when one substrate was taken out and the surface roughness was measured with an atomic force microscope, undulation with an amplitude of 3 nm was observed at a period of about 2 μm. The remaining substrate not used for this observation was put into the next step.

Next, the MOCVD (M
etal Organic Chemical Vap
or Deposition) single-crystal GaAs
Was epitaxially grown to a thickness of 1 μm. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of observation of a cross section by a transmission electron microscope, Ga having no crystal defects introduced into the GaAs layer and having good crystallinity was obtained.
It was confirmed that an As layer was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the GaAs layer and the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. Dew point -9
The surface roughness of the surface on which the compound semiconductor layer was formed on the substrate heat-treated with hydrogen at 5 ° C. was 0.3 in terms of mean square roughness (Rrms).
nm, which is much smoother than the surface roughness of 3.5 nm (when the off angle is 0 degree) when a GaAs layer is directly formed on a silicon substrate without forming porous silicon. It was better than 0.42 nm when the angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted and the defect density was determined. The result was about 1 × 10 ⁴ / cm ² .

On the other hand, when heat treatment was performed with hydrogen having a dew point of -90 ° C., the surface roughness was 0.9 nm, and the defect density was about 1 nm.
× 10 ⁵ / cm ² .

(Example 2) A p-type (also n-type) 5-inch diameter (100) single-crystal Si having a thickness of 625 μm and a resistance of 0.01 Ω · cm and a 5-inch diameter and an off angle of 0 °.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 20 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of the porous Si was set to minus 9
Heat treatment was performed at 1050 ° C. and 80 Torr for 10 minutes in an H ₂ atmosphere of 2 ° C. or less.

In this state, when the substrate was taken out and the surface roughness was measured with an atomic force microscope, undulations with a period of about 4 μm and an amplitude of 4 nm were observed. The substrate not used for this observation was put into the next step.

Next, single crystal GaAs was epitaxially grown on the porous Si to a thickness of 1 μm by MOCVD. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of observation of a cross section by a transmission electron microscope, a crystal having no crystal defects introduced into the GaAs layer and having good crystallinity was obtained.
It was confirmed that an As layer was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the porous Si layer whose surface was sealed with Si and the GaAs layer. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. Surface roughness: Mean square roughness (Rrms) is 0.4 nm, GaAs is directly formed on a silicon substrate without forming porous silicon.
It was much smoother than the surface roughness when the s layer was formed, ie, 3.5 nm (when the off angle was 0 degree), and was almost equal to 0.42 nm when the off angle was 4 degrees. .

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted to determine the defect density, which was about 1 × 10 ⁴ / cm ² .

Example 3 (100) single-crystal Si having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm and a p-type (or n-type) having a diameter of 5 inches and an off-angle of 0 °.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 20 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of the porous Si was set to minus 9
Heat treatment was performed at 1050 ° C. and 80 Torr for 10 minutes in an H ₂ atmosphere of 2 ° C. or less, the temperature was lowered to 700 ° C., and single-crystal GaAs was epitaxially grown to a thickness of 1 μm on the porous Si by MOCVD. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of observation of a cross section by a transmission electron microscope, a crystal having no crystal defects introduced into the GaAs layer and having good crystallinity was obtained.
It was confirmed that an As layer was formed.

At the same time, it was also confirmed that an extremely steep interface was formed between the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope.
Surface roughness: Mean square roughness (Rrms) is 0.4 nm, which is 3.5 n which is the surface roughness when a GaAs layer is formed directly on a silicon substrate without forming porous silicon.
m (when the off angle is 0 degree), it is much smoother,
This was almost equal to 0.42 nm when the off angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted, and the defect density was determined. The result was about 5 × 10 ³ / cm ² .

(Example 4) A p-type (or n-type) 5-inch diameter (100) single-crystal Si with a thickness of 625 μm and a 5-inch diameter and an off angle of 0 ° is used.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 20 seconds to remove the porous surface and the ultra-thin oxide film formed on the surface of the inner wall of the hole near the porous surface, and then rinsed with pure water. And spin dried.

Next, the dew point of this porous Si was set to minus 9
Heat treatment is performed at 1050 ° C. and 80 Torr for 10 minutes in an H ₂ atmosphere of 2 ° C. or less, the temperature is lowered to 700 ° C., and MBE (Molecular Beam) is placed on the porous Si.
m epitaxy) method to form single-crystal AlGaAs
It was epitaxially grown to a thickness of μm.

As a result of observing the cross section with a transmission electron microscope, A
No crystal defects were introduced into the lGaAs layer, and it was confirmed that a GaAs layer having good crystallinity was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the GaAs layer and the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. The surface roughness is a mean square roughness (Rrms) of 0.41 nm, which is 3.7 nm (off-angle of 0 degree) which is a surface roughness when an AlGaAs layer is formed directly on a silicon substrate without forming porous silicon. Case), which is much smoother and 0.42 when the off angle is 4 degrees.
nm.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted and the defect density was determined. The result was about 1 × 10 ⁴ / cm ² .

(Example 5) A p-type (or n-type) 5-inch diameter (100) single-crystal Si having a thickness of 625 µm and a 5-inch diameter and an off angle of 0 degree is used.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, this substrate was immersed in a 1.25% HF solution for 20 seconds to remove the porous surface and the ultrathin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of the porous Si was set to minus 9
1150 ° C, 760 Torr in H ₂ atmosphere of 2 ° C or less
Then, a single-crystal GaP was epitaxially grown to a thickness of 1 μm on the porous Si by a liquid phase growth method.

As a result of observation of a cross section by a transmission electron microscope, G
No crystal defects were introduced into the aP layer, and it was confirmed that a GaP layer having good crystallinity was formed. At the same time, a porous Si layer whose surface is sealed with Si and GaP
It was also confirmed that a very clear and smooth interface was formed between the layers. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope.
Surface roughness Mean square roughness (Rrms) is 0.4 nm, which is 3.5 n which is the surface roughness when a GaAs layer is formed directly on a silicon substrate without forming porous silicon.
m (when the off angle is 0 degree), it is much smoother,
This was almost equal to 0.42 nm when the off angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted, and the defect density was determined. The result was about 1 × 10 ⁴ / cm ² .

Example 6 FIG. 4 is a schematic sectional view of a solar cell as a photovoltaic device according to the present invention. In FIG. 4, reference numeral 41 denotes a Si substrate, 42 denotes a porous layer, and 43 denotes a porous layer. An Si layer which is a sealing portion of the hole, and 44 is p ^- type GaAs
Layer 45, p ⁺ -type InGaP layer; 46, p-type GaAs
s layer, 47 is an n ⁺ -type GaAs layer, and 48 is an n ⁺ -type In
A GaP layer, 49 is an n ⁺ -type AlInP layer, 410 is an antireflection film, and 411 and 412 are electrodes. Hereinafter, the manufacturing process of the device of this example will be described.

Specific resistance 0.01 having a thickness of 625 μm
A porous Si layer was formed on one main surface of the mirror surface by anodizing a 5 inch diameter (100) single crystal Si substrate of Ω · cm in a solution of HF diluted with alcohol. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. Due to this oxidation, the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, this substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of this porous Si was set to minus 9
1100 ° C, 760 Torr in H ₂ atmosphere of 2 ° C or less
Then, a single-crystal GaAs was epitaxially grown on the porous Si to a thickness of 5 μm by a liquid phase growth method.

Further, p ⁺ type InGaP, p type GaAs,
n ⁺ -type GaAs, n ⁺ -type InGaP, n ⁺ -type AlInP
And a first electrode and an anti-reflection film were formed on the surface of the AlInP layer 49, and a second electrode was formed on the back surface of the Si substrate 41 to form a solar cell.

When the Fill Factor of this solar cell was measured, it was 0.831 when the same structure was formed on a single-crystal Si substrate on which no porous Si was formed.
Although i was formed, when the sealing treatment of the pores on the porous surface was not performed, the improvement was 0.807, which was 0.870 in the case of the present invention.

Example 7 FIG. 5 is a schematic sectional view of an LED as a light emitting device according to the present invention.
51 is a Si substrate, 52 is a porous layer, 53 is a Si layer which is a sealing portion of a porous hole, 54 is an n ^- type GaAlAs,
5 is p ^- type GaAlAs, 56 is p ^- type GaAlA
s and 57 are electrodes. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. Due to this oxidation, the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of this porous Si was set to minus 9
1100 ° C, 760 Torr in H ₂ atmosphere of 2 ° C or less
For 10 minutes, and then, a single-crystal n ⁻ -type GaAs layer is formed on the sealed porous Si by liquid phase epitaxy.
It was epitaxially grown to a thickness of μm.

Further, n ^- type GaAlAs and p ^- type GaAs
1As are stacked, first and second electrodes are formed on the front surface of the GaAlAs layer 56 and the back surface of the Si substrate 51, and a light emitting diode is formed as shown in FIG. 5, which is equivalent to that formed on the GaAs substrate. Red light emission at the intensity of was observed.

(Embodiment 8) FIG. 6 is a schematic sectional view of a semiconductor laser as a light emitting device according to the present invention. In FIG. 6, reference numeral 61 denotes a Si substrate, 62 denotes a porous layer, and 63 denotes a porous hole. An Si layer serving as a sealing portion, and 64 is n ⁻ -type GaAs
s, 65 are p ^- type GaAs, 66 is n ^- type ZnSe
Buffer layer, 67 is n ⁻ -type ZnMgSSe, 68 is Z
nSSe / ZnCdSe, 69 is p ^- type ZnMgSS
e and 610 are p ⁻ -type ZnSe, and 611 is p ⁻ -type ZnSe
Se / ZnTe, 612 is p ^- type ZnTe, and 613 is an electrode. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of this porous Si was set to minus 9
Sealing is performed by heat treatment at 1000 ° C. and 10 Torr for 10 minutes in an H ₂ atmosphere of 2 ° C. or less, and then a single-crystal n ⁻ -type GaAs is formed on the porous Si by MBE.
Was epitaxially grown to a thickness of 5 μm.

[0130] Further p ^- type GaAs, n ^- After lamination type ZnSe, n ^- after removing by patterning the type ZnSe layer on 10μm stripe, further n ^- type Z
nMgSSe, ZnSSe / ZnCdSe, p ^- type Zn
MgSSe, p ^- type ZnSe, p ^- type ZnSe / ZnT
e, p ^- type ZnTe was formed. An / Pt /
When a first electrode of Pd and a second electrode of In were formed on the back surface and a pulse voltage was applied, oscillation occurred at room temperature in the same manner as when the device structure was formed on a GaAs substrate. The threshold current densities were all 210 A / cm ² .

(Embodiment 9) FIG. 7 is a schematic sectional view of a HEMT as a transistor according to the present invention. In FIG. 7, reference numeral 71 denotes an Si substrate, 72 denotes a porous layer, and 73 denotes sealing of a porous hole. Part, a Si layer, 74 is a single crystal GaAs layer,
75 is undoped GaAs, 76 is n-type AlGaAs
s and 77 are n-type GaAs, 78 is an AuGe source electrode, 79 is an Al gate electrode, and 710 is an AuGe drain. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, the dew point of this porous Si was set to minus 9
1000 ° C. in H ₂ atmosphere of 2 ° C. or less, 1 at 1 Torr
Heat treatment was performed for 0 minutes, and then single-crystal GaAs was epitaxially grown on the porous Si to a thickness of 5 μm by MBE.

Further, a non-doped GaAs layer, an n-type A
lGaAs and n-type GaAs were formed. A gate, a source, and a drain are formed thereon, and HEMT (high) is formed.
electron mobility transmission
tor), the device operated at a high speed in the same manner as when the device was formed on a GaAs substrate.

Example 10 Two out of three p-type (or n-type) 6-inch diameter (100) single-crystal Si substrates having a thickness of 615 μm and a specific resistance of 0.01 Ω · cm were used. By anodizing the sheet in a solution obtained by diluting HF with alcohol, porous S
An i-layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, one of the substrates was treated with H ₂ at 230.
1 minute at 1050 ° C and 760 Torr
Heat treatment for 5 minutes, and further added 50 sccm of SiH ₄ and heat-treated for 5 minutes.

Next, these three sheets were pre-processed (10
0) Single crystal GaAs was epitaxially grown on the Si substrate to a thickness of 1 μm by MOCVD. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of cross-sectional observation with a transmission electron microscope, crystal defects were introduced into a GaAs layer formed on porous Si heat-treated by adding SiH _4. Not having good crystallinity
It was confirmed that an As layer was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the GaAs layer and the porous Si layer whose surface was sealed with Si. On the other hand, in the case of a substrate on which a GaAs layer is formed without performing a heat treatment in which SiH ₄ is added although a porous material is formed,
Observation of the cross section with an electron microscope confirmed that the interface between the porous Si and the GaAs layer was disturbed with a height difference of about 100 nm. On the other hand, when the GaAs layer was formed without forming the porous structure, it was confirmed that twin defects, stacking faults, and dislocations were introduced innumerably from the Si / GaAs interface into the GaAs layer.

Further, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. The surface roughness of the surface where the compound semiconductor layer was formed on the substrate heat-treated with hydrogen having a dew point of -95 ° C. was 0.3 nm in terms of mean square roughness (Rrms), and porous silicon was not formed and the GaAs layer was directly formed on the silicon substrate. 3.5 nm which is the surface roughness when
Compared with (when the off-angle was 0 degree), it was much smoother and better than 0.42 nm when the off-angle was 4 degrees.

Further, the crystal defects revealed by an optical microscope by the defect revealing etching were counted to determine the defect density, which was about 1 × 10 ⁴ / cm ² .

On the other hand, when no porous material is formed, the density of defects is low.
The degree is about 1 × 10⁶ / Cm^Two And high, forming a porous
Even SiH_Four 1 × 10 if no additional heat treatment^Five /
cm ^Two It was about.

(Example 11) A p-type (or n-type) 5-inch diameter (100) single-crystal Si having a thickness of 625 µm and a 5-inch diameter and an off angle of 0 degree is used.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 20 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, this porous Si was placed in an H ₂ atmosphere for 1 hour.
Heat treatment was performed at 050 ° C. and 80 Torr for 10 minutes while adding 20 sccm of SiH ₄ .

In this state, the substrate was taken out and the surface roughness was measured with an atomic force microscope. As a result, undulations with a period of about 4 μm and an amplitude of 4 nm were observed. The substrate not used for this observation was put into the next step.

Next, single crystal GaAs was epitaxially grown on the porous Si by MOCVD to a thickness of 1 μm. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of observation of a cross section by a transmission electron microscope, a crystal having no crystal defects introduced into the GaAs layer and having good crystallinity was obtained.
It was confirmed that an As layer was formed. At the same time, it was also confirmed that an extremely steep interface was formed between the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. Surface roughness Mean square roughness (Rrms) is 0.4 nm, and 3.5 nm (off-angle of 0 degree) which is a surface roughness when a GaAs layer is formed directly on a silicon substrate without forming porous silicon. In this case, it was much smoother than in the case (2), and was almost equal to 0.42 nm when the off-angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted, and the defect density was determined. The result was about 5 × 10 ³ / cm ² .

Example 12 (100) Single-crystal Si having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm and a p-type (or n-type) having a diameter of 5 inches and an off angle of 0 °.
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the porous Si was heat-treated in an H ₂ atmosphere at a dew point of 1050 ° C. and 80 Torr for 5 minutes, followed by adding 20 sccm of SiH ₂ Cl ₂ and heat-treating for 5 minutes. The temperature was lowered to 700 ° C., and single-crystal GaAs was epitaxially grown on the porous Si to a thickness of 1 μm by MOCVD. The growth conditions were as follows. Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. As a result of observation of a cross section by a transmission electron microscope, a crystal having no crystal defects introduced into the GaAs layer and having good crystallinity was obtained.
It was confirmed that an As layer was formed.

At the same time, it was also confirmed that an extremely steep interface was formed between the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope.
Surface roughness: Mean square roughness (Rrms) is 0.4 nm, which is 3.5 n which is the surface roughness when a GaAs layer is formed directly on a silicon substrate without forming porous silicon.
m (when the off angle is 0 degree), it is much smoother,
This was almost equal to 0.42 nm when the off angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted to determine the defect density, which was about 5 × 10 ³ / cm ² .

Example 13 (100) Single-crystal Si having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm and a p-type (can also be an n-type) 5-inch diameter and an off-angle of 0 ° 0 °
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was immersed in a 1.25% HF solution for 20 seconds to form a porous surface and a pore inner wall near the porous surface. After peeling off the ultrathin oxide film, it was rinsed with pure water and spin-dried.

Next, this porous Si was placed in an H ₂ atmosphere for 9 hours.
A heat treatment was performed for 10 minutes at 50 ° C. and 20 Torr while adding 30 sccm of SiH ₄ , the temperature was lowered to 700 ° C., the supply gas was changed, and a single-crystal AlGaAs was epitaxially grown to a thickness of 1 μm on the porous Si by MBE.

As a result of observing the cross section with a transmission electron microscope,
No crystal defects were introduced into the lGaAs layer, and it was confirmed that a GaAs layer having good crystallinity was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. 2. Surface roughness: Mean surface roughness (Rrms) of 0.41 nm, which is the surface roughness when an AlGaAs layer is formed directly on a silicon substrate without forming porous silicon.
It was much smoother than 7 nm (when the off angle was 0 degree), and was almost equal to 0.42 nm when the off angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted, and the defect density was determined. The result was about 7 × 10 ³ / cm ² .

(Example 14) A p-type (or n-type) 5-inch diameter (100) single crystal Si having a thickness of 625 μm and a 5-inch diameter and an off angle of 0 °
By anodizing the substrate in a solution of HF diluted with alcohol, a porous Si
A layer was formed.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was immersed in a 1.25% HF solution for 20 seconds to form a porous surface and a pore inner wall near the porous surface. After peeling off the ultrathin oxide film, it was rinsed with pure water and spin-dried.

Next, this porous Si was added with 4% -H ₂ : 96
% -Ar atmosphere at 1100 ° C. and 760 Torr
A heat treatment was performed for 10 minutes while adding 30 sccm of H ₄ , the temperature was directly lowered to 700 ° C., the supply gas was changed, and a single-crystal AlGaAs was deposited on the porous Si by 1 μm by MBE.
m was epitaxially grown.

As a result of observation of a cross section by a transmission electron microscope, A
No crystal defects were introduced into the lGaAs layer, and it was confirmed that a GaAs layer having good crystallinity was formed. At the same time, it was also confirmed that an extremely clear and smooth interface was formed between the GaAs layer and the porous Si layer whose surface was sealed with Si. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope. The surface roughness is a mean square roughness (Rrms) of 0.41 nm, which is 3.7 nm (off-angle of 0 degree) which is a surface roughness when an AlGaAs layer is formed directly on a silicon substrate without forming porous silicon. Case), which is much smoother and 0.42 when the off angle is 4 degrees.
nm.

Further, crystal defects revealed by an optical microscope by defect revealing etching were counted to determine the defect density, which was about 7 × 10 ³ / cm ² .

Example 15 A p-type (or n-type) 5-inch diameter, 5-inch diameter, off-angle, 0 degree (100) single-crystal Si substrate having a thickness of 625 μm and a thickness of 625 μm was prepared. By anodizing HF in a solution obtained by diluting HF with alcohol, a porous Si layer was formed on one main surface, which was a mirror surface.

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, this substrate was oxidized at 300 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the porous Si was deposited at 1150 ° C. in an ultra-high vacuum having a dew point of 1 × 10 ⁻¹⁰ Torr.
Is heat-treated for 10 minutes while supplying a very small amount of, and then a single-crystal GaP is deposited on this porous Si by 1 μm by liquid phase growth.
Epitaxially grown to a thickness of

As a result of observation of a cross section by a transmission electron microscope, G
No crystal defects were introduced into the aP layer, and it was confirmed that a GaP layer having good crystallinity was formed. At the same time, a porous Si layer whose surface is sealed with Si and GaP
It was also confirmed that a very clear and smooth interface was formed between the layers. Furthermore, the surface roughness was determined by measuring an area of 50 μm square with an atomic force microscope.
Surface roughness: Mean square roughness (Rrms) is 0.4 nm, which is 3.5 n which is the surface roughness when a GaAs layer is formed directly on a silicon substrate without forming porous silicon.
m (when the off angle is 0 degree), it is much smoother,
This was almost equal to 0.42 nm when the off angle was 4 degrees.

Further, the number of crystal defects revealed by an optical microscope by the defect revealing etching was counted, and the defect density was determined. The result was about 1 × 10 ⁴ / cm ² .

Embodiment 16 A solar cell as a photovoltaic element according to the present invention has the same configuration as that shown in FIG. 41 is a Si substrate, 42 is a porous layer, 43 is a Si layer which is a sealing portion of a porous hole, 44 is p ^- type GaAs,
5 is p ⁺ type InGaP, 46 is p type GaAs, 47
Is n ⁺ -type GaAs, 48 is n ⁺ -type InGaP, 49
Is n ⁺ type AlInP, 410 is an antireflection film, 411,
412 is an electrode. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
A porous Si layer was formed on one main surface of the mirror surface by anodizing a 5 inch diameter (100) single crystal Si substrate of Ω · cm in a solution of HF diluted with alcohol. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, this substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, this porous Si was placed in an H ₂ atmosphere for 1 hour.
Heat treatment was performed at 100 ° C. and 760 Torr for 1 minute, followed by addition of 20 sccm of SiH ₂ Cl ₂ and heat treatment for 5 minutes.

Thereafter, single-crystal GaAs was epitaxially grown on the porous Si to a thickness of 5 μm by a liquid phase growth method.

Further, p ⁺ -type InGaP, p-type GaAs,
n ⁺ -type GaAs, n ⁺ -type InGaP, n ⁺ -type AlInP
Are laminated, a first electrode and an antireflection film are formed on the surface,
A second electrode was formed on the back surface to form a solar cell.

When the Fill Factor of this solar cell was measured, it was 0.831 when the same structure was formed on a single crystal Si substrate on which no porous Si was formed.
Although i was formed, when the sealing treatment of the pores on the porous surface was not performed, the improvement was 0.807, which was 0.870 in the case of the present invention.

(Embodiment 17) The LED as the light emitting device according to the present invention has the same configuration as that shown in FIG. 5
1 is a Si substrate, 52 is a porous layer, 53 is a sealing portion of a porous hole, 54 is an n ^- type GaAlAs, and 55 is a p ^- type GAlAs.
aAlAs and 56 are p ^- type GaAlAs and 57 is an electrode. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole near the porous surface, and then rinsed with pure water. Spin dried.

Next, this porous Si was placed in an H ₂ atmosphere for 1 hour.
Heat treatment was performed at 100 ° C. and 760 Torr for 1 minute, followed by adding 20 sccm of SiH ₄ and continuing the heat treatment for 6 minutes.

Thereafter, a single-crystal n ⁻ -type GaAs was epitaxially grown on the porous Si to a thickness of 5 μm by a liquid phase growth method.

Further, n ^- type GaAlAs and p ^- type GaAs
1As were stacked, first and second electrodes were formed on the front and back surfaces, and a light emitting diode was formed as shown in FIG.
Red light emission at the same intensity as when formed on a GaAs substrate was confirmed.

(Embodiment 18) A semiconductor laser as a light emitting device according to the present invention is the same as that shown in FIG.
61 is a Si substrate, 62 is a porous layer, 63 is a Si layer as a sealing portion of a porous hole, 64 is n ⁻ -type GaAs, 65
Is p ^- type GaAs, 66 is n ^- type ZnSe buffer layer, 67 is n ^- type ZnMgSSe, 68 is ZnSSe
/ ZnCdSe, 69 is p ⁻ -type ZnMgSSe, 61
0 is p ^- type ZnSe, 611 is p ^- type ZnSe / Z
nTe and 612 are p ^- type ZnTe, and 613 is an electrode. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, this porous Si was placed in an H ₂ atmosphere for 1 hour.
Heat treatment was performed at 100 ° C. and 760 Torr for 1 minute, followed by adding 20 sccm of SiH ₄ and continuing the heat treatment for 6 minutes.

Thereafter, a single-crystal n ⁻ -type GaAs was epitaxially grown on the porous Si to a thickness of 5 μm by MBE.

After stacking p ⁻ -type GaAs and n ⁻ -type ZnSe, the n ⁻ -type ZnSe layer is removed by patterning on a 10 μm stripe, and then n ⁻ -type ZSe.
nMgSSe, ZnSSe / ZnCdSe, p ^- type Zn
MgSSe, p ^- type ZnSe, p ^- type ZnSe / ZnT
e, p ^- type ZnTe was formed. An / Pt /
When a Pd electrode and an In electrode were formed on the back surface and a pulse voltage was applied, oscillation occurred at room temperature as in the case of forming the device structure on the GaAs substrate. The threshold current densities were all 210 A / cm ² .

(Example 19) A HEMT as a transistor according to the present invention is the same as that shown in FIG. 7
1 is a Si substrate, 72 is a porous layer, 73 is a Si layer as a sealing portion of a porous hole, 74 is GaAs, 75 is undoped GaAs, 76 is n-type AlGaAs, 77 is n-type GaAs, 78 is a source, 79 is a gate, and 710 is a drain. Hereinafter, the manufacturing process of this embodiment will be described.

Specific resistance 0.01 having a thickness of 625 μm
An anodized 5-inch (100) single-crystal Si substrate of n-type of Ω · cm in a solution of HF diluted with alcohol to form a porous Si layer on one of the mirror-finished main surfaces. .

The anodizing conditions were as follows. Current density: 7 mA / cm ² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 minutes Thickness of porous Si layer: 10 μm Porosity: 20% Next, the substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the surface of the inner wall of the porous Si hole was covered with an extremely thin thermal oxide film.

Next, the substrate was immersed in a 1.25% HF solution for 30 seconds to remove the porous surface and the ultra-thin oxide film formed on the inner wall of the hole in the vicinity thereof, and then rinsed with pure water. Spin dried.

Next, this porous Si was placed in an H ₂ atmosphere for 1 hour.
Heat treatment was performed at 000 ° C. and 1 Torr for 5 minutes while adding 10 sccm of SiH ₄ , and then M was added on the porous Si.
Single crystal GaAs was epitaxially grown to a thickness of 5 μm by the BE method.

Further, a non-doped GaAs layer, an n-type A
lGaAs and n-type GaAs were formed. When a gate, a source, and a drain were formed thereon, and a HEMT was formed, the device was operated at a high speed in the same manner as when formed on a GaAs substrate.

[0199]

As described in detail above, according to the present invention,
It is possible to provide a semiconductor device, a semiconductor substrate, and a method for manufacturing the same, which can solve the problems of the related art. That is, a high-quality compound semiconductor substrate can be manufactured using an inexpensive Si substrate, and using this substrate,
An inexpensive compound semiconductor device having good characteristics can be manufactured.

In the present invention, when a single-crystal compound semiconductor layer is formed on porous Si, a heat treatment in an atmosphere containing hydrogen is performed in advance to achieve the problem of the prior art. A single crystal compound semiconductor layer with improved properties and surface smoothness can be formed on a Si substrate.

Further, according to the present invention, a smooth surface is obtained without using a single-crystal Si substrate having an off angle required for obtaining a smooth surface, and the crystallinity is good. Can be formed, and particularly, (100) ± 1 widely distributed in the substrate market with a low off-angle.
The restriction of the substrate can be reduced, for example, a Si substrate of about ° can be used.

Further, according to the present invention, in obtaining a compound semiconductor layer having good crystallinity on a Si substrate, productivity, uniformity,
Excellent controllability and economy.

Further, according to the present invention, it is possible to realize the advantages of the conventional compound semiconductor device and propose a method for manufacturing a semiconductor substrate which can be applied.

Further, according to the present invention, a high-quality compound semiconductor single crystal layer can be obtained by sealing the pores on the surface of porous silicon formed by processing a Si substrate having good crystallinity by heat treatment in hydrogen. It is possible to process a large number of sheets at a time, and to improve the crystallinity of a compound semiconductor single crystal substrate or more without deteriorating its productivity and economic efficiency.

According to the present invention, a high-quality compound semiconductor single crystal layer can be enlarged by sealing the pores on the surface of porous silicon formed by processing a Si substrate having good crystallinity by heat treatment in hydrogen. It is formed collectively on the area, and has the same characteristics as those formed on a compound semiconductor substrate on such a compound semiconductor single crystal layer, a photoelectric conversion element such as a solar cell or an optical sensor, or a light emitting element such as a light emitting diode. , HEM
Transistors such as T can be formed, and they are also excellent in terms of productivity, uniformity, controllability, and economy.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view for explaining a process of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a process of the related art.

FIG. 3 is a graph showing a relationship between an off-angle of a substrate and surface roughness.

FIG. 4 is a sectional view of a solar cell as a photoelectric conversion element according to the present invention.

FIG. 5 is a sectional view of an LED as a light emitting device according to the present invention.

FIG. 6 is a sectional view of a semiconductor laser as a light emitting device according to the present invention.

FIG. 7 is a cross-sectional view of a HEMT as a transistor according to the present invention.

[Explanation of symbols]

11, 21 Porous 12, 22 Porous hole 13 Porous hole sealing portion (ultra-thin Si film) 14, 24 Compound semiconductor single crystal film 15, 25 Crystal defect 41, 51, 61, 71 Si substrate 42 , 52, 62, 72 Porous 43, 53, 63, 73 Porous pore sealing portion (ultra-thin Si film) 44 p ⁻ -type GaAs 45 p ⁺ -type InGaP 46 p-type GaAs 47 n ⁺ -type GaAs 48 n ⁺ Type InGaP 49 n ⁺ type AlInP 410 antireflection film 411, 412 electrode 54 n ^- type GaAlAs 55 p ^- type GaAlAs 56 p ⁺ type GaAlAs 57 electrode 64 n ^- type GaAs 65 p ^- type GaAs 66 n ^- type ZnSe buffer layer 67 n ^- type ZnMgSSe 68 ZnSSe / ZnCdSe 69 p ^- type ZnMgSSe 610 p ^- type ZnSe 611 p ^- type ZnSe / ZnT e 612 p ^- type ZnTe 613 electrode 74 GaAs 75 non dope GaAs 76 n ^- type AlGaAs 77 n ^- type GaAs 78 source 79 gate 710 drain

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 29/778 H01L 21/306 L 21/338 29/80 H 29/812 31/04 H 31/04 33/00

Claims (23)

[Claims] 1. A semiconductor substrate having a semiconductor layer on a porous region of a Si substrate having a porous region, wherein the semiconductor substrate comprises a single crystal compound on a surface of the porous region having a sealed hole. A semiconductor substrate having a semiconductor layer. 2. The semiconductor substrate according to claim 1, wherein said surface is made of a very thin Si film thinner than said semiconductor layer. 3. The semiconductor substrate according to claim 1, wherein said Si substrate is made of single-crystal Si, and said porous region is also made of single-crystal Si. 4. The semiconductor substrate according to claim 1, wherein an interface between the porous region and the compound semiconductor layer has a roughness of 1 nm or less. 5. A step of subjecting a Si substrate having a porous region to a heat treatment to seal pores on the surface of the porous region; A step of heteroepitaxially growing a crystalline compound semiconductor layer. 6. A method for sealing pores on the surface of the porous region,
In an atmosphere in which a gas containing Si is substantially absent, the S
6. The method according to claim 5, wherein the i-substrate is heat-treated. 7. The method for manufacturing a semiconductor substrate according to claim 5, further comprising a step of removing a natural oxide film on the surface of the porous region before the heat treatment step. 8. The semiconductor substrate according to claim 5, further comprising, before the heat treatment step, a step of oxidizing an inner wall of the hole of the porous region to the extent that single-crystal Si remains inside. Method of manufacturing. 9. The method for manufacturing a semiconductor substrate according to claim 8, further comprising: before the heat treatment step, a step of removing an oxide film on the surface of the porous region. 10. The method of manufacturing a semiconductor substrate according to claim 5, wherein in the heat treatment step, undulations having a period of 0.5 to 50 μm are introduced into the porous surface. 11. The method for manufacturing a semiconductor substrate according to claim 5, wherein the heat treatment step is a heat treatment in a hydrogen atmosphere having a dew point of −92 ° C. or less. 12. The step of removing an oxide film or a natural oxide film on the surface of the porous layer includes the step of removing Si having the porous region.
The method according to claim 7, wherein the method is performed by immersing the substrate in an HF solution. 13. The plane orientation of the main surface of the Si substrate is (1
The method for manufacturing a semiconductor substrate according to claim 5, wherein the method is (00). 14. The method according to claim 5, wherein the heat treatment is performed in an atmosphere containing a gas containing a small amount of Si. 15. The method for manufacturing a semiconductor substrate according to claim 14, wherein the heat treatment step is performed in an atmosphere composed of hydrogen or hydrogen and an inert gas. 16. The method according to claim 14, wherein the Si substrate having the porous region is heat-treated in a hydrogen atmosphere having a dew point of −92 ° C. or less. 17. In order to remove an oxide film or a natural oxide film on the surface of the porous region, a Si film having the porous region is removed.
The method of manufacturing a semiconductor substrate according to claim 14, wherein the step of immersing the substrate in an HF solution and the step of heat-treating the porous Si substrate in a hydrogen atmosphere having a dew point of -92 ° C or less. 18. An electronic device having an active region formed on the semiconductor substrate according to claim 1. Description: 19. The electronic device according to claim 18, wherein the electronic device is a photoelectric conversion element. 20. The electronic device according to claim 18, wherein the electronic device is a light emitting element. 21. The electronic device according to claim 18, wherein the electronic device is a transistor. 22. An electronic device, comprising: a first electrode provided on a back surface of the semiconductor substrate according to claim 1; and a second electrode on a front surface side of the semiconductor layer. 23. A semiconductor substrate, wherein the semiconductor substrate according to claim 1 and a semiconductor layer of the single crystal compound are of the same conductivity type.