JPH10233183A - Cold electron-emitting device matrix and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To prevent malfunction and insulation breakdown of a flat panel display by suppressing electron emission from an emitter wiring, to suppress the formation of a gap that tends to occur in an insulating layer, and to withstand gate wiring. Provided is a cold electron emission element matrix having improved current characteristics and a method of manufacturing the same. A cold electron emitting element that emits cold electrons from an emitter by an electric field generated by applying a voltage between the emitter and the gate is provided between an emitter wiring and a gate that supply power to the emitter. A matrix structure formed at an intersection with a gate wiring to be supplied with power, and in particular, a cold electron emission element matrix characterized in that the side surfaces of the emitter wiring are oblique, and the emitter wiring is processed by dry etching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cold electron emitting element matrix suitable for using a so-called cold electron emitting element which emits cold electrons by field emission as an electron source of a flat panel display type image display device and the like, and a cold electron emitting element matrix thereof. It relates to a manufacturing method.

[0002]

2. Description of the Related Art In order to take out electrons from the surface of an object in a normal state, it is necessary to give energy corresponding to the work function of the surface of the object. This is because there is an energy barrier for the work function.

[0003] In order to energize the surface of the object, in a well-known example, the surface of the object is heated to a certain high temperature. Electrons whose kinetic energy has been increased by this heat jump out of the object surface beyond the energy barrier. This is what is called thermoelectron emission, and the emitted electrons are called thermoelectrons. The cathode that emits the electrons is called a hot cathode.

However, even when the object is not heated to a high temperature as described above, when an electric field is applied to the surface of the object, the width of the energy barrier is gradually reduced in accordance with the electric field, and particularly, the electric field intensity is about 10 ⁷ V /. In the case of a strong electric field of not less than cm, electrons break through the energy barrier by the so-called tunnel effect and are emitted from the object surface to the outside.

This is what is called field emission or strong field emission, and the emitted electrons are called field emission electrons or strong field emission electrons. In addition, the electron and the cathode may be referred to as a cold electron and a cold cathode, respectively, with respect to the thermoelectron and the hot cathode.

The principle of the field emission phenomenon is different from that of thermionic emission described above, and when considering industrial applications, it has a number of excellent features resulting from the difference in principle. It is known that

First, since the electric field is governed by Poisson's equation, if there is a projection, the electric field concentrates on the tip.
That is, if the projection shape is used, field emission can be caused at a relatively low voltage, and this can be used as an electron source.

FIG. 7 shows an example of a cold electron-emitting device as an electron source utilizing the field emission phenomenon. This element is called a disk edge type emitter. The emitter has a disk shape, and a gate electrode is formed so as to surround an upper edge thereof. Emitter ・
When a voltage is applied between the gates, an electric field is concentrated on the emitter edge, and electrons are emitted.

When a cold electron emitting device is used as a flat panel display, a matrix structure is used in which a plurality of devices are arrayed to form one pixel, which is arranged at each intersection of a plurality of emitter wirings and a plurality of gate wirings. Commonly used. The emission current of each array is controlled by the potential difference between the corresponding gate wiring and emitter wiring, and the electrons excite the phosphor formed on the opposite substrate, thereby determining the brightness of each pixel.

A threshold voltage is present in a cold electron-emitting device. For example, electron emission does not occur up to about several tens of volts. Utilizing this characteristic, in the matrix, a constant selection potential is applied to only one gate line, and an emitter potential controlled to give the luminance of a pixel belonging to that gate line is applied to each emitter line. In a pixel belonging to another gate line, since the potential difference is smaller by the selection potential, the potential difference becomes equal to or less than the threshold value, and light emission is suppressed. The entire image can be displayed by scanning the selection potential of the gate wiring.

It goes without saying that each emitter wiring and each gate wiring are electrically insulated and separated. Usually, a stripe-shaped emitter wiring is formed on an insulating substrate made of glass or the like, and a stripe-shaped gate wiring is formed via an insulating layer so as to intersect the emitter wiring.

However, according to the prior art, the following phenomenon is likely to occur. For example, it is known that a film formed by a sputtering method, an evaporation method, or the like has a columnar structure. When a film having a thickness of about 0.1 to 0.2 μm is processed by wet etching, the cross section of the film becomes substantially rectangular due to the influence of the columnar structure (FIG. 5C). And the upper edge is sharp.

When an insulating layer and a gate wiring are formed thereon, a gap is formed between the substrate and the emitter wiring due to a step corresponding to the thickness of the emitter wiring, and a gap is easily formed at the interface. . In addition, the film thickness becomes small at the portion connecting the upper part and the lower part of the step. (FIG. 5 (d).)

When a voltage is applied between the emitter wiring and the gate wiring so that the emitter side becomes negative, the upper edge becomes sharp due to the sharp upper edge of the emitter wiring and the gap between the insulating layers. The electric field concentrates on As a result, electrons are emitted, some of which reach the phosphor of the anode and cause malfunction, and some of which breaks the insulating layer to cause a short circuit. In addition, the gate wiring has a problem that it is liable to be disconnected because the film thickness is small and a weak portion is generated.

[0015]

As shown in FIG.
It can be said that a normal emitter wiring formed by a conventional manufacturing method has a rectangular cross section. That is, although it is never desired, the electric field is concentrated on the edge of the emitter wiring due to the cross-sectional shape, and electrons are emitted, and as a result, the flat panel display is liable to malfunction or dielectric breakdown. there were.

As a result, a steep step corresponding to the film thickness is formed at the end of the emitter wiring. Therefore, there is a problem that a gap is formed in the insulating layer or the gate wiring at a stepped portion, or the wiring is weak and easily disconnected.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and suppresses the emission of electrons from an emitter wiring to avoid a malfunction or dielectric breakdown of a flat panel display. It is an object of the present invention to provide a cold electron-emitting device matrix in which formation of a gap which tends to occur is suppressed and current resistance of a gate wiring is improved, and a method of manufacturing the same.

[0018]

Means for Solving the Problems In order to achieve the above object, means provided by the present invention is as follows. First, a gate is provided near an emitter, and a gate is provided between the emitter and the gate. A matrix structure in which a cold electron emitting element for emitting cold electrons from the emitter by an electric field generated by applying a voltage is formed at an intersection of an emitter wiring supplying power to the emitter and a gate wiring supplying power to the gate. And a side surface of the emitter wiring is obliquely inclined.

Alternatively, according to a second aspect of the present invention, there is provided the method of manufacturing a cold electron emitting element matrix according to the first aspect, wherein a dry etching method is used to process the emitter wiring. It is.

[0020]

Therefore, in a cold electron emission element matrix as provided by the present invention, an emitter wiring whose side surface is oblique is used (FIG. 1). In this case, the upper edge of the emitter wiring is not sharp. The step corresponding to the film thickness of the emitter wiring is replaced by a very gentle slope, and the film formation on the substrate and the emitter wiring proceeds simultaneously, and there is no gap. The thickness of the gate wiring is also substantially constant.
(FIGS. 2 and 3D).

Accordingly, electron emission from the upper edge of the emitter wiring is suppressed, and malfunction and short circuit can be suppressed. Also,
Disconnection of the gate wiring is unlikely to occur.

The angle between the side surface of the emitter wiring and the substrate surface is defined as a taper angle (θ in FIG. 6). In the conventional example, the taper angle θ is 90 °. The effect of the present invention is greater as the taper angle is smaller. Depending on the method of forming the insulating layer and gate wiring,
If the taper angle is approximately 45 ° or less, there is an effect.

In order to make the side surface of the emitter wiring oblique, side etching of the mask pattern may be performed simultaneously with etching of the emitter wiring. The taper angle θ is
Roughly, it is determined by the ratio between the etching rate of the emitter wiring and the side etching rate of the mask (FIG. 6). If the side etching rate of the mask is made higher than the etching rate of the emitter wiring, the taper angle θ becomes smaller.

Therefore, according to the manufacturing method of the present invention, it can be realized by using dry etching. Specifically, by changing the mixture ratio of the gas for etching the emitter wiring and the gas for etching the mask, the respective etching rates can be changed, and the emitter wiring having an arbitrary taper angle θ can be formed. For example, when Cr is used as the emitter wiring 1 and resist is used as the mask 6, a mixed gas of Cl ₂ and O ₂ can be used as an etching gas. At this time, an arbitrary taper angle can be set by selecting a mixing ratio of Cl ₂ and O ₂ (FIG. 7).

Further, after the emitter wiring is roughly formed by wet etching first, the side surface of the emitter wiring may be processed obliquely by dry etching.

[0026]

【Example】

[Embodiment of Cold Electron Emission Element Matrix] FIG. 1 shows an embodiment of a cold electron emission element matrix according to the present invention. In this embodiment, the emitter wiring 1 has a width of 500 μm,
The film thickness is 0.1 μm, the taper angle θ = 22 °, and the material is Cr. The insulating layer 2 is made of SiO 2 having a thickness of 0.6 μm.
_x , the gate wiring 3 is 0.2 μm thick Cr. still,
The substrate 4 is glass. At each intersection, 1 to about 1,0
00 cold electron emitting elements 5 are formed.

The insulating layer 2 and the gate wiring 3 have substantially the same film quality as the horizontal portion even in the tapered portion.

When a voltage is applied between an arbitrary gate wiring 3 and an emitter wiring 1 so that the emitter becomes negative, electrons are emitted from the cold electron emitting element 5 at the intersection. According to the matrix driving method described in the detailed description of the invention, each pixel can be displayed at an arbitrary luminance, and no malfunction was observed.

[Method of Manufacturing Cold Electron Emitting Element Matrix of Embodiment] FIG. 2 schematically shows an embodiment relating to a manufacturing method for manufacturing the cold electron emitting element matrix shown in FIG. First, a Cr film 1 ′ is formed to a thickness of 0.1 μm on a glass substrate 4 by a method such as sputtering or vapor deposition, and a stripe-shaped resist pattern 6 is formed thereon by photolithography. (FIG. 2A) Next, the Cr film 1 ′ and the resist 6 are etched by plasma etching using Cl ₂ gas and O ₂ to form the tapered emitter wiring 1. (Figure 2
(B)) Then, the resist 6 is removed. (FIG. 2 (c))

On the tapered emitter wiring 1, SiO _x
Is deposited to a film thickness of 0.6 μm, and Cr is deposited to a film thickness of 0.2 μm. (Fig. 2 (d))

Finally, the gate wiring 3 is processed by a well-known photo-etching method to complete the process.

[Another Method of Manufacturing the Cold Electron Emitting Element Matrix of the Embodiment] Another embodiment relating to a manufacturing method for manufacturing the cold electron emitting element matrix shown in FIG.
FIG. 3 schematically shows this. First, a Cr film 1 ′ is formed to a thickness of 0.1 μm on a glass substrate 4 by a method such as sputtering or vapor deposition, and a stripe-shaped resist pattern 6 is formed thereon by a photolithography method. (FIG. 3A) Next, the emitter wiring 1 is roughly processed by wet etching. (FIG. 3B) Subsequently, the Cr film 1 ′ and the resist 6 are etched by plasma etching using Cl ₂ gas and O ₂ to process the emitter wiring 1 into a tapered shape (FIG. 3B).
(B ′)) Then, the resist 6 is removed. (FIG. 3 (c))

On the tapered emitter wiring 1, SiO _x
Is deposited to a film thickness of 0.6 μm, and Cr is deposited to a film thickness of 0.2 μm. (FIG. 3 (d))

Finally, the gate wiring 3 is processed by a well-known photo-etching method to complete the process.

[Method of Manufacturing Cold Electron Emitting Element of Embodiment] The present invention relates to an emitter wiring 1 having a matrix structure, and is applicable to various cold electron emitting elements 5. In the present embodiment, a disk edge type (FIG. 8) was used as the cold electron emitting element 5. The manufacturing process in that case is shown in FIG.

First, in a state where the emitter wiring 1 is formed (FIG. 9C), Si and W are formed by sputtering.
Form a circular pattern by photolithography,
The emitter 51 is formed by dry etching (FIG. 9C). Thereafter, SiO _x as the insulating layer 2 and Cr as the gate 53 are deposited (FIG. 9D). Then, the deposit on the emitter 51 is removed by a so-called lift-off method (FIG. 9E).

[0037]

According to the cold electron emission element matrix of the present invention, by making the cross section of the emitter wiring tapered, electron emission from the emitter wiring can be suppressed, and malfunction and short circuit can be prevented. Further, a gap or a thin portion is not formed in the insulating layer or the gate wiring, so that disconnection of the gate wiring can be prevented.

In particular, according to the method of manufacturing a cold electron emission element matrix according to the present invention, by using a dry etching method, the emitter wiring having a tapered cross section can be formed in accordance with the intended design, and the processing accuracy can be improved. A high cold electron emission element matrix can be easily manufactured.

As described above, according to the present invention, the above-mentioned problems can be solved, the electron emission from the emitter wiring can be suppressed, the malfunction and the dielectric breakdown of the flat panel display can be avoided, and the flat panel display tends to be generated in the insulating layer. It is possible to provide a cold electron emitting element matrix in which the formation of a gap is suppressed and the current resistance of the gate wiring is improved, and a method of manufacturing the same.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a main part of one embodiment of a cold electron emission element matrix according to the present invention.

FIG. 2 is a process diagram showing a main part of one embodiment of the method of manufacturing the cold electron emission element matrix shown in FIG.

FIG. 3 is a process drawing showing a main part of another embodiment of the method for manufacturing the cold electron emission element matrix shown in FIG. 1;

FIG. 4 is a perspective view showing a main part of a cold electron emission element matrix according to a conventional technique.

FIG. 5 is a process diagram showing a main part of a method for manufacturing the cold electron emission matrix according to the conventional technique shown in FIG.

FIG. 6 is an explanatory diagram conceptually showing a relationship between an etching rate and a taper angle.

FIG. 7 is a graph showing a schematic relationship between an etching rate and a taper angle. (However, in plasma etching using a mixed gas of Cl ₂ and O ₂ , each etching rate of Cr and resist, an apparent side etching rate of resist, and a taper angle of Cr are shown.)

FIG. 8 is a perspective view showing a disk edge type cold electron emission element.

FIG. 9 is a process chart showing a method for manufacturing a disk-edge-type cold electron emission element matrix.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Emitter wiring 2 ... Insulating layer 3 ... Gate wiring 4 ... Substrate 5 ... Cold electron emission element 6 ... Emitter line forming resist 7 ... Emitter forming resist 51 ..Emitter electrode 53 ... Gate electrode

Claims (2)

[Claims] A cold electron emitting element for emitting cold electrons from the emitter by an electric field generated by applying a voltage between the emitter and the gate; A cold electron emitting element matrix, comprising: a matrix structure formed at an intersection of a wiring and a gate wiring supplying power to the gate, wherein a side surface of the emitter wiring is obliquely inclined. 2. The method according to claim 1, wherein a dry etching method is used to process the emitter wiring.