JPH10192533A - Arithmetic processor for game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate the verifying of a program for game from outside while reducing burden on the execution of a program in an arithmetic processor for a game machine having a validitya judging means of the program for game. SOLUTION: A program is divided into a program 1 for game and a validity judging program 3 to be respectively housed into the first and second memory means 2 and 4. A program executing means 7 is also divided into a game executing means 6 for executing the program for game and a validity judging means 5 for executing the validity program. Prior to the execution of the program for game, the validity judging means 5 executes a validity judging program 3 and then, only when the validity is approved, the game executing means 6 executes the program 1 for game. An external controller 8 is provided to execute a control operation in a game process under the control of the program executing means 7 and communication processing with the external controllers 8 is undertaken by a communication means 9 thereby reducing burden on the program executing means 7 accordingly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arithmetic processing unit for a game machine for controlling a game of a pachinko game machine, an arrangement ball, a rotary game machine, a jean ball game machine and the like.

[0002]

2. Description of the Related Art In recent years, when a game machine satisfies a specific condition, for example, when a prize in a specific area is won, a variable display game is performed using a special symbol display device provided on a game board, and the game result is displayed. A game in which the profit state of a player is changed significantly in response is widely spread, and a variable display game using a special symbol display is executed by program control including random number generation control. In addition to the arithmetic processing unit for executing the game program, the game machine also has a program control unit such as a discharge control unit for controlling the prize ball discharge control and a display control unit for performing the symbol display control of the special symbol display device. In addition to controlling the progress of the game program, the arithmetic processing unit for games also provides instructions for display symbols to the display control unit and instructions for the number of prize balls to the discharge control unit. Running.

[0003]

In the current game machines in which such a program-controlled device is increased, the characteristics of the game machine are determined by the game program rather than the conventional nail adjustment. As a development maker, a variety of expressions are included in the limited program area,
There is a demand to differentiate from other competitors, but as described above, the arithmetic processing unit for gaming machines not only controls the progress of the main program for games, but also instructs the display control unit to display symbols on the display control unit. In addition, since the emission control device is also instructed on the number of prize balls, processing load such as control of communication timing for these external devices is currently added.
There is a demand that the burden required for communication with these external devices be reduced as much as possible, and that more abilities be allocated to the original management of the main game program. Therefore,
SUMMARY OF THE INVENTION It is a first object of the present invention to reduce the burden on a processing unit for a gaming machine required for managing communication with an external device such as a display control device or a discharge control device.

[0004] In the case of a gaming machine controlled in a highly programmed manner as described above, depending on the gaming program, the gaming machine may have an extremely high gambling character. Currently, only gaming programs that have been certified by the certification organization can be used. However, in order to improve customer attraction, falsification of programs by ROM replacement has actually been performed, and security against tampering with programs has been realized. Ingenuity has been taken to enhance the function.

More specifically, when the game program developed by the manufacturer passes the certification by the certification organization,
Bring this successful program to a third party. The third party derives a security code from the passed program according to a predetermined encryption algorithm, and creates a master ROM in which the original game program and a security code derived from the game program according to the encryption algorithm are written. . The manufacturer copies the master ROM into the ROM of the arithmetic processing unit for a gaming machine in which a security program (the above-described encryption algorithm and the verification procedure, etc.) is registered in advance by a one-chip microcomputer, and mounts the master ROM on the gaming machine. When the power is turned on, the security program is first activated in the legal processing machine for a gaming machine thus obtained, and the RO
A security code is calculated from the game program stored in M according to a predetermined encryption algorithm, and is temporarily saved in the RAM area. On the other hand, a security code created by a third party is written in the ROM, and the security code previously written in the ROM and the security code saved in the RAM are originally created according to the same encryption algorithm. Since they were done, they must be of the same nature. Therefore, the tampering of the program is prevented by enabling the execution of the game program only when a match between the security codes is detected as a result of the comparison between the two.

Incidentally, such a security function is created in order to prevent a game store from exchanging ROMs at night, etc., and when an illegal act involving leakage of an encryption algorithm is performed. It is not always thorough, and irregular on-site inspections by inspection laboratories are indispensable to further enhance security functions. As an on-site inspection, it is possible to visually confirm the traces of peeling off the sealing seal. However, in order to provide a more complete security function or to improve the deterrence of tampering, the program is actually read and the master program is read. It is desirable to confirm the collation. However, when an arithmetic processing unit for a game machine, which is a one-chip microcomputer, is mounted on an inspection device, the number of pins is large, and when inserting or removing chips for inspection, the pins may be bent. A problem has arisen, and there has been a demand for a complete system that allows easier on-site inspection. In view of the above, the present invention provides a computing machine for a gaming machine capable of discharging a gaming program to a confirmation device by diverting communication means for performing data communication with an external control device without inserting and removing a chip. A second object is to provide a processing device.

[0007]

As shown in FIG. 1, an arithmetic processing unit for a gaming machine according to the first aspect of the present invention comprises:
And a second storage unit 4 for storing a validity determination program 3 for determining the validity of the game program 1 stored in the first storage unit 2.
And executing the validity determination program 3 stored in the second storage means 4. If the validity of the game program 1 stored in the first storage means 2 is recognized, the first Validity determining means 5 for permitting the execution of the game program 1 stored in the storage means 2 and the first storage based on the validity determining means 5 permitting the execution of the game program 1 A program execution means 7 including at least a game execution means 6 for executing the game program 1 stored in the means 2, and an external control device for executing a control operation in a game process under the control of the program execution means 7 The first object is achieved by providing communication means 9 for executing communication processing with the communication means 8.

According to the first aspect, the validity judging means 5 causes the validity judging means 5 to execute the validity judgment stored in the second storage means before the game executing means 6 executes the game program 1 stored in the first storage means. The program 3 is executed, and the execution of the game program 1 is permitted only when the legitimacy is recognized. In the course of execution of the game program 1, an external control device 8 such as a display control device for performing display control of a special symbol display device executes each control operation under the control of the program execution means 7, but communication processing is not performed. Since the communication is performed by the independent communication means, the time required for the program processing and the program for the communication control can be saved.

Further, in the arithmetic processing device for a gaming machine according to the second aspect, as shown in FIG. 2, the communication means 9 executes the program execution on the premise of the arithmetic processing device for the gaming machine according to the first aspect. Transmission data storage means 10 for temporarily storing transmission data from the means 7 to the external control device 8; and data transmission means 11 for transmitting the transmission data temporarily stored in the transmission data storage means 10 to the external control device 8.
From the external control device 8 to the program execution means 7
Receiving data from the external control device that temporarily stores received data from the external control device, and that the transmitted data storing unit 10 stores the transmitted data. Transmission state storage means 14 for storing that the received data is stored, reception state storage means 15 for storing that the received data storage means 12 stores the received data, and at least the data reception means 13 stores the external control device 8. When receiving the received data from the receiver, the setting of the reception status storage means 15 and the writing of the reception data to the reception data storage means 12 are performed, and the transmission data storage is performed based on the setting of the transmission status storage means 15. The transmission data written in the means 10 is transmitted to the data transmitting means 11
And a transmission / reception control means 16 for transmitting the data.

According to the second aspect, the program execution means sets the transmission state storage means of the communication means when transmitting data to the external control device, and sets the transmission data storage means in the transmission data storage means. If the transmission data is written in the transmission data storage means 10, the transmission / reception control means 16 transmits the transmission data in the transmission data storage means 10 to the external control device 8.
When the reception state storage means 15 is set, the received data written in the received data storage means 12 may be fetched, so that communication with the external control device 8 is performed. It is possible to perform the same procedure as that for data communication with the device in the chip.

The arithmetic processing device for a gaming machine according to claim 3 is based on the arithmetic processing device for a gaming machine according to claim 1 or 2, as shown in FIG. The device executes the game program 1 via a terminal point 17 for connecting the communication means 9 to the external control device 8.
Can be connected to a confirmation device 18 for judging the validity of the game program, and the validity judgment means 5 responds to a game program ejection request from the confirmation device 18 connected via the terminal point 17. The game program 1 to the communication means 9
And a program ejecting means 19 for sending the program to the confirmation device 18 via a computer.

According to the third aspect, when the game program 1 is sent to the confirmation device 18 for judging the validity of the game program 1 stored in the first storage means 2, the external control device 8 Since the terminal point 17 for connecting the device and the communication means 9 is also used, there is no trouble such as damage to the IC pins due to the attachment / detachment of the chip, and there is no need to attach / detach the processing unit for the gaming machine from the base. In addition, it becomes possible to solder the arithmetic processing device chip for a gaming machine onto a base, and the reliability of the device is also improved.

The arithmetic processing unit for a gaming machine according to the fourth aspect is premised on the arithmetic processing unit for a gaming machine according to the third aspect, as shown in FIG. Means for counting and storing the number of actuations of the means 19; and the validity determination means 5 determines whether the count storage value of the number-of-discharges storage means 20 has reached a preset value. An inactivating means 21 for inactivating the executing means 7 is provided.

In the case of the fourth aspect, the number-of-discharges storage means 20 constituted by a non-volatile memory stores the number of times of operation of the program discharge means 19, that is, the number of times the confirmation device 18 has performed an operation for confirming the validity of the game program 1. Are counted and stored, and when the counted stored value reaches a preset value, the inactivating means 21 can inactivate the program executing means 7. Therefore, it is difficult to try to discharge the game program 1 for the purpose of decoding the game program 1 and the like, and the integrity of the program is improved.

The arithmetic processing device for a gaming machine according to claim 5 is based on the arithmetic processing device for a gaming machine according to claim 1 or 2, as shown in FIG. The device can be connected to a confirmation device 18 for judging the legitimacy of the game program 1 and the game machine processing device via a terminal point 17 for connecting the communication means 9 to the external control device 8. And the validity determination means 5 is
An identification means 22 for judging the validity of the confirmation device 18 is provided. The validity judgment means 5 authenticates the processing device for the gaming machine by the confirmation device 18 connected via the terminal point 17. Under the condition that the authentication device 18 has been authenticated by the identification means 22, the game program 1 is transmitted in response to a game program ejection request from the confirmation device 18 connected via the terminal point 17. There is provided a program discharging means 19 for sending to the checking device 18 via the communication means 9.

In the case of claim 5, the game program 1 is discharged on condition that the authentication of the game machine on the side of the confirmation device 18 and the authentication of the confirmation device 18 by the identification means 22 on the side of the game machine are performed. Therefore, leakage of the game program can be effectively prevented.

Further, the arithmetic processing unit for a gaming machine according to the sixth aspect is premised on the arithmetic processing unit for a gaming machine according to the fifth aspect, as shown in FIG. Means 21 for counting and storing the number of times of operation of the means 19, and the validity determining means 5 is adapted to determine whether the count stored value of the number of times of storage 20 has reached a preset value, or
Deactivating means 21 for deactivating the program executing means 7 when the authentication of the confirmation device 18 by the
Is provided.

In the case of claim 6, as in the case of claim 4, the number-of-discharges storage means 20 constituted by a nonvolatile memory is provided.
Counts and stores the number of actuations of the program discharging means 19, and when the counted stored value reaches a preset value, the deactivating means 21 deactivates the program executing means 7 and further authenticates the confirmation device by the identification means 22. If the program cannot be taken, the program executing means 7 is deactivated, so that it becomes difficult to try to discharge the game program for the purpose of decoding the game program, etc., and the integrity of the program is improved.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. As shown in FIG. 7, the accessory control device 31 is mainly composed of an arithmetic processing unit 32 for a gaming machine constituted by a one-chip microcomputer, a crystal oscillator 33, a driver 34 for sending a signal to an external device,
It comprises a filter 35 for taking in data from an external device, an output port 36, an input port 37, an external bus 38, a sound generator 39 for generating various sound effects, an amplifier 40 and the like. Also, as an example of an external device in the output stage,
A display control device 41 for controlling display of symbols for a variable display game as a special game, a discharge control device 42 for controlling discharge of a prize ball, a first state which is advantageous for the player, and a second state which is disadvantageous for the player The variable winning device 43 and the display control device 41, which can be converted into the state, can be changed based on a winning ball to a first type start switch 48 described later, which triggers the start of a variable display game (for example, a symbol combination game or the like). Various types of information such as a memory display 44 for displaying the number of rights to play the display game, a decorative display 45 for displaying the state of the jackpot during the jackpot, information for notifying the management device 47 of the jackpot state, and information for notifying the execution of the variable display game It has an external information terminal 46 for transmitting information. Also, as an example of an external device at the input stage, a first-type start switch 48 for detecting a winning in a specific winning area, which is a trigger for starting a variable display game using the display control device 41, a so-called variable winning device during a jackpot. A count switch 49 for counting the number of winning balls to 43, a continuation switch 50 for detecting winning balls to a continuous winning area for continuing the big hit state, and the above-described for controlling display of symbols of the variable display game. It has a display control device 41, the above-described discharge control device 42 for controlling the discharge of prize balls, and the like. In this embodiment, external devices other than the display control device 41 and the discharge control device 42 are connected to the game machine processing unit 32 via the output port 36 or the input port 37, respectively. Are connected via a connector to a communication control device (SCU1 or SCU2) included in the arithmetic processing unit 32 for the gaming machine. Reference numeral 51 denotes a speaker for generating various sound effects.

FIG. 8 is a block diagram showing an example of the internal configuration of the arithmetic processing unit 32 for a gaming machine.
Is a RAM, 54 is a ROM, 55 is a memory control circuit, 56
Is a nonvolatile memory, 57 is a communication control unit (SCU1) assigned to the emission control unit 42, 58 is a communication control unit (SCU2) assigned to the display control unit 41, 59
Is an external bus interface, 60 is an internal bus, 61 is a clock generator, 62 is a reset interrupt control circuit, 6
3 denotes a CTC, 64 denotes an address decoder, 65 denotes an output control circuit, 66 denotes a PIO, and 67 denotes a watchdog timer.

The CPU core 52 is, for example, an 8-bit microprocessor, and executes a gaming operation of the gaming machine in units of one sequence based on a gaming program stored in the ROM 54. The RAM 53 is for temporarily storing data generated during the execution of the program. In particular, in the context of the present invention, a random number generation data is stored in a register area for counting and storing, and a variable display game is started. A register area for storing the number of winning balls to the starting hole, a register area for storing a processing number for branching, and the like are provided.
The ROM 54 functions as a first storage unit and a second storage unit, and stores a security program and a game program. The memory control circuit 55 has a CP
This is for controlling the switching of the program executed by the U core 52. In particular, in relation to the present embodiment, the security program is started at the time of startup. The nonvolatile memory 56 is a memory unit that retains the stored contents even when the power is turned off. The number of times the game program has been inspected by the below-described confirmation device is counted and stored in the non-volatile memory 56, and the non-volatile memory 56 constitutes the number-of-discharges storage means. The external bus interface 59 is the external bus 3
8 to send an address and data. The clock generator 61 divides the output of the external crystal oscillator 33 to an appropriate frequency to divide the output by the CPU core 52, the communication control devices 57 and 58,
Supply to external device. The reset interrupt control circuit 62 generates a system reset signal for resetting the entire gaming machine processing unit 32, a reset signal for the CPU core 52 only, and the like. The watchdog timer 67 is for preventing runaway of the program due to noise or the like, and resets the CPU core 52 if it is not cleared within a set time.

FIG. 9 is a block diagram showing the internal configuration of the communication control devices 57 and 58. Reference numeral 68 denotes data transmitted to an external control device (that is, the display control device 41 or the discharge control device 42). Transmission data buffer to temporarily store,
69 is a reception data buffer for temporarily storing data received from the external control device, 70 is a status register indicating that the reception data has been written to the reception data buffer 69, and 71 is set when writing the transmission data to the transmission data buffer 68. A command register, 72, a receiver having a serial / parallel conversion function for receiving received data from an external device, 73, a transmitter having a parallel / serial conversion function, for transmitting transmission data to the external device, and 74, a clock generated by the clock generator 61; A baud rate generator that operates the receiver 72 and the transmitter 74 in synchronization. A transmission / reception controller 75 sets the status register 70 when the receiver 72 receives the received data from the external device, stores the received data in the reception data buffer 69, and stores the transmission data buffer 68 when the command register 71 is set. Transmit data in the transmitter 73
To be sent. Further, reference numeral 76 denotes a mode register for setting a baud rate and the like, and 77 denotes a bus in the communication control device.

Next, FIG. 10 shows the accessory control device 31 and a game program checking device (simply called a checking device) 78.
FIG. 3 is a block diagram showing the connection state in principle, and a connector 79 (ie, an output connector of the communication control device 57) to which an external control device (the discharge control device 42 in this embodiment) on the accessory control device 31 side is connected. And the connector on the confirmation device 78 side are connected by a cable 81. Therefore, in the present embodiment, it is not necessary to attach / detach the processing unit for gaming machine 32 from the base constituting the accessory control device 31 at the time of on-site inspection of the gaming program.

FIG. 11 is a block diagram showing an example of the internal configuration of the confirmation device 78. Reference numeral 82 denotes a CPU; 83, a ROM storing an operation program of the confirmation device; 84, various intermediate data generated during the confirmation operation. RAM for storing data, 85
Is a start switch for starting the confirmation device 78, 86 is a filter for removing noise or the like of the start switch 85, 87 is an input port, 88 is a normal LED that lights up when the game program is judged to be normal, and 89 is a game. LED, 90, 91 that lights up when the application program is determined to be abnormal
Denotes a driver and an output port, 92 denotes a socket in which a master ROM 93 for determination is mounted, and 94 denotes an internal bus of the confirmation device 78.

Next, the operation of this embodiment will be described with reference to the above items and the flowcharts shown in FIGS. First, the program shown in FIG. 12 is started by turning on the power of the gaming machine in step S1.

In step S2, the memory control circuit 55 (FIG. 8)
) Starts the execution of the security program prepared in the ROM 54 when the system is started. First, when the security program is executed, first, in step S
At 3, it is confirmed whether the inoperable flag is set in the nonvolatile memory 56 or not. This inoperable flag is set in step S9 when the checking operation by the checking device 78 has been performed a predetermined number of times or more. Since the flag is normally cleared, the process proceeds to the next step S4. The system hangs if is set.

Subsequently, in step S4, the communication control device 57
It is determined whether or not the status register 70 is set. This status register 70 is used for the confirmation device 7
Unless the connector 8 is attached to the connector 79, it is initially cleared at this point. Therefore, the process proceeds to step S11. If the status register 70 is set within a predetermined time in step S11, the process proceeds to step S11.
The process proceeds to step S5, and if not set within the predetermined time, the process proceeds to step S21 (FIG. 14). Since the confirmation device 78 is mounted only at the time of the on-site inspection, the case where the process proceeds to step S21 will be described first.

In step S21, encrypted data is calculated from the game program in the ROM 54 according to a predetermined encryption algorithm. That is, an algorithm for encrypting given data is stored in the security program in the ROM 54 in advance, and the game program read from the ROM 54 is encrypted according to the above-mentioned encryption algorithm, and the calculated encrypted data is encrypted. RAM5
3 is temporarily stored. On the other hand, a partial area (for example, a tail area) allocated to the game program in the ROM 54
Stores encrypted data that has been encrypted by a third party in advance, and reads the encrypted data in the ROM 54 in step S22. Then, in step 23, RO
The encrypted data stored in advance in M54 is compared with the data obtained by encrypting the game program based on the encryption algorithm in step S21, and if they match, the memory control circuit 55 changes the memory area from the security program. It switches to the game program after FIG.
If they do not match, the system hangs up.

Upon transition to the game program of FIG. 15, initialization processing is performed in step S27 (clearing of various flags, etc.).
Is performed, and a prize ball control process is performed in step S28. The prize ball control processing is shown in detail in FIG. First,
In step S51, it is determined whether or not the status register 70 of the communication control device 57 is set. The discharge control device 42 is connected to the communication control device 57 except during the on-site inspection (see FIG. 7). When the discharge control device 42 detects a winning ball, it sends a prize ball request to the receiver 72 of the communication control device 57. I have. Upon receiving the prize ball request from the receiver 72, the transmission / reception controller 75 sets a reception flag in the status register 70 and sets the reception data buffer 69
Is writing the prize ball request.

When the status register 70 of the communication control unit 57 is set in the prize ball control processing which is repeated for each periodic interrupt request from the reset interrupt control circuit, the CPU core 52 will be described below. The control process is performed, and if not, the process returns to the main routine. That is,
When the status register 70 is set, the CPU core 52 reads the reception data stored in the reception data buffer 69 and determines whether or not the request is a prize ball request. In the case of a prize ball request, the number of prize balls is set. In this embodiment, the prize ball prize area is a prize in a starting hole for activating a variable display game or another prize area. There is a difference in the number of ejected prize balls.

Therefore, in this embodiment, a register area for counting and storing the number of winning balls in the starting hole is provided in the RAM 53, and every time a detecting signal of a winning ball is applied to the starting switch 48 (see FIG. 7). As will be described later with reference to FIG. 16, a register area for counting and storing the number of winning balls in the starting hole is added, and each time a prize ball discharging process based on winning in the starting hole is performed, the numerical value in the register area is subtracted. I have to. Further, in this embodiment, the winning in the starting hole means not only the discharge of the prize ball but also
The meaning as the number of rights to start the variable display game is also given, and the number of rights to start the variable display game is, for example, "4" as an upper limit value. However, no special upper limit is set for the emission of prize balls,
In M53, a first register area for counting and storing the number of prize balls to the starting hole for discharging the prize ball and the number of prize balls to the starting hole for starting the variable display game are stored. A second register area for counting and storing is separately provided. The register area determined in step 54 is a first register area for counting and storing the number of winning balls in the starting hole for the prize ball discharging process, and is a register area added in step S44 in FIG. Area.

If the first register area for counting the number of starting holes in the RAM 53 is equal to or more than "1", the CPU core 52 determines the number of award balls (for example, seven) determined for the starting holes by the communication control device. Set in the transmission data buffer 68 in the memory 57 and decrement the first register area for starting hole count storage by 1 (steps S56 and S57). If the first register area for starting hole count storage is "0", the general winning hole is determined. Is set in the transmission data buffer 68 in the communication control device 57 (step S5).
5) After that, the command register 71 in the communication control device 57 is set, and the process returns to the main routine of FIG.

When the command register 71 in the communication control device 57 is set in this way, the transmission / reception controller 7
5 transmits the number of award balls written in the transmission data buffer 68 to the discharge control device 42 via the transmitter 73,
The discharge control device 42 discharges the designated number of prize balls.

When the CPU routine returns from the prize ball control processing to the main routine in this manner, the CPU core 52 shifts to input processing of a start switch 46 for starting a variable display game using the display control device 41 in step S29. The input processing of the start switch 46 is shown in detail in FIG. When the processing shifts to the input processing of the start switch 46, C
In step S43, the PU core 52 checks whether or not the start switch 46 is turned on in accordance with the winning of the specific area. If the start switch 46 is not turned on, the process returns to the main routine. On the other hand, if the start switch 46 is ON, "1" is added to the first register area for starting hole count storage prepared in the RAM 53 in step S44. The count value of this register is used in step S5 in FIG.
The subtraction at 7 is as described above.

Subsequently, the CPU core 52 proceeds to step S45.
To check whether the count value of the second register area for starting hole count storage in the RAM 53 is "4" or less. In this embodiment, the number of rights to start the variable display game using the display control device 41 can be held up to a maximum of "4", but if it exceeds that, even if the start switch 46 is operated, overflow occurs. Therefore, if the count value in the starting hole counting and storing second register area exceeds “4”, the process returns to the main routine as it is, and if it is “4” or less, the starting hole counting and storing second register area is set to 1 After adding (S46)
The random number for determining the result of the variable display game is obtained.

More specifically, a random number generation area for generating random numbers and a random number storage area for storing random numbers for special symbol determination obtained from the random number generation area are allocated in the RAM 53. For example, when the probability is set to 1/200, the content of the random number generation area is cyclically updated in the "random number generation area addition step S30" for each interruption process of the main routine between (0 to 199). . Then, in step S47, the CPU core 52 reads the numerical value of the random number generation area (that is, the numerical value incremented between 0 and 199), stores this numerical value in the random number storage area in step 48, and returns to the main routine. I do. Then, in the main routine, the random number creation area is added in step S30.
Since the start switch 46 is not turned on every time the interrupt processing is performed, the random number value obtained is random.

After adding the random number creation area in step S30 of the main routine, normal processing is performed in step S31 according to the processing number (the processing number is stored in the processing area storage register area prepared in the RAM 53). , Design change processing, jackpot processing, and losing processing, and after each branch processing, external information processing (information transmission to the central management device, etc.) and output processing (various solenoids, etc.) in steps S36 to S40. Output), lamp LED processing (processing of lighting decorative lamps, etc.), sound output processing (processing of generating sound effects), fraud monitoring processing (monitoring of various fraudulent activities), and the like, and the next interrupt timing Returns to step S28.

When the register area for storing the processing number indicates "normal processing", the process jumps to "normal processing" in step S60 in FIG. 18, and in step S61, the contents of the second register area for starting hole count storage are updated. to see. This starting hole count storage second register area is added in step S46 of FIG. 16 with the turning on of the start switch 46, and it is assumed that the starting hole count storage second register area indicates "0". In steps S71 and S72, the normal display data is set in the transmission data buffer 68 of the communication control device 58, the transmission command is set in the command register 71 of the communication control device 58, and the process returns to the main routine. Since the transmission / reception controller 75 of the communication control device 58 serially transmits the normal display data written in the transmission data buffer 68 to the display control device 41 via the transmitter 73 in accordance with the setting of the command register 71 in this manner, The display control device 41 performs a normal display.
If it is determined in step S61 that the second register area for starting hole count storage is "0", the process of changing the process number is not performed, so the branch process in step S31 that is repeated for each interrupt request is not performed. Until the second register area for starting hole count storage becomes "1" or more, "normal processing" in FIG.
Will be branched to.

On the other hand, if the starting hole count storage second register area is equal to or larger than "1" in step S61, "1" is subtracted from the starting hole count storage second register area in step S62, and then in step S63. The random number value (the numerical value written in step S48 described above) in the random number storage area in the RAM 53 is read, and is compared with a predetermined determination value in step S64. As a result, if the random number value read from the random number storage area is a numerical value corresponding to a jackpot, step S66
The jackpot stop information (for example, display data of “7, 7, 7”) is transmitted to the transmission data buffer 6 of the communication control device 58.
8 and a jackpot flag is set in the RAM 53 in a step S67, and the process proceeds to a step 69. If the above random number is a value other than the jackpot, step S
At 68, the loss stop information (for example, display data other than “7.7.7”) is transmitted to the transmission data buffer 6 of the communication control device 58.
8 and in this case, proceed to step 69 without setting the jackpot flag. Then, in step S69, the command register 71 of the communication control device 58 is set,
In step S70, the processing number flag in the RAM 53 is changed to "symbol variation processing", and the process returns to the main routine. In the main routine, the symbol variation shown in FIG. Move on to processing. When the command register 71 is set, the communication controller 58 causes the transmission / reception controller 75 to display the data ("big hit stop information" or "missing stop information") set in the transmission data buffer 68 via the transmitter 73. Serial transmission to the control device 41 is performed.

On the other hand, when the display control device 41 receives the "big hit stop information" or the "losing stop information", the display pattern of the variable display device (not shown) is updated and displayed when the received stop information is obtained. The change of the symbol is stopped, and information indicating that the change of the symbol is stopped is transmitted to the communication control device 58. When the communication control device 58 receives this information via the receiver 72, the transmission / reception controller 75
Sets the status register 70 and sets the received data in the reception data buffer 69.

On the side of the processing unit for the gaming machine, the branch to the processing number of step S31 at the next interrupt timing is performed as shown in FIG.
When the process branches to the symbol variation process of No. 9, the status register 70 of the communication control device 58 is set in step S75 (if not set, the process returns to the main routine and is executed after the branch process at the next interrupt timing). In step S76, the contents of the reception data buffer 69 of the communication control device 58 are read, and in step S77, it is determined whether or not it is fluctuation stop information (information indicating that the fluctuation of the symbol has stopped). When it is confirmed that the information is the fluctuation stop information, it is determined whether or not the big hit flag is set in the RAM 53 in a step S78. This jackpot flag is set in step S67 when a jackpot has occurred as a result of the random number discrimination in step S65 of the normal processing of FIG. 18 described above, and the CPU core 52 determines if the jackpot flag is set in the RAM 53. In step S79, the content of the process number register in the RAM 53 is changed to a process number indicating the jackpot process, and in step S80, the jackpot flag in the RAM 53 is cleared and the process returns to the main routine. If the jackpot flag is not set, step S8
At step 1, the content of the process number register in the RAM 53 is changed to a process number indicating a loss process, and the process returns to the main routine.

Then, when branching to the jackpot processing in the branch processing in step S31 of the main routine at the next interrupt timing, the processing associated with the jackpot (for example, opening the variable winning device 43 for a long time, and displaying the jackpot on the decoration display 45). (E.g., decorative display shown, generation of a sound effect accompanying a jackpot from the speaker 51, transmission of the jackpot occurrence to the management device 47, etc.), and these are transmitted to the management device in steps S36 to S39, or the target control is performed. It is transmitted to the target device. Step S of the main routine
If the process branches to the losing process in the diverging process by 31, a process associated with the losing is prepared (for example, a decoration display indicating a disconnection on the decorative display 45, a sound effect accompanying the disconnection from the speaker 51, etc.). The information is transmitted to the management device 47 in a step or transmitted to a target control target device.

The above is the operation when the confirmation device 78 is not mounted. Next, the operation when the confirmation device 78 is mounted will be described. The confirmation device 78 is mounted using a connector for connecting the discharge control device 42 shown in FIG. Therefore, when connecting the confirmation device 78, the connector of the discharge control device 41 is disconnected and the confirmation device 7 is inserted there.
8 is mounted, and the power supply of the processing unit for gaming machine 32 is started.

FIG. 20 shows the operation of the confirmation device 78. In step S84, the CPU 82 of the confirmation device 78 (see FIG. 11) performs initialization processing such as initialization of the program counter in accordance with the program in the ROM 83. It waits for the start switch 85 to be pressed later. Start switch 85
Is pressed, the CPU 82 returns to the normal LED 88 and abnormal LE.
After turning off D89, an activation signal is transmitted to the receiver 72 of the communication control device 57 via the output port 91 and the driver 90. Accordingly, the transmission / reception controller 75 of the communication control device 57 sets the status register 70 and writes an activation signal in the reception data buffer 69.

On the other hand, the processing unit 32 for the gaming machine executes the processing of FIG. 12 already described because the power supply is turned on. If it is confirmed in step S4 that the status register 70 of the communication control device 57 has been set before the predetermined time set in step S11 has elapsed, the contents of the reception data buffer 69 of the communication control device 57 are read in step S5. In S6, it is determined whether or not the signal is a normal start signal. If the normal activation signal is not detected, it is considered that some device is mounted for the purpose of leakage of the game program or the like, and the system is set after the inoperable flag is set in the nonvolatile memory 56 in step S9. Hang up. If it is determined in step S6 that the signal is a normal activation signal, the value stored in the number-of-transmissions memory in the nonvolatile memory 56 is incremented by one in step S7, and the count value of the number-of-transmissions memory is set in step S8. It is determined whether the value has become equal to or more than a value (for example, 5). It is unnatural that the on-site inspection is frequently performed on one gaming machine. In order to prevent leakage of the gaming program, etc., if the value of the number-of-transmissions memory is equal to or larger than the set value in step S8. Sets the inoperable flag in the nonvolatile memory 58 in step S9 and hangs up the system.

If the number-of-sendings memory is equal to or smaller than the set value in step S8, in step S10 the accessory code (I
(D code). More specifically, the command register 71 of the communication control device 57 is set, and the accessory code is written into the transmission data buffer 68. On the communication control device 58 side, the transmission / reception controller 75
When the command register 71 is set, the accessory code written in the transmission data buffer 69 is serially transmitted to the connector 80 of the confirmation device 78 via the transmitter 73.

On the other hand, the confirmation device 78 executes the program shown in FIG.
It waits until the character code transmitted from is received through the filter 86 and the input port 87. When the character code is captured, it is determined in step S89 whether or not the character code is normal. If the character code is not normal, the abnormal LED 89 is determined without performing the matching process of the game program. Is displayed to indicate that an abnormality has occurred, and the operation is terminated. That is, this corresponds to a game authentication operation performed on the confirmation device side. If it is determined in step S89 that the accessory code is normal,
The PU 82 sends the confirmation device code (confirmation device ID code) via the output port 91 and the driver 90 to the communication control device 5.
7 to the receiver 72. Communication control device 57
The transmission / reception controller 75 sets the status register 70 and writes the confirmation device code into the reception data buffer 69.

On the side of the processing unit 32 for the gaming machine, after transmitting the accessory code in step S10, the process proceeds to step S12.
Waits for the status register 70 of the communication control device 57 to be set. When the status register 70 is set, the reception data buffer 6 is set in step S13.
9 is read, and it is determined in step S14 whether or not the code is a confirmation device code. In step S15, it is determined whether or not the code is normal. If the result of the determination is negative, the nonvolatile memory is determined in step S20. An inoperative flag is set in the memory 56 to hang the system. That is, it corresponds to the authentication operation of the confirmation device performed on the gaming machine side.

If it is determined in step S15 that the confirmation device code is normal, the CP of the processing unit for gaming machine 32 side
The U core 52 transmits the game program stored in the ROM 54 to the confirmation device 78 in step S16.
It goes without saying that the transmission procedure is performed via the communication control device 57 as described above. The transmission of the game program is repeatedly executed while adding the read address of the ROM 54 in steps S17 and S18 until all the data is transmitted. When the transmission of all the data of the game program is completed, the CPU core 52 determines that the data transmission is completed. The final information shown is transmitted to the confirmation device 78 side.

On the other hand, on the confirmation device 78 side, step S91
Reads the game program transmitted by, for each transmission unit,
When the final information is confirmed in step S92, the game program read from the gaming machine is collated with the master program stored in advance in the master ROM 93 mounted on the socket 92 (step S93). If detected, the normal LED is turned on at 88 in step S95 to terminate the operation. If no match is detected, the abnormal LED is turned on at step S96 and the operation is terminated.

[0051]

As described above, according to the present invention, according to the first aspect of the present invention, during the execution of the game program 1, an external control device such as a display control device is controlled by the program execution means. When each control action is executed by
Since the communication processing between the program execution means of the gaming machine body and the external control device is performed by independent communication means, the time required for the program processing and the program for communication control can be saved.

According to the second aspect, the program execution means sets the transmission state storage means of the communication means when transmitting data to the external control device, and stores the transmission data in the transmission data storage means. When the data is written, the transmission / reception control means sends the transmission data in the transmission data storage means from the data transmission means to the external control device, and when the reception state storage means is set, the data written in the reception data storage means. It is good to take in
Communication between the program execution means and the external control device can be performed in the same procedure as data communication with the device in the chip.

According to the third aspect, when transmitting the game program to the confirmation device to determine the validity of the game program stored in the first storage means, communication with the external control device is performed. Since the terminal point for connecting the communication means for performing the operation is also used, I
There is no trouble such as damage to the C-pin, and there is no need to mount and remove the processing unit for gaming machines from the base. The performance is also improved.

Further, in the case of claim 4, the number-of-discharges storage means constituted by the non-volatile memory counts the number of times of operation of the program discharge means, that is, the number of times that the validity of the game program is confirmed by the confirmation device. When the count stored value reaches a preset value, the deactivating means can deactivate the program executing means, so that it is possible to attempt to discharge the game program for the purpose of decoding the game program. It becomes difficult and the integrity of the program is improved

In the case of claim 5, the game program is discharged on condition that the authentication of the game machine on the confirmation device side and the authentication of the confirmation device by the identification means on the game machine side are performed. It is possible to effectively prevent leakage of the game program.

Further, in the case of claim 6, the ejection number storage means constituted by a nonvolatile memory counts and stores the number of times of operation of the program ejection means as in the case of claim 4, and the counted storage value reaches a preset value. Then, the deactivating means deactivates the program executing means, and furthermore, the program executing means is deactivated even if the verification device cannot be authenticated by the identification means. As a result, it becomes difficult to try to discharge the game program, and the maintainability of the program is further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing in principle the arithmetic processing unit for a gaming machine shown in FIG.

FIG. 2 is a block diagram showing in principle the arithmetic processing unit for a gaming machine according to claim 2;

FIG. 3 is a block diagram showing in principle the arithmetic processing unit for a gaming machine shown in claim 3;

FIG. 4 is a block diagram showing in principle the arithmetic processing unit for a gaming machine shown in claim 4;

FIG. 5 is a block diagram showing in principle the arithmetic processing unit for a gaming machine according to claim 5;

FIG. 6 is a block diagram showing in principle the arithmetic processing unit for a gaming machine according to claim 6;

FIG. 7 is a block diagram of a control system for a gaming machine according to an embodiment in which the present invention is applied to an accessory control device for a pachinko gaming machine.

8 is a block diagram showing an internal configuration of the gaming machine arithmetic processing device of the embodiment shown in FIG. 7;

9 is a block diagram showing an internal configuration of a communication control device in the processing unit for the gaming machine shown in FIG.

FIG. 10 is a block diagram showing a connection state between the accessory control device and the confirmation device to which the present invention is applied.

FIG. 11 is a block diagram of a game program checking device.

FIG. 12 is a flowchart of the first part of the security program of the gaming machine according to the embodiment of the present invention.

FIG. 13 is a flowchart of the middle part of the security program for the gaming machine according to the embodiment of the present invention.

FIG. 14 is a flowchart of the latter part of the security program of the gaming machine according to the embodiment of the present invention.

FIG. 15 is a flowchart of a game program of the gaming machine according to the embodiment of the present invention.

FIG. 16 is a flowchart showing a part of a switch input process in the game program.

FIG. 17 is a flowchart showing a part of a prize ball control process in the game program.

FIG. 18 is a flowchart showing a part of a normal process in the game program.

FIG. 19 is a flowchart showing a symbol change process in the game program.

FIG. 20 is a flowchart of the game program checking device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 game program 2 first storage means 3 validity determination program 4 second storage means 5 validity determination means 6 game execution means 7 program execution means 8 external control device 9 communication means 10 transmission data storage means 11 data reception means REFERENCE SIGNS LIST 12 reception data storage means 13 data transmission means 14 transmission state storage means 15 reception state storage means 16 transmission / reception control means 17 terminal point 18 checking device 19 program discharge means 20 discharge count storage means 21 inactivation means 22 identification means 31 character control Apparatus 32 Processing machine for gaming machine 33 Crystal oscillator 34 Driver 35 Filter 36 Output port 37 Input port 38 External bus 39 Sound generator 40 Amplifier 41 Display control device 42 Emission control device 43 Variable winning device 44 Storage display 45 Decoration display 46 External information Child 47 Management device 48 Type 1 start switch 49 Count switch 50 Continue switch 51 Speaker 52 CPU core 53 RAM 54 ROM 55 Memory control circuit 56 Non-volatile memory 57 Communication control device 58 Communication control device 59 External bus interface 60 Internal bus 61 Clock Generator 62 Reset / interrupt control circuit 68 Transmission data buffer 69 Reception data buffer 70 Status register 71 Command register 72 Receiver 73 Transmitter 74 Baud rate generator 75 Transmission / reception controller 76 Mode register 77 Bus 78 Confirmation device 82 CPU 85 Start switch 88 Normal LED 89 Error LED 92 Socket 93 Master ROM

Claims (6)

[Claims] 1. A first storage means for storing a game program, and a second storage for storing a validity determination program for determining the validity of the game program stored in the first storage means. Means for executing a validity determination program stored in the second storage means, and when the validity of the game program stored in the first storage means is recognized, the first storage means Validity determining means for permitting execution of the stored game program, and a game program stored in the first storage means based on the execution of the game program being permitted by the validity determining means. Between a program execution means including at least a game execution means for executing a game, and an external control device for executing a control operation in a game process under the control of the program execution means. An arithmetic processing unit for a gaming machine having communication means for executing communication processing. 2. The arithmetic processing device for a gaming machine according to claim 1, wherein said communication means includes: transmission data storage means for temporarily storing transmission data from said program execution means to said external control device; and said transmission data storage means. Data transmission means for transmitting transmission data temporarily stored in the external control device to the external control device; reception data storage means for temporarily storing reception data from the external control device to the program execution means; Data receiving means for temporarily receiving reception data from the external control device, transmission state storage means for storing that the transmission data storage means holds transmission data, and reception data storage means for storing reception data Receiving state storing means for storing the data to be transmitted, and at least the data receiving means being an external control device. When the received data is received, the setting of the reception status storage means and the writing of the reception data to the reception data storage means are performed, and the transmission data storage means is written based on the setting of the transmission status storage means. And a transmission / reception control means for transmitting the transmitted data from the data transmission means. 3. The processing unit for a gaming machine according to claim 1, wherein said processing unit for a gaming machine is connected to said external control unit via a terminal point for connecting said communication means to said external control unit. It can be connected to a confirmation device for judging the legitimacy of the game program, and the legitimacy judging means comprises:
A program discharging means for transmitting a game program to the checking device via the communication means in response to a game program discharging request from the checking device connected via the terminal point. Arithmetic processing unit for gaming machines. 4. The arithmetic processing device for a gaming machine according to claim 3, further comprising: a discharge number storage means configured by a nonvolatile memory for counting and storing the number of times of operation of said program discharge means; A processing device for a gaming machine, comprising: a deactivating means for deactivating the program executing means when it is determined that the count stored value of the discharge number storing means has reached a preset value. 5. The arithmetic processing device for a gaming machine according to claim 1, wherein said arithmetic processing device for a gaming machine is connected to said external control device via a terminal point for connecting said communication means. The game program and the check device for judging the validity of the arithmetic processing device for a game machine are connectable, and the validity judging means includes identification means for judging the validity of the check device, The validity determining means determines the terminal point on condition that the authentication of the processing device for the gaming machine by the confirmation device connected via the terminal point and the authentication of the confirmation device by the identification means have been performed. And a program discharging means for transmitting a game program to the checking device via the communication means in response to a game program discharging request from the checking device connected via the communication device. Arithmetic processing unit for gaming machines. 6. The arithmetic processing unit for a gaming machine according to claim 5, further comprising: a discharge count storage unit configured by a nonvolatile memory for counting and storing the operation count of said program discharge unit, and said validity determination unit. Comprises deactivating means for deactivating the program executing means when the count storage value of the number-of-discharges storage means reaches a preset value or when the authentication of the checking device by the identification means is denied. An arithmetic processing device for a gaming machine.