JPH0388357U - - Google Patents
Info
- Publication number
- JPH0388357U JPH0388357U JP14822589U JP14822589U JPH0388357U JP H0388357 U JPH0388357 U JP H0388357U JP 14822589 U JP14822589 U JP 14822589U JP 14822589 U JP14822589 U JP 14822589U JP H0388357 U JPH0388357 U JP H0388357U
- Authority
- JP
- Japan
- Prior art keywords
- flat
- leads
- utility
- scope
- registration request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005192 partition Methods 0.000 claims description 2
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の一実施例を示す斜視図、第２
図は第１図のフラツトＩＣをプリント板に実装し
たときの側面図である。
１……フラツトＩＣ本体、２……リード、３…
…仕切り、４……パツド、５……プリント板。
Fig. 1 is a perspective view showing one embodiment of the present invention;
The figure is a side view of the flat IC of FIG. 1 mounted on a printed board. 1...Flat IC body, 2...Lead, 3...
...Partition, 4...Pad, 5...Printed board.
Claims (1)
リード間に絶縁体の仕切りを設けたことを特徴と
する表面実装用フラツトＩＣ。 A flat IC for surface mounting, characterized in that an insulating partition is provided between the leads of the IC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14822589U JPH0388357U (en) | 1989-12-22 | 1989-12-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14822589U JPH0388357U (en) | 1989-12-22 | 1989-12-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0388357U true JPH0388357U (en) | 1991-09-10 |
Family
ID=31694687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14822589U Pending JPH0388357U (en) | 1989-12-22 | 1989-12-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0388357U (en) |
-
1989
- 1989-12-22 JP JP14822589U patent/JPH0388357U/ja active Pending