JPH034525A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the connection of wiring conductor with the least contact resistance feasible even if a wiring in fine width is used by a method wherein, when as wiring conductor of high density IC is formed, the preprocessing after making a connecting hole is improved. CONSTITUTION:The surface of an Si substrate 1 whereon a specific element is formed is coated with an SiO2 film 2 so a to form the first Al wiring 3 in a region whereon a connecting hole is to be made and then the whole surface including the wiring 3 is covered with another SiO2 film 4. Next, an opening 5 is made in the position corresponding the wiring 3; a polluted film 6 containing high insulating fluoride, oxide, etc., is provided on the exposed wiring 3; the surface of the wiring 3 is slightly removed by plasma-processing using SF6 containing Ar diluted gas to remove the needless film 6 to be substituted with a newly coated fluoride layer 7. Thereafter, the substrate 1 is plasma-processed to remove the layer 7 for filling up the opening 5 with a W layer 8 and then the second Al layer 9 abutting against the W film 8 is formed. Through these procedures, the contact resistance between the layer 8 and the wiring 3 can be reduced to a negligible degree.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a semiconductor device, and particularly to an improvement in a process for forming wiring conductors in a high-density integrated circuit.

(Prior Art) The miniaturization and high integration of semiconductor integrated circuit elements are progressing significantly. In high-density integrated circuits, wiring becomes thin (and long), leading to problems such as high wiring resistance and disconnection.

Breaks in the wiring of integrated circuits are particularly likely to occur at connection hole portions of the wiring. As an effective method for preventing this wiring breakage, a method is known in which metal is embedded in the contact hole in advance by CVD. For example, a desired element is formed and the first layer Ag
An interlayer insulating film is formed on a semiconductor substrate on which wiring is formed, and connection holes are formed in this interlayer insulating film. Thereafter, tungsten (W), aluminum (AI), or the like is buried in this connection hole using, for example, selective CVD. then the second
Form layer metal wiring. According to this method, since there is no difference in level in the connection hole portion, it is possible to reliably prevent step breakage in the connection hole portion of the second layer wiring.

On the other hand, the problem of high wiring resistance cannot be solved by the metal embedding method described above. One of the reasons for the increase in the resistance of wiring is that the wiring itself becomes thinner and longer as described above, but another factor that cannot be ignored is an increase in contact resistance. The contact resistance of interconnects is increasing as connections and holes become smaller in size. Furthermore, a natural oxide film or other insulating film is formed on the surface of the conductor layer exposed to the contact hole, which causes an increase in contact resistance. Therefore, in order to obtain low contact resistance, it is extremely important to perform pretreatment to clean the surface of the conductor layer exposed to the contact hole after forming the contact hole for the wire and before forming the wire.

Conventionally, a method using dilute hydrofluoric acid has been generally used as a pretreatment before forming such wiring. However, with the fine contact holes in modern high-density integrated circuits, it is not possible to obtain a satisfactorily low contact resistance by this method. This is because even if dilute hydrofluoric acid treatment is performed, the substrate will be exposed to air before it is mounted on the film forming apparatus, and a natural oxide film will be formed again on the surface of the conductor layer exposed to the connection hole. Furthermore, a fluoride film may remain in the contact hole, which increases contact resistance.

On the other hand, there is a pretreatment method using plasma etching such as argon (Ar) gas. A film forming apparatus is also known in which a pretreatment chamber for performing this pretreatment and a reaction chamber for forming a wiring conductor layer are connected and integrated by a gate valve. By using this device, pretreatment and subsequent film formation can be performed continuously without breaking the vacuum.
It is possible to form a wiring conductor layer while maintaining a good surface condition. However, even with this device, there still remains a problem with the contact resistance of the wiring. When etching is performed using Ar gas plasma, the contaminated film on the surface of the conductor layer exposed to the connection hole is removed, but the surface is struck by the plasma and becomes very active. Therefore, if there is even a very small amount of air, a natural oxide film will be formed again while the pretreated substrate is being transported to the reaction chamber.

(Problems to be Solved by the Invention) As described above, with the conventional pre-processing method for forming wiring in semiconductor devices, it is difficult to obtain a sufficiently low contact resistance in high-density integrated circuits with fine contact holes. The problem was that there was no.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that includes a pretreatment process that can realize extremely low contact resistance.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides, firstly, forming an insulating film on a semiconductor substrate on which a desired element and a first conductor layer are formed, and forming connection holes in this insulating film. After forming, as a pretreatment step before forming the second conductor layer, (a) the substrate is left in an inert gas or nitrogen gas plasma, and (b) the substrate is placed in a gas containing halogen atoms. It is characterized by performing a series of plasma treatments, including (c) leaving the substrate in plasma, and then (c) leaving the substrate in plasma containing hydrogen atoms.

Second, the present invention provides a step (a) in the above-mentioned pretreatment step.
) (b) is performed at the same time.

The present invention also provides a method for performing the above steps (a) and (b) in the pretreatment chamber using a film forming apparatus in which a pretreatment chamber for plasma treatment and a reaction chamber for film formation are connected via a gate valve. and step (c) is performed in a reaction chamber.

(Operation) According to the present invention, the contaminated film on the surface of the first conductor layer exposed to the contact hole formed in the insulating film is removed by the inert gas or nitrogen gas plasma treatment in step (a). Then, by plasma treatment with a gas containing halogen atoms in step (b), a film containing a halide as a main component (hereinafter simply halogen A chemical compound film) is formed. This prevents the surface of the first conductor layer from being oxidized. Halide films can be easily removed by plasma treatment with a gas containing hydrogen atoms, so by performing this in the reaction chamber where the film is formed immediately before film formation, it is possible to eliminate the 19 dye film and natural oxide film. A second conductive layer can be formed that contacts the first conductive layer with a clean surface. Therefore, according to the present invention, it is possible to connect interlayers of wiring with extremely low contact resistance.

The same applies when the pretreatment steps (a) and (b) are performed at the same time. In this case, the removal of the contaminated film and the formation of a halide film serving as an oxidation-preventing film are performed simultaneously.

In addition, using a film forming apparatus in which a pretreatment chamber and a reaction chamber are connected and integrated by a gate valve, steps (a) and (b) are performed in the pretreatment chamber, and step (c) is performed in the reaction chamber. By doing so, the surface of the first conductor layer can be protected until immediately before film formation. In this case, since plasma treatment containing halogen atoms is not performed in the reaction chamber, the reaction chamber and the surface of the substrate transported therein are not contaminated with halides.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1(a) to 1(g) are cross-sectional views showing a wiring forming process in a semiconductor device of one embodiment. FIG. 2 schematically shows the structure of the film forming apparatus used in this example. The film forming apparatus includes a pretreatment chamber 11, a reaction chamber 21, and a gate valve 15 that connects these so that a substrate can be transferred between them.
have. The gate valve 15 may have any structure; the point is that it separates the two chambers when processing a substrate, and separates the two chambers when the substrate is transferred from the pretreatment chamber 11 to the reaction chamber 21. Any device that has a function that can be performed without being exposed to the outside air may be used. The electrode 13 in the pretreatment chamber 11 is connected to the substrate 12
A predetermined high frequency power is applied to this electrode 14 from an external high frequency power source 14. Similarly, the electrode 23 of the reaction chamber 21 is connected to the substrate 2.
It also serves as a susceptor on which is placed a predetermined high frequency power from an external high frequency power source 24. The reaction chamber 21 is provided with a quartz window, and an infrared lamp 26 for heating the substrate is provided outside the window. The metal containers constituting the main bodies of the pretreatment chamber 11 and the reaction chamber 21 are both grounded. Although not shown in the figure, a gas inlet pipe for introducing a predetermined gas and an exhaust system are connected to the front, processing chamber 11, and reaction chamber 21, respectively.

Using such a film forming apparatus, the formation process of a two-layer AJll wiring including a W embedding process is illustrated in FIGS.
). 1(a) to 1(e) are steps before using the film forming apparatus shown in FIG. 2. Figure 1 (a
) is a silicon substrate 1 on which desired elements have been formed through processes such as forming polycrystalline silicon film electrodes and diffusing impurities.
First, a silicon oxide film 2 is formed by the CVD method, and a first layer Al wiring 3 is deposited thereon. 1st layer Ag
The wiring 3 is formed by sputtering an AfI film, performing a PEP process, and then reactive ion etching (RI) according to the usual process.
It is obtained by patterning according to E). Next, Figure 1 (
As shown in b), a silicon oxide film 4 serving as an interlayer insulating film is formed.
is formed on the entire surface of the substrate. This silicon oxide film 4 is formed, for example, by a plasma CVD method using silane (SiH4) and oxygen (O2) as source gases. The thickness of this silicon oxide film 4 is, for example, 1,400. After this,
By a PEP process and RIH using fluorine gas, a contact hole 5 is formed on the first layer Al wiring 3 of the silicon oxide film 4, as shown in FIG. 1(c).

A contamination film 6 containing highly insulating fluorides, carbides, and oxides is formed on the surface of the first layer Ag wiring 3 exposed to the connection hole 5 of the substrate in which the connection hole 5 is formed in this way. There is.

Next, this substrate is set in the pretreatment chamber 11 of the film forming apparatus shown in FIG. In this embodiment, SF6 Ar dilution gas is introduced and high frequency power is applied to plasma-process the substrate. CHF5 is a gas containing fluorine other than SF6.
, C2H6.

C3Fjl+ CF4. Single gases such as NF, F2, etc. or a mixture thereof may be used. More specifically, the Ar dilution gas has an SF6 concentration of 1%, a gas flow of 4110 cc/wins, a pressure of 2 x 10-
2 Torrs substrate temperature 20℃, applied high frequency power 200W
, the substrate bias is -500V, and the processing time is about 1 minute. Under these conditions, the surface of the first layer AfI wiring is etched by approximately 120 degrees, and the silicon oxide film is etched by approximately 300 degrees. FIG. 1(d) shows the state after this plasma treatment. First layer Al wiring 3 exposed to connection hole 5
The top surface is covered with a fluoride film 7 instead of the contaminated film 6 removed.

Next, this substrate is placed in the reaction chamber 21 by opening the gate valve 15.
It was transported to the
The fluoride film 7 is removed as shown in e). At this time, the processing conditions are, for example, H2 gas flow rate of 24? /m1n, pressure I
Torr, substrate temperature 20”C1 applied high frequency power 200W
, the substrate bias is −1 ov, and the processing time is 1 minute.

Subsequently, in the same reaction chamber 21, a W layer 8 is embedded in the contact hole 5 by selective CVD as shown in FIG. 1(r).

At this time, the W layer deposition conditions are, for example, pressure 0, 2 To
rr, the substrate temperature is 300°C, and the raw material gas flow rate is tungsten hexafluoride (WF6) at a flow rate of 10 cc/-in.
1 Silane (S iH4) at a flow rate of 10cc/mIns
Let H2 have a flow rate of 500 cc/sin. At this time, the growth rate of the W layer is about 2000 people/win.

Thereafter, as shown in FIG. 1(g), second layer A and Q wirings 9 are formed to be connected on the first layer Al wiring 3 via the W layer 8. For example, the Al film is deposited using trimethylaluminum (AJ? (cH) as a raw material gas in the same reaction chamber 21.
3) C V D using 3) 1. : Move around.

Thereafter, the substrate is taken out from the reaction chamber, and after a PEP process, the second layer AfI wiring is patterned by, for example, RIE.

Note that the second layer Al film may be deposited by physical vapor deposition such as sputtering instead of CVD.

Thus, according to this embodiment, the first
The W layer 8 is buried in an extremely clean state in which the surface of the Al wiring layer 3 is free of natural oxide films and other contaminant films. Therefore W
The contact resistance between the layer 8 and the first layer Al wiring 3 is so small that it can be ignored.

In the example, embedding into the connection hole after pretreatment was selected using CVD.
This was done by This embedding step can also be performed in other ways.

FIGS. 3(a) to 3(c) are diagrams for explaining an embodiment using such another embedding process.

The pretreatment steps up to FIG. 1(e) are the same as in the previous embodiment. After this, in the reaction chamber, as shown in FIG. 3(a), two layers of W Si 10. and W layer 102 are sequentially deposited. The WSi2 layer 10 is, for example, WF6 (10c
Using a mixed gas of c/sin ) and SiH4 (200cc/m1n), the pressure was 0, 2 Torrs, and the substrate temperature was 3.
It is formed on the entire surface of the substrate at a temperature of 00° C. and a deposition rate of 500 people/sin. The thickness of this W Si 2 layer 101 is approximately 3000. Continuing, WF6 (10cc/l1in),
S i H4 (10cc/mfn), H2 (500c
c/ll1n) at a pressure of 0.2 Torr.
r, substrate temperature 300℃, sedimentation speed 500 people/aln W
A layer 10□ is grown to a thickness of about 1 μm over the entire surface. After that, SF6
The entire surface is etched using the plasma shown in Fig. 3(b).
As shown in FIG. 3, the W layer 10□ and the WSi2 layer 10□ are buried only in the connection hole portion. In this step, for example, the substrate is pretreated in the pretreatment chamber 111 so as not to contaminate the reaction chamber;
Let's go back. Thereafter, as in the previous embodiment, FIG.
), a second layer Al wiring 9 is formed.

This embodiment also provides the same effects as the previous embodiment.

The present invention is not limited to the above embodiments, and can be implemented with various modifications as illustrated below.

(a) In the example, the pretreatment after forming the connection hole was performed using gas plasma containing Ar gas and a gas containing fluorine atoms at the same time, but plasma treatment using Ar gas was performed first to remove the contaminated film. Subsequently, plasma treatment using a gas containing fluorine atoms may be performed to form an oxidation-preventing film. Similar results can be obtained with this method as well. In this case, each plasma treatment may be performed in separate processing chambers.

(b) Although a gas containing fluorine atoms was used in the embodiment, a gas containing other halogen atoms such as chlorine, such as BCΩ3, may also be used.

(e) In the example, the film forming apparatus used had a structure in which the pretreatment chamber and the reaction chamber were connected by a gate valve as shown in Fig. 2, but each treatment chamber had an independent apparatus. The present invention is also effective when configured.

(d) In the examples, Ar was used as the plasma gas for pretreatment, but it is also possible to use other inert gases or nitrogen (N2) gas.Gas containing other halogen atoms instead of fluorine atoms You can also use

(e) In the embodiment, W or a laminated film of WSi2 and W is used as the metal to be filled in the connection hole, but other high melting point metals or their silicides can be used. Also Af
The present invention is also effective when forming I or the like in a buried manner.

(r) In the example, the first conductor layer is the first layer Al wiring, and the second conductor layer for connecting the second layer Al wiring to this is a W layer or a laminated structure of this and a WSi layer. The case where it is embedded in the connection hole has been explained.

The present invention is applicable not only when the wiring layer is made of a metal other than Ag, but also when the first conductor layer is a diffusion layer formed on a semiconductor substrate. Furthermore, by omitting the step of embedding a W layer or the like in the connection hole, for example, for the first layer Al wiring as the first conductor layer, the first layer Al wiring is used as the second conductor layer.
The present invention is also effective as a pretreatment when directly connecting wiring.

[Effects of the Invention] As described above, according to the present invention, wiring conductor connections with extremely low contact resistance can be achieved by improving the pretreatment process after forming contact holes. As a result, the reliability of high-density integrated circuits using fine-width wiring can be improved.

[Brief explanation of the drawing]

FIGS. 1(a) to (g) are cross-sectional views showing the wiring forming process according to an embodiment of the present invention; FIG. 2 is a diagram showing a schematic configuration of a film forming apparatus used in the embodiment; FIG. FIG. 3 is a cross-sectional view showing the wiring forming process of another example. 1...Si substrate, 2...silicon oxide film, 3...
2nd layer All wiring (first conductor layer), 4... Silicon oxide film, 5... Connection hole, 6... Contamination film, 7... Fluoride film, 8..., W layer ( second conductor layer), 9... second
Layer All wiring, 10+...W Si 2 layer, 102
. . . W layer, 11 . . . Pretreatment chamber, 12 . . . Substrate, 1
3... Electrode, 14... High frequency power supply, 15... Gate valve, 21... Reaction chamber, 2... Substrate, 23...
・Electrode, 24... High frequency power supply, 25... Quartz window,
26...Infrared lamp.

Claims (5)

[Claims] (1) A step of forming an insulating film on a semiconductor substrate on which a desired element and a first conductor layer are formed, a step of forming a contact hole in the insulating film, and a step of cleaning the surface of the substrate on which the contact hole is formed. In the method for manufacturing a semiconductor device, the method includes a pretreatment step of forming a second conductor layer, and a step of forming a second conductor layer connected to the first conductor layer through the connection hole, the pretreatment step comprising: (a) (b) leaving the substrate in a plasma of an inert gas or nitrogen gas; (b) leaving the substrate in a plasma of a gas containing halogen atoms; and (c) leaving the substrate in a plasma of a gas containing hydrogen atoms. A method for manufacturing a semiconductor device, comprising the step of leaving the device in a container. (2) A step of forming an insulating film on the semiconductor substrate on which a desired element and a first conductor layer are formed, a step of forming a contact hole in the insulating film, and a step of cleaning the surface of the substrate on which the contact hole is formed. In the method for manufacturing a semiconductor device, the method includes a pretreatment step of forming a second conductor layer, and a step of forming a second conductor layer connected to the first conductor layer through the connection hole, the pretreatment step comprising: (a) ) a step of leaving the substrate in a plasma of an inert gas or a gas containing nitrogen gas and halogen atoms; and (b) a step of leaving the substrate in a plasma containing hydrogen atoms. Method of manufacturing the device. (3) The pretreatment step and the step of forming the second conductor layer are performed using a film forming apparatus in which a pretreatment chamber and a reaction chamber for forming the conductor layer are connected via a gate valve; Of the pre-treatment steps, the step of leaving it in a plasma containing an inert gas or nitrogen gas and the step of leaving it in a plasma of a gas containing halogen atoms are performed in the pre-treatment chamber. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the leaving step is performed in a reaction chamber. (4) The pretreatment step and the step of forming the second conductor layer are performed using a film forming apparatus in which a pretreatment chamber and a reaction chamber for forming the conductor layer are connected via a gate valve; In the pretreatment process, the step of leaving the product in a plasma of an inert gas or nitrogen gas and a gas containing halogen atoms is performed in the pretreatment chamber, and the step of leaving it in the plasma of a gas containing hydrogen atoms is performed in the reaction chamber. 3. The method of manufacturing a semiconductor device according to claim 2, wherein: (5) The first conductor layer is a first layer metal wiring, and the second conductor layer has a high melting point embedded in the connection hole to connect the second layer metal wiring to the first conductor layer. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is a laminate of a metal or a high melting point metal and its silicide.