JPH033768U

JPH033768U -

Info

Publication number: JPH033768U
Application number: JP6477189U
Authority: JP
Priority date: 1989-06-02
Filing date: 1989-06-02
Publication date: 1991-01-16

Description

[Brief explanation of drawings]

第１図は、本考案のプリント配線板を示す平面
概略図、第２図は、ダミーパターンの設定基準を
説明する図、第３図は、信号回路のループ面積を
示す図、第４図は、従来のプリント配線板を示す
平面概略図、第５図は、配線パターン状のメツキ
厚を説明する図、第６図は、従来の他のプリント
配線板を説明する図、第７図は、プリント配線板
の加熱変形状態を示す図、第８図は、更に他の従
来のプリント配線板を示す図、第９図は、従来の
信号回路におけるループ面積を示す図である。１……プリント配線板、１１……基板、２……
配線パターン、２１……スルーホール、３，３Ａ
，３Ｂ，３Ｃ，３Ｄ……ダミーパターン、３１，
３２……接地部、Ａ，Ｂ，Ｃ，Ｄ……空きエリア
。 FIG. 1 is a schematic plan view showing the printed wiring board of the present invention, FIG. 2 is a diagram explaining the setting criteria for dummy patterns, FIG. 3 is a diagram showing the loop area of the signal circuit, and FIG. , FIG. 5 is a diagram illustrating the plating thickness of a wiring pattern, FIG. 6 is a diagram illustrating another conventional printed wiring board, and FIG. 7 is a schematic plan view showing a conventional printed wiring board. FIG. 8 is a diagram showing a thermal deformation state of a printed wiring board, FIG. 8 is a diagram showing another conventional printed wiring board, and FIG. 9 is a diagram showing a loop area in a conventional signal circuit. 1...Printed wiring board, 11...Substrate, 2...
Wiring pattern, 21...Through hole, 3,3A
, 3B, 3C, 3D... dummy pattern, 31,
32...Grounding part, A, B, C, D...Empty area.

Claims

[Claims for Utility Model Registration] In a printed wiring board in which a plurality of wiring patterns are formed on the surface of the board, grid-like dummy patterns are independently formed in each empty area between the wiring patterns, and at least one of the dummy patterns is A printed wiring board characterized by being grounded at two or more points.