JPH033495A - Picture information transmission system - Google Patents

Abstract

PURPOSE:To improve the transmission efficiency by improving the compression rate when a picture is at a standstill and selecting a usual compression rate when the picture is moving so as to send picture information adaptively. CONSTITUTION:A counter circuit 15 monitors a movement data corresponding to each picture block respectively and when the circuit 15 detects it that a still picture, that is, a moving data representing 0 is consecutive for k-pictures, a conversion control signal of level 1 is outputted and a conversion control signal of 0 is outputted in other cases to a moving data conversion section 16. The moving data conversion section 16 outputs the moving data inputted from the moving detection section 6 as it is when the conversion control signal supplied from the counter circuit 15 is 0 and outputs the moving data while being converted into a level 1 representing the moving state when the conversion control signal is logical 1. The signal processing output is switched in the unit of blocks in response to the moving data outputted from the moving data conversion section 16. Thus, high definition picture information is sent efficiently.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image information transmission system, and particularly to an image information transmission system that enables highly efficient encoding.

[Conventional technology]

2. Description of the Related Art Hitherto, as this type of image information transmission system, for example, a high efficiency encoding system for television signals has been known. In this television signal high-efficiency encoding system, a desired MIN-MAX method is adopted to reduce the average number of bits per pixel due to the necessity of narrowing the transmission band. This MIN-MAX method will be explained below.

Television signals have strong spatiotemporal correlation. When an image is divided into small blocks, each block often has only a small dynamic range due to local correlation. Therefore, by determining the dynamic range for each block and adaptively encoding it, very efficient information compression can be achieved.

Therefore, this encoding will be specifically explained with reference to the drawings.

FIG. 3 is a diagram showing a schematic configuration of an image information transmission system as an example of conventional technology. 101 in the figure is an input terminal, which samples a raster-scanned analog image signal such as a television signal at a predetermined frequency, and
Digital image data is input which is digitized into n bits of data per sample. This 2n gradation digital image data is supplied to the pixel block division circuit 102.

FIG. 4 is a diagram showing how all pixel data for one screen is divided into pixel blocks. Pixel block division circuit 102
First, all pixel data for one screen is stored in a memory, etc., and as shown in Fig. )
Pixel data is read out in units of pixel blocks each consisting of (j!Xm) pixels of m pixels. That is, output is performed for each data of each pixel block.

FIG. 5 shows the configuration of each pixel block. In the figure, DI, 1
~0m, , indicates each pixel data. Image data output from the pixel block division circuit 102 is input to a maximum value detection section 103, a minimum value detection section 104, and a timing adjustment section 105. As a result, among all the pixel data (D1.l-Dm,t) in each pixel block, the data having the maximum value (Drnax) and the data having the minimum value (Dmin) are detected by the detection unit 103. 104 and output.

On the other hand, in the timing adjustment section 105, the maximum value detection section 103 and the minimum value detection section 104 calculate D max , D
All pixel data is delayed by the time necessary to detect +nie, and the pixel data is sent to the divided value converter 106 in a predetermined order for each pixel block. for example,
For each pixel block, D1. l, D2. l
l D 3.1 l...+ Dm, ++ DI, 2
＋. 00+ DITl, 21. ”+ DI, u-
o+ +++D+n, (j-1)+ I)1. !・・・
, Dtm, l.

In this way, all pixel data (Dt
+-Dm, ri, and their maximum value (Dm-) and minimum value (DmIn) are input to the division value conversion unit 106, and for each pixel data, a quantum that is divided into two between D□ax and Dmln is input. The bit division code (
A value of Δ1.1 to Δm is obtained. Here, k is an integer smaller than n, and the state of its quantization is shown in FIG. 6(a).

As shown in FIG. 6(a), it is output as a binary code of Δ+, 11tk bits. The n-bit division code Δ1,1 obtained in this way and the n-bit D max and D
Min is converted into serial data by parallel-serial (ps) converters 107, 107' and 107', respectively, and converted into serial data by a data selector 108 as shown in FIG. Note that FIG. 7 shows transmission data for one pixel block.

The data output from the data selector 108 is a first-in/first-out memory (FIFO memory)
At step 109, the data is subjected to time axis processing so as to have a constant data transmission rate, and furthermore, a synchronization signal is added at a simultaneous addition section 110, and the signal is sent out from an output terminal 111 to a transmission path (for example, a magnetic recording/reproducing system such as a VTR).

Regarding the addition of synchronization signals, for each pixel block,
This may be performed for each of a plurality of pixel blocks. Note that the operation timing of each of the above-mentioned sections is determined based on a timing signal output from the timing control section 112.

FIG. 8 is a block diagram showing a schematic configuration of a receiving side corresponding to the data transmitting side shown in FIG. 3. In FIG. 8, reference numeral 121 is a terminal to which the transmission data encoded with high efficiency on the transmission side described above is input.

The synchronization signal in the input transmission data is sent to the synchronization separator 122.
is separated and supplied to the timing control section 123. This timing control section determines the operation timing of each section on the receiving side based on the synchronization signal.

On the other hand, the data selector 124 selects n bits of data D max , D min in the upcoming transmission data,
Each pixel data is divided into bit quantized codes ΔI and j between D max and D mln. These are respectively serial-to-parallel (s-p) converters 125.
125', it is converted into parallel data. S-
The maximum value data D max % and minimum value data D mln in each pixel block, which are converted into parallel data by the P converter 125, are latched by latch circuits 126 and 127, respectively, and the latched maximum value data D'max and The minimum value data D min are each divided value inverse converter 12
8 is output. On the other hand, the division codes Δ1, 1 for each pixel data in each pixel block are output by the S-P converter 125' in the predetermined order as described above, and are supplied to the division value inverse transformer 128.

FIG. 6(b) shows the division code Δ(1 and p m@z , D
Representative value data pl related to the original pixel data from min
+, I is decoded, as shown in the figure (for example, the representative value is set to the middle of each quantization level obtained by dividing D max and D min into 2. In this way, the divided value inverse transformer n-bit representative value data (D'
+, +~D'□, 1) are output for each pixel block in the above-mentioned order. Scan converter section 12
At step 9, the output data of the divided value inverse converter 128 is converted into an order corresponding to raster scanning, and is outputted to the output terminal 130 as decoded image data.

[Problem that the invention seeks to solve]

However, in the conventional example described above, only the correlation in the two-dimensional space of images is used. Therefore, when transmitting still images or images with little movement, redundancy occurs in the transmitted information on the time axis, resulting in the same information being transmitted repeatedly.
The drawback is that it deteriorates transmission efficiency.

Therefore, in view of the above-mentioned points, an object of the present invention is to provide an image information transmission system that can efficiently transmit high-quality image information.

[Means to solve the problem]

The image information transmission system of the present invention is a system for transmitting image information in which one screen is composed of a plurality of pixel data, and wherein the one screen of the plurality of pixel data is a dividing means for dividing each pixel block into pixel blocks, and determining whether the pixel block belongs to a moving image area or a still image area in the screen for each of the plurality of pixel blocks divided by the dividing means, and determining the determination result. and a determination means for outputting a determination result obtained from the determination means for each of the plurality of pixel blocks for a predetermined period of time, and the determination result for each of the plurality of pixel blocks continues for at least the predetermined period. If it is determined that the image belongs to the still image area, the latest determination result is converted to the other image area,
Based on the conversion means to output and the determination result output from the conversion means, the pixel data in the pixel block of the moving image area is first converted using only the pixel data in the same pixel block.
The pixel data in the pixel block of the still image area is encoded based on the second encoding method using the pixel data in the same pixel block and the pixel data of other pixel blocks, The apparatus is equipped with an encoding means for outputting, and a transmission means for converting the pixel data encoded by the encoding means into transmission data and outputting it onto a transmission path.

[Effect]

With the above-described configuration, it is possible to perform highly efficient transmission of image information by performing adaptive transmission according to the state of the image information.

〔Example〕

Hereinafter, the present invention will be explained using one embodiment of the present invention.

1 and 2 are diagrams showing a schematic configuration of an image information transmission system as an embodiment of the present invention. here,
FIG. 1 shows a transmitting system, and FIG. 2 shows a receiving system. In addition, the first
In FIGS. 3 and 2, the same components as those in FIGS. 3 and 8 are given the same reference numerals and detailed explanations will be omitted.

In the following description, only the differences from the conventional example will be explained.

In FIG. 1, 1 is a subtracter that subtracts the output of the frame memory 10 from the output of the pixel block dividing circuit 102;
3 is an inter-frame maximum value detection unit that calculates the maximum value of the output of the subtracter 1, 3 is an inter-frame minimum value detection unit that also calculates the minimum value, and 4 is from the inter-frame maximum value detection unit 2 to the inter-frame divided value conversion unit 5. a timing adjustment section that adjusts the transmission time of
Reference numeral 6 indicates a motion detection unit that determines motion based on the outputs of the inter-frame maximum value detection unit 2 and the inter-frame minimum value detection unit 3 and outputs motion data; 15 indicates a predetermined motion detection unit that is detected in units of pixel blocks in the motion detection unit 6; A counter circuit 16 counts the motion data of each pixel block, and a counter circuit 16 counts the motion data of the motion detecting section 6 according to the count value in the counter 15.
7 is a switch that switches the output of each of the above sections 2.3.5; 8 is a switch that adds the outputs of the inter-frame divided value inverse conversion section 128 and the frame memory 10; an adder; 9 a switch for switching the output of the adder 8/output of the divided value inverse converter 131 as an input to the frame memory 10; 10 a frame memory for storing the signal from the switch 9;
11 is a switch for switching the respective outputs of the maximum value detection section 103, minimum value detection section 104, and divided value conversion section 106; 12 is a switch for inputting the signal from either of the switches 7 and 11 to the P-8 converter 13; The switch 13 converts the signal from the switch 12 from parallel to serial, and adds the output of the motion data converter 16 to the P-8 converter 1.
4 is a timing control section that controls the timing of each circuit.

In FIG. 2, 20 is an S-P converter that performs serial-to-parallel conversion of the signal from the input section 121, 21 is an adder that adds the output of the divided value inverse conversion section 128 and the output of the frame memory 23, and 22 is a scan A switch selects the divided value inverse conversion section 128 or the output of the adder 21 as an input to the converter 129, 23 is a frame memory that stores the signal from the switch 22, and 24 is a motion signal from the output of the S-P converter 20. A motion signal separation unit 25 is a timing control unit that controls the timing of each circuit from the output of the synchronization separation unit 122.

Next, the operation of the transmission system shown in FIG. 1 will be explained.

The image digital data inputted from the input terminal 101 in FIG.
The signal is input to a signal processing section that uses the AX method and a signal processing section that uses only the MIN-MAX method. The signal processing unit has a frame memory 10, calculates the difference value between the decoded value of the previous frame and the current frame using a subtracter l, and sends the obtained value to an inter-frame maximum value detection unit 2 and an inter-frame minimum value detection unit. 3
, a timing adjustment section 4, an inter-frame division value conversion section 5, and a switch 7. The re-encoded signal is decoded by the inter-frame division value inverse converter 128 and stored in the frame memory 1.
It is added to the output of 0 by adder 8. Furthermore, new pixel data is rewritten into the frame memory 10 via the switch 9.

This decoding/rewriting operation updates the contents of the frame memory and makes it possible to match the contents with the frame memory on the receiving side. Through these signal processes, interframe difference DPCM and MIN-MAX encoding are performed.

Furthermore, whether each pixel block is in a moving state or a stationary state is detected by the motion detecting section 6.

The maximum value data detected by the inter-frame maximum value detection part 2 and the minimum value data detected by the inter-frame minimum value detection part 3 are input to the motion detection part 6 for each pixel block. , the motion detector 6 calculates the difference value between the input maximum value data and minimum value data, and compares the calculated difference value with a preset threshold value to detect 1 bit for each pixel data. Output motion data.

That is, if the difference value between the maximum value data and the minimum value data is the same as the threshold value or larger than the threshold value,
It is determined that the pixel block is in a moving state and outputs motion data representing "1", and if the difference value is smaller than the threshold value, it is determined that the pixel block is in a stationary state, and "O" is output. It is designed to output motion data representing the .

Note that if the threshold value is set to an extremely large value, the transmission rate will improve, but the image quality will deteriorate in the reproduced image, especially for images with movement, and if the threshold value is set to an extremely small value, If set, the image quality deterioration will be improved, but the transmission efficiency will be reduced. Therefore, an appropriate value should be set in advance, taking into consideration the reproduced image quality and transmission efficiency.

The motion data generated by the motion detection section 6 as described above is supplied to the counter circuit 15 and the motion data conversion section 16.

As shown in FIG. 9, the counter circuit 15 has a number of counters 15-1 to 15-b corresponding to the number of pixel blocks for one screen divided by the pixel block dividing circuit 102.
! 1, an input switching circuit 15-a that supplies input motion data to the corresponding counter, and an output switching circuit 15-c that sequentially switches and outputs the signals output from each counter.

The operation of the counter circuit 15 will be explained below using FIG. 9.

As shown in FIG. 9, motion data input from the motion detection section 6 to the counter circuit 15 is input to the input switching circuit 15-a. The input switching circuit 15-a receives the pixel block synchronization signal B generated by the timing control circuit 14.
The input switching circuit 15-a sequentially supplies the motion data inputted in synchronization with the pixel block synchronization signal BS to the reset terminal R of the corresponding counter.

Further, the counters 15-b to 15-bn are supplied with a pixel block synchronization signal BS generated by the timing control section 14 to a clock input terminal CK, and a vertical synchronization signal VS to a data input terminal. Each counter is counted up every time the vertical synchronization signal vS is input, and until the count value reaches 0, it is converted to "O" in synchronization with the pixel block synchronization signal BS input from the clock input terminal CK. Control signal output conversion circuit 15-c
When the count value reaches "K", a conversion control signal of "1" is outputted to the output switching circuit 15-c and also supplied to the reset terminal R to reset the counter.

The conversion control signals output from each counter are input to the output switching circuit 15-c, and sequentially output to the motion data conversion section 16 in synchronization with the pixel block synchronization signal output from the timing control section 14.

That is, the counter circuit 15 monitors the motion data corresponding to each pixel block, and determines the still image state, that is, "
If it is detected that the motion data representing "0" continues for a "K'" screen period, a conversion control signal of "1m" is output; otherwise, a conversion control signal of "O" is output, and the motion data The signal is supplied to the converter 16.

Then, the motion data converting section 16 outputs the motion data input from the motion detecting section 6 as is when the conversion control signal supplied from the counter circuit 15 is "0"; When , “l” indicates the state of movement.
Convert and output.

With the above operation, the motion data output from the motion data converter 16 will not become "0" indicating a still state continuously for more than a screen period.

Next, signal processing using only the MIN-MAX method includes a maximum value detection section 103, a minimum value detection section 104, a timing adjustment section 105, a divided value conversion section 106, a divided value inverse conversion section 131,
The signal is processed by a MIN-MAX encoder comprising a switch 11.

These two signal processing outputs are sent to the motion data converter 16.
It is switched in block units according to the motion data output from the block. That is, when the motion data is 0'', signal processing is performed using the interframe difference DPCM and the MIN-MAX method, and when the motion data is jllll, the signal processing is performed using the MIN-MAX method.
Signal processing using only the AX method is performed using the switch 12. At the same time as this switching, the switch 9 changes the input to the frame memory 10 when the motion data is "1".
By switching from a signal subjected to inter-frame difference DPCM and processed based on the MIN-MAX method to a signal output from the divided value inverse conversion circuit 131 using only the MIN-MAX method,
By rewriting the contents of the frame memory 10 with new values, it is possible to prevent the accumulation of encoding errors due to interframe difference DPCM.

The P-3 (parallel-serial) converter 13 converts parallel pixel block data input in parallel into serial pixel block data, and further converts 1 bit of motion data output from the motion data converter 16 into each pixel. After being added to the block data, it is then processed and output in the same manner as in the conventional example.

Next, the operation of the receiving system shown in FIG. 2 will be explained.

The input terminal 121 in FIG. 2 receives the transmission data that has been highly efficiently encoded on the transmitting side described above. The synchronization signal in the input data is separated by the synchronization separator 122,
The signal is supplied to the timing control section 25. This timing control section 25 determines the operation timing of each section based on the synchronization signal.

On the other hand, an sp (serial-parallel) converter 20 converts input serial pixel block data into parallel pixel block data, and the motion data is separated by a motion data separation section 24. Each pixel block data converted into parallel data by the S-P converter 20 is transferred to a maximum value latch circuit 126 and a minimum value latch circuit 12.
7. The divided value inverse transform unit 128 decodes each pixel block.

When the motion data separated in the motion data separation section 24 is "1", the output of the motion separation section 24 causes the switch 22 to convert the signal decoded by the division value inverse conversion section 128 into a scan converter. 129, and when the motion data is "0", the adder 21 outputs the output of the frame memory 23 and the divided value inverse converter 1.
After adding the signal decoded by 28, the signal is supplied to the scan converter 129, and the same signal as the signal supplied to the scan converter 129 is input to the frame memory 23. By adding the signal stored in the frame memory 23 and the signal decoded by the division value conversion unit 128 in this way, the division value conversion unit 128
This is the signal decoded by The difference value of pixel data between frames is restored to the original pixel data. Thereafter, processing is performed in the same manner as in the conventional example.

Here, it will be explained that the number of transmission bits is reduced by using interframe DPCM and the MIN-MAX method together.

If frame-to-frame differences in pixel data are calculated using redundancy in the time axis of images, the dynamic range of the obtained data decreases.

Note that this tendency appears more strongly as the redundancy increases, that is, as the image becomes more stationary.

Therefore, in this embodiment, the motion detection unit 6 determines whether the pixel block is in a stationary state or in a moving state according to the size of the dynamic range of the inter-frame difference value of pixel data in each pixel block, For a pixel block in a stationary state, interframe DPCM and MIN-
A method that uses the MAX method in combination and divides the maximum value data representing the maximum value of the inter-frame difference value, the minimum value data representing the minimum value of the inter-frame difference value, and the dynamic range determined by the maximum value and the minimum value. By reducing the number, the number of transmission bits can be reduced.

As is clear from the above explanation, when inter-frame DPCM and the MIN-MAX method are used together, the data compression rate can be significantly improved. For example, when the number of pixels in each pixel block is lXm (i! = m = 3), each pixel is 8 bits, and the interframe DPCM and MEN-MAX method are used together for conversion, 3. When k=2, the total number of bits of pixel data in each pixel block is (8x3x3=)72 bits, and the interframe DPCM and M
When the IN-MAX method is also used for conversion, the total number of bits is (3x2+2x3x3=)24 bits, and the data compression rate is 1/3.

In the image information transmission system described above, the compression rate is increased when the image is in a still state, and the normal compression rate is set when the image is in motion, so that image information is transmitted adaptively. This makes it possible to improve transmission efficiency without transmitting excessive information.

Furthermore, in this embodiment, the counter circuit 15 and the motion data converter 16 prevent the motion data corresponding to any pixel block from becoming "0" indicating a stationary state continuously for a predetermined screen period or longer. Even if the data transmitted on the transmission path is erroneous, the data error will be difficult to propagate.In other words, pixel blocks that are determined to have a static image on the transmitting side will be subject to interframe DPCM and The data is transmitted after being converted using the MIN-MAX method, and the newly transmitted data is restored using the data that has already been transmitted and restored on the receiving side.
- If data is incorrect on the transmission path, all subsequent restored data will be incorrect restored data. Therefore, as mentioned above, by not performing data conversion using interframe DPCM and MIN-MAX methods for any pixel block for a predetermined screen period or longer, data errors caused by data errors on the transmission path can be prevented. This makes it possible to minimize the propagation of errors.

Note that it is necessary to set the period during which data conversion using the inter-frame DPCM and MIN-MAX methods can be performed for any pixel block in consideration of data transmission efficiency.

In other words, if the period is too short, the interframe DPCM
This is because if data is compressed by data conversion using both the MIN-MAX method and the MIN-MAX method, the number of pixel blocks decreases, the amount of transmitted data increases, and the propagation of data errors increases over a long period of time.

In the above embodiment, only the case of transmitting raster scanned image data was described, but when transmitting image information, regardless of the signal form of the original signal,
The present invention is applicable.

Furthermore, when transmitting information in other signal formats, it is only necessary to change the configurations of the pixel block division circuit 102, scan converter section 129, etc. as appropriate.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain an image information transmission system that can efficiently transmit high-quality image information.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of the transmitting side of an image information transmission system as an embodiment of the present invention; FIG. 2 is a schematic configuration diagram of the receiving side of the image information transmission system as an embodiment of the present invention; Figure 4 is a schematic diagram of the transmitting side of an image information transmission system according to the prior art; Figure 4 is a diagram showing how all image data is divided into pixel block groups; Figure 5 is a diagram showing the data arrangement of each pixel block; Figure 6 (a) is a diagram showing the conversion characteristics of the division value conversion unit in Figure 3, Figure 6 (b) is a diagram showing the conversion characteristics of the division value inverse conversion unit in Figure 8, and Figure 7 is a diagram showing the transmission characteristics. 8 is a diagram showing a schematic configuration of the receiving side corresponding to the transmitting side of the image information transmission system shown in FIG. 3, and FIG. 9 is a diagram for explaining the counter shown in FIG. 1. FIG. 1 is a diagram showing a schematic configuration of a circuit. l・・・・・・・・・・・・・・・・・・Subtractor 2・・・・
...... Inter-frame maximum value detection section 3...
...Inter-frame minimum value detection section 4.105...
. . . Timing adjustment section 5 . . . Inter-frame division value conversion section 6 . . . Motion detection section 7, 9. 11. 12 ・・・・・・・・・Switcher 8・・・・・・・・・・・・・・・Adder lO・・・・・・・・・・・・Frame memory 13・
...Parallel-to-serial converter 14 ...
... 128 ...... Timing control section counter circuit motion data conversion section pixel block division circuit maximum value detection section. Minimum value detection Partial division value conversion unit Inter-frame division value inverse conversion Partial division value inversion unit

Claims (1)

[Scope of Claims] A system for transmitting image information in which one screen is composed of a plurality of pixel data, wherein the one screen of the plurality of pixel data is divided into a plurality of pixel blocks for each predetermined number of pixel data. a dividing means for dividing each of the plurality of pixel blocks divided by the dividing means, determining whether the pixel block belongs to a moving image area or a still image area in the screen, and outputting a determination result. a determining means and each of the plurality of pixel blocks,
The determination results obtained by the determination means are each monitored for a predetermined period of time, and if the determination results for each of the plurality of pixel blocks are continuously determined to belong to the still image area for the predetermined period or longer, the latest determination result is monitored. pixel data in a pixel block in the moving image area is converted into a first code using only pixel data in the same pixel block, based on the determination result output from the conversion means. pixel data in a pixel block in the still image area is encoded based on a second encoding method using pixel data in the same pixel block and pixel data in other pixel blocks, and output. An image information transmission system comprising: encoding means; and transmission means for converting pixel data encoded by the encoding means into transmission data and outputting the data onto a transmission path.