JPH0254705B2 - - Google Patents
Info
- Publication number
- JPH0254705B2 JPH0254705B2 JP17017581A JP17017581A JPH0254705B2 JP H0254705 B2 JPH0254705 B2 JP H0254705B2 JP 17017581 A JP17017581 A JP 17017581A JP 17017581 A JP17017581 A JP 17017581A JP H0254705 B2 JPH0254705 B2 JP H0254705B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- frequency amplifier
- output
- converter
- variable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003321 amplification Effects 0.000 claims description 3
- 230000005684 electric field Effects 0.000 claims description 3
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 3
- 230000002452 interceptive effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
- H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
- H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
- H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
Description
【発明の詳細な説明】
本発明は、受信希望放送局付近に強力な放送局
が存在したり、また他の２つの放送局の放送周波
数が等間隔で並んだ場合にも最良の状態で受信し
得るシンセサイザー方式の受信機に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention provides optimal reception even when there is a powerful broadcasting station near the desired broadcasting station, or when the broadcasting frequencies of two other broadcasting stations are arranged at equal intervals. This invention relates to a synthesizer type receiver that can be used.
第１図は、従来のシンセサイザー方式の受信機
の一例を示すブロツク図である。図において、１
は高周波増幅器、２はミキサー、３は中間周波増
幅器、４はFM検波器、５はマルチプレツクス、
６は低周波増幅器と、順に信号の流れる系路を示
す。又７は局部発振器であつて、この局部発振器
の発振周波数を決定するために局部発振器７の出
力を可変分周するプログラム分圧器８と、このプ
ログラム分圧器８の分周比を変更し、種々の受信
周波数を指示する操作部１２と、プログラム分圧
器８の出力と、基準周波数発振器１０の出力を位
相比較する位相比較器９と、位相比較器９の出力
を低域ろ波するLPF１１と、このLPF１１の出
力で局部発振器７の発振周波数を制御することに
より、PLLシンセサイザー方式の受信機が構成
される。 FIG. 1 is a block diagram showing an example of a conventional synthesizer type receiver. In the figure, 1
is a high frequency amplifier, 2 is a mixer, 3 is an intermediate frequency amplifier, 4 is an FM detector, 5 is a multiplex,
Reference numeral 6 indicates a low frequency amplifier and a path through which signals sequentially flow. 7 is a local oscillator, which includes a program voltage divider 8 that variably divides the output of the local oscillator 7 in order to determine the oscillation frequency of the local oscillator; an operation unit 12 for instructing the reception frequency of the program voltage divider 8, a phase comparator 9 for phase comparison between the output of the program voltage divider 8 and the output of the reference frequency oscillator 10, and an LPF 11 for low-pass filtering the output of the phase comparator 9; By controlling the oscillation frequency of the local oscillator 7 with the output of the LPF 11, a PLL synthesizer type receiver is constructed.
従来の受信機は、上記LPF１１の出力を局部
発振器７に加えると同時に、高周波増幅器１にも
加えて、受信周波数に対し高周波増幅器の同調を
とることで、希望の周波数を受信している。 The conventional receiver receives the desired frequency by applying the output of the LPF 11 to the local oscillator 7 and simultaneously adding it to the high frequency amplifier 1, and tuning the high frequency amplifier to the receiving frequency.
しかし、このような受信機においては、希望受
信周波数の近傍に強力な放送局が存在したり、希
望受信周波数と他の２つの放送周波数の間隔が等
しく並んだ場合には、妨害を受けるため受信状態
が非常に悪くなるという問題があつた。 However, with such receivers, if there is a strong broadcasting station near the desired reception frequency, or if the desired reception frequency and two other broadcast frequencies are equally spaced, the reception will be interrupted due to interference. The problem was that the condition was getting very bad.
本発明の目的は、このような問題を解決するた
めに、高周波増幅器の同調特性を上側もしくは下
側に可変にし得るようにして希望の放送局を最良
の状態で受信できるようにした受信機を提供する
ことである。 SUMMARY OF THE INVENTION In order to solve these problems, an object of the present invention is to provide a receiver in which the tuning characteristics of a high-frequency amplifier can be varied upward or downward so that a desired broadcast station can be received in the best condition. It is to provide.
次に、本発明の受信機を実施例に基づいて説明
する。第２図は、本発明の第１の実施例を示すブ
ロツク図であつて、第１図と同一機能を有する要
素には、それと同一の参照番号を付してその詳し
い説明は省略する。この実施例においては、高周
波増幅器１と、LPF１１の出力の間に、R1，R2，
R3で示される様な可変分圧器を設けることによ
り、従来の局部発振器７の同調電圧特性で一義的
に決定されていた高周波増幅器の同調特性１を、
R1，R2，R3の分圧比を可変することにより、局
部発振器７の同調電圧特性と独立に、可変するこ
とができる。 Next, the receiver of the present invention will be explained based on an example. FIG. 2 is a block diagram showing a first embodiment of the present invention, and elements having the same functions as those in FIG. 1 are given the same reference numerals and detailed explanation thereof will be omitted. In this embodiment, R 1 , R 2 ,
By providing a variable voltage divider as shown by R3 , the tuning characteristic 1 of the high frequency amplifier, which was uniquely determined by the tuning voltage characteristic of the conventional local oscillator 7, can be changed.
By varying the voltage division ratio of R 1 , R 2 , and R 3 , the voltage can be varied independently of the tuning voltage characteristics of the local oscillator 7 .
第３図は、各部の同調電圧特性図であつて、縦
軸は同調電圧を横軸は受信周波数を表わし、曲線
は局部発振器の同調電圧を表わし、曲線は高
周波増幅器の同調電圧を表わし、曲線は、第２
図におけるR3の可変抵抗器を最小にしたときの、
可変分圧器の出力を表わす。R3の可変抵抗器の
抵抗値が０から無限大まで可変可能であれば、可
変分圧器の出力は、曲線と曲線の間の任意の
値をとることができる。今、高周波増幅器１の同
調電圧特性を曲線とのほぼ中央にもつてく
れば、一局の選局において、R3の可変抵抗器に
より自由に高周波増幅器１の同調特性を可変する
ことができる。 Figure 3 is a tuning voltage characteristic diagram of each part, where the vertical axis represents the tuning voltage, the horizontal axis represents the receiving frequency, the curve represents the tuning voltage of the local oscillator, the curve represents the tuning voltage of the high frequency amplifier, and the curve represents the tuning voltage of the high frequency amplifier. is the second
When the variable resistor R 3 in the figure is minimized,
Represents the output of a variable voltage divider. If the resistance value of the variable resistor R3 is variable from 0 to infinity, the output of the variable voltage divider can take any value between the curves. Now, if the tuning voltage characteristic of the high frequency amplifier 1 is brought approximately to the center of the curve, the tuning characteristic of the high frequency amplifier 1 can be freely varied using the variable resistor R3 when selecting one station.
更に、R3の可変抵抗器に中央部分にクリツク
の設けられた可変抵抗器を用い、その中央クリツ
ク部分において、局部発振器７と高周波増幅器１
の同調特性が揃うようにトラツキツグ調整を行な
えば、この中央クリツク部分に設定しておけば、
従来の受信機と同じように受信することが可能で
ある。従つて中央クリツク部分で、放送を受信
し、もしその周波数付近に強力な放送がある場合
や、希望周波数と他の２つの放送周波数の間隔が
等しく並んだ場合発生する相互変調妨害のある場
合には、R3の可変抵抗器を操作し、妨害が少な
くなるように、高周波増幅器１の同調特性を上側
あるいは下側に可変して、希望放送局を受信する
ことができる。 Furthermore, a variable resistor with a click at the center is used as the variable resistor R3 , and the local oscillator 7 and the high frequency amplifier 1 are connected at the center click.
If you adjust the tracking so that the tuning characteristics of
It can be received in the same way as a conventional receiver. Therefore, when a broadcast is received at the center click part, if there is a strong broadcast near that frequency, or if there is intermodulation interference that occurs when the desired frequency and two other broadcast frequencies are equally spaced, By operating the variable resistor R3 , the tuning characteristic of the high frequency amplifier 1 is varied upward or downward so as to reduce interference, and the desired broadcast station can be received.
第４図は、他の実施例を示すブロツク図であつ
て、第１の実施例と異なるところは、R3の可変
抵抗器の代わりに、トランジスタQ1を設け、こ
のトランジスタQ1をＤ／Ａ変換器１５より出力
される可変デユーテイパルスでスイツチングした
後、更にLPF１６で低域ろ波し、高周波増幅器
１へ出力している点である。 FIG. 4 is a block diagram showing another embodiment, and the difference from the first embodiment is that a transistor Q1 is provided instead of the variable resistor R3 , and this transistor Q1 is connected to a D/ After switching with the variable duty pulse output from the A converter 15, the signal is further low-pass filtered by the LPF 16 and output to the high frequency amplifier 1.
又、プログラム分圧器８の分周比を可変するた
めに、マイクロコンピユータ１４を用いている。
従つて選局操作部１２で発生した選局信号は、マ
イクロコンピユータ１４に入力され、選局信号に
相当する分周比設定コードに変換された後、プロ
グラム分圧器８に送られる。 Further, a microcomputer 14 is used to vary the frequency division ratio of the program voltage divider 8.
Therefore, the channel selection signal generated by the channel selection operation section 12 is input to the microcomputer 14, converted into a division ratio setting code corresponding to the channel selection signal, and then sent to the program voltage divider 8.
更に、中間周波増幅器３において、３段又は４
段の増幅器の各増幅段の和から検出される入力電
界信号があり、通常はシグナルメータを駆動する
ようになつている。この入力電界強度信号を、
Ａ／Ｄ変換器１３で、デジタル量に変換した後、
マイクロコンピユータ１４に送られる。又、マイ
クロコンピユータ１４はＤ／Ａ変換器１５にデジ
タル量を送り、Ｄ／Ａ変換器１５はこのデジタル
量に相当するデユーテイをもつたパルス信号を出
力する。 Furthermore, in the intermediate frequency amplifier 3, three or four stages
There is an input electric field signal detected from the sum of each amplification stage of the stage amplifier, usually adapted to drive a signal meter. This input field strength signal is
After converting into a digital quantity with the A/D converter 13,
It is sent to the microcomputer 14. Further, the microcomputer 14 sends a digital amount to the D/A converter 15, and the D/A converter 15 outputs a pulse signal having a duty corresponding to this digital amount.
今、通常の放送受信の場合は、Ｄ／Ａ変換器１
５の出力パルスのデユーテイは、第１の実施例に
おいて記述したR3の可変抵抗器の中央クリツク
部分に相当する分圧比を、トランジスタQ1のス
イツチングによつて実現するようなデユーテイ幅
に設定されており、このデユーテイ幅において、
高周波増幅器１と局部発振器７はトラツキング調
整がなされているものとする。 Now, for normal broadcast reception, D/A converter 1
The duty of the output pulse No. 5 is set to such a duty width that the voltage division ratio corresponding to the central click portion of the variable resistor R3 described in the first embodiment is realized by switching the transistor Q1 . At this duty width,
It is assumed that the high frequency amplifier 1 and the local oscillator 7 have been subjected to tracking adjustment.
第５図に希望周波数を選局する場合のフローを
示す。まず、選局操作部１２を操作することによ
り、85.1MHzを受信するものとする。次に、
85.2MHzを受信してみて、そこに放送電波がある
かどうかを入力電界強度信号と、FM検波器４で
検出されるセンサー電位とで判断する。同じよう
に、0.1MHzの間隔で、86.1MHzまで調べる。も
し85.2MHz〜86.1MHzまでの間に放送がないとき
は、今度は、下側の周波数について84.1MHz〜
85.0MHzの間に放送がないかどうかを調べる。も
し両方ともになかつたら、85.1MHzを受信する。
この場合のデユーテイ幅は、高周波増幅器１と局
部発振器７とをトラツキング調整をしたデユーテ
イ幅とする。仮に85.2MHz〜86.1MHzの間、もし
くは84.1MHz〜85.0MHzの間に放送があつた場合
には、検出されたた放送周波数を前者のときは
F2とし、後者のときはF3とし、85.1MHzをF1とす
れば、F2が検出されたときには、F4＝F2＋（F2−
F1）を、F3が検出されたときにはF5＝F3−（F1−
F3）を調べる。F4あるいはF5に放送がなかつた
場合には相互変調妨害は発生しないので、単に
85.1MHzを受信する。反対にF4が検出されたら、
Ｄ／Ａ変換器１５の出力パルスのデユーテイを大
きくし、高周波増幅器１の同調特性を85.1MHzよ
りも下側の周波数に合わせて、相互変調妨害の発
生を少なくする。又F5が検出された場合にはデ
ユーテイを小さくして、高周波増幅器１の同調特
性を85.1MHzよりも上側の周波数に合わせるよう
にする。 FIG. 5 shows the flow when selecting a desired frequency. First, it is assumed that 85.1MHz is received by operating the channel selection operation section 12. next,
It receives 85.2 MHz and determines whether there is a broadcast radio wave there using the input field strength signal and the sensor potential detected by the FM detector 4. In the same way, check up to 86.1MHz at 0.1MHz intervals. If there is no broadcast between 85.2MHz and 86.1MHz, then the lower frequency will be broadcast between 84.1MHz and 86.1MHz.
Check if there are any broadcasts between 85.0MHz. If you don't have both, you will receive 85.1MHz.
The duty width in this case is the duty width obtained by tracking adjustment of the high frequency amplifier 1 and the local oscillator 7. If there is a broadcast between 85.2MHz and 86.1MHz or between 84.1MHz and 85.0MHz, the detected broadcast frequency will be
F 2 , in the latter case F 3 , and 85.1MHz as F 1 , then when F 2 is detected, F 4 = F 2 + (F 2 −
F 1 ), and when F 3 is detected, F 5 = F 3 − (F 1 −
F 3 ). If there is no broadcast on F 4 or F 5 , intermodulation interference will not occur, so simply
Receives 85.1MHz. On the other hand, if F 4 is detected,
The duty of the output pulse of the D/A converter 15 is increased and the tuning characteristic of the high frequency amplifier 1 is adjusted to a frequency lower than 85.1 MHz to reduce the occurrence of intermodulation interference. Further, when F 5 is detected, the duty is reduced to adjust the tuning characteristic of the high frequency amplifier 1 to a frequency above 85.1 MHz.
本発明の特徴は、相互変調妨害信号の有無を自
動的に検知して高周波増幅器の同調特性を、自動
的に相互変調妨害の小さい方へ移動することがで
きる点にあり、又相互変調妨害信号の信号強度を
極め細かく測定することができるので、妨害信号
の強度に応じて高周波増幅器の同調特性をずらす
度合を変えることも簡単にできる。更に、従来相
互変調妨害をおさえるためには高周波増幅器の同
調回路連数を多くしていたものを、少ない同調回
路連数で同等の相互変調妨害特性を実現すること
ができる。 A feature of the present invention is that the presence or absence of an intermodulation interference signal can be automatically detected and the tuning characteristic of a high frequency amplifier can be automatically moved to the side where the intermodulation interference is smaller. Since the signal strength of the interfering signal can be measured extremely precisely, it is also possible to easily change the degree to which the tuning characteristics of the high-frequency amplifier are shifted depending on the strength of the interfering signal. Furthermore, whereas conventional methods for suppressing intermodulation interference have required increasing the number of tuning circuits in a high-frequency amplifier, it is now possible to achieve the same intermodulation interference characteristics with a smaller number of tuning circuits.
なお、この実施例において、希望受信周波数を
選局する場合に、中間周波増幅器３で得られる入
力電界強度信号が最大となるようにＤ／Ａ変換器
１５の出力パルスのデユーテイをもつていくこと
により高周波増幅器１の同調特性を最適点にする
ことができる。 In this embodiment, when selecting a desired receiving frequency, the duty of the output pulse of the D/A converter 15 is set so that the input electric field strength signal obtained by the intermediate frequency amplifier 3 is maximized. Accordingly, the tuning characteristics of the high frequency amplifier 1 can be brought to the optimum point.
このようにすると、高周波増幅器１と局部発振
器７はトラツキング調整をする必要がなくなる。
又高周波増幅器と局部発振器の温度特性や耐湿特
性に起因する同調特性のずれは発生せず、温度特
性や耐湿特性から解放される。更に、高周波増幅
器と局部発振器のトラツキング調整が不要なため
に、同調回路のコイルとコンデンサは可変型でな
く固定型でよく、又同調回路は無調整とすること
ができる。 In this way, the high frequency amplifier 1 and the local oscillator 7 do not need to perform tracking adjustment.
Furthermore, deviations in tuning characteristics due to temperature characteristics and moisture resistance characteristics of the high frequency amplifier and local oscillator do not occur, and the device is freed from temperature characteristics and moisture resistance characteristics. Furthermore, since tracking adjustment of the high frequency amplifier and local oscillator is not required, the coil and capacitor of the tuning circuit may be fixed rather than variable, and the tuning circuit can be left unadjusted.
第１図は、従来のシンセサイザー方式による受
信機の一例を示すブロツク図、第２図は、本発明
に係るシンセサイザー方式による受信機の第１の
実施例を示すブロツク図、第３図は、同調電圧特
性曲線図、第４図は、本発明に係るシンセサイザ
ー方式による受信機の第２の実施例を示すブロツ
ク図、第５図は、第４図に示された受信機におけ
る選局フローを示すフローチヤートである。
１……高周波増幅器、２……ミキサー、３……
中間周波増幅器、４……FM検波器、５……マル
チプレツクス、６……低周波増幅器、７……局部
発振器、８……プログラム分圧器、９……位相比
較器、１０……基準周波数発振器、１１……ロー
パスフイルタ、１２……操作部、R1，R2，R3…
…分圧抵抗、Q1……トランジスタ、１３……
Ａ／Ｄ変換器、１４……マイクロコンピユータ、
１５……Ｄ／Ａ変換器。
FIG. 1 is a block diagram showing an example of a receiver using a conventional synthesizer method, FIG. 2 is a block diagram showing a first embodiment of a receiver using a synthesizer method according to the present invention, and FIG. A voltage characteristic curve diagram, FIG. 4 is a block diagram showing a second embodiment of a receiver using a synthesizer method according to the present invention, and FIG. 5 shows a channel selection flow in the receiver shown in FIG. 4. It is a flowchart. 1... High frequency amplifier, 2... Mixer, 3...
Intermediate frequency amplifier, 4...FM detector, 5...Multiplex, 6...Low frequency amplifier, 7...Local oscillator, 8...Program voltage divider, 9...Phase comparator, 10...Reference frequency oscillator , 11...Low pass filter, 12...Operation unit, R1 , R2 , R3 ...
...Voltage dividing resistor, Q 1 ...Transistor, 13...
A/D converter, 14...microcomputer,
15...D/A converter.
Claims (1)
低域ろ波器とからなるPLL回路で構成した局部
発振回路と、上記低域ろ波器の出力を分圧する可
変分圧器と、可変分圧器の出力によつて同調を行
なう高周波増幅器とによつて、上記可変分圧器の
分圧比を可変することにより上記高周波増幅器の
同調特性を、局部発振器の同調特性と関係なく独
立に可変することを特徴とする受信機。 ２ 電圧制御発振器、可変分圧器、位相比較器、
低域ろ波器とからなるPLL回路で構成した局部
発振器と、上記低域ろ波器の出力を外部からの可
変デユーテイパルスでスイツチングし、その出力
を低域ろ波することで上記局部発振器の同調電圧
を分圧する可変分圧回路と、上記可変分圧回路の
出力で同調特性が制御される高周波増幅器と、高
周波信号を中間周波信号に変換する混合器と、中
間周波信号を増幅する中間周波増幅器と、中間周
波増幅器の各増幅段から検出される入力電界強度
信号を２進信号に変換するＡ／Ｄ変換器と、上記
Ａ／Ｄ変換器を制御しかつPLL回路の可変分圧
器の分周比を制御するマイクロコンピユータ部
と、上記マイクロコンピユータ部で制御され、２
進信号を可変デユーテイパルスに変換するＤ／Ａ
変換器とにおいて、一局の選局について、PLL
回路の可変分周器の分周比を希望受信周波数に対
する分周比より可変し、中間周波増幅器から得ら
れる入力電界強度信号をＡ／Ｄ変換器にて２進化
し、この２進化信号を、マイクロコンピユータ部
にて演算することによつて、希望受信周波数に対
する相互変調妨害信号の有無あるいは強弱を判定
し、上記Ｄ／Ａ変換器の出力パルスのデユーテイ
を可変することにより、上記高周波増幅器の同調
特性を、本来の希望受信周波数の上側の周波数あ
るいは下側の周波数に切替えることにより、相互
変調妨害を低減することを特徴とする受信機。 ３ 電圧制御発振器、可変分圧器、位相比較器、
低域ろ波器とからなるPLL回路で構成した局部
発振器と、上記低域ろ波器の出力を外部からの可
変デユーテイパルスでスイツチングし、その出力
を低域ろ波することで上記局部発振器の同調電圧
を分圧する可変分圧回路と、上記可変分圧回路の
出力で同調特性が制御される高周波増幅器と、高
周波信号を中間周波信号に変換する混合器と、中
間周波信号を増幅する中間周波増幅器と、中間周
波増幅器の各増幅段から検出される入力電界強度
信号を２進信号に変換するＡ／Ｄ変換器と、上記
Ａ／Ｄ変換器を制御しかつPLL回路の可変分圧
器の分周比を制御するマイクロコンピユータ部
と、上記マイクロコンピユータ部で制御され、２
進信号を可変デユーテイパルスに変換するＤ／Ａ
変換器とにおいて、一局の選局について、上記中
間周波増幅器から得られる入力電界強度信号が最
大となるように、上記Ｄ／Ａ変換器の出力パルス
のデユーテイを種々に変化し上記高周波増幅器の
同調特性が受信周波数に対し最適となるようにし
たことを特徴とする受信機。[Claims] 1. Voltage controlled oscillator, variable frequency divider, phase comparator,
A local oscillation circuit consisting of a PLL circuit consisting of a low-pass filter, a variable voltage divider that divides the output of the low-pass filter, and a high-frequency amplifier that performs tuning by the output of the variable voltage divider. A receiver characterized in that by varying the voltage division ratio of the variable voltage divider, the tuning characteristics of the high frequency amplifier can be varied independently regardless of the tuning characteristics of the local oscillator. 2 Voltage controlled oscillator, variable voltage divider, phase comparator,
A local oscillator is configured with a PLL circuit consisting of a low-pass filter, and the output of the low-pass filter is switched by an external variable duty pulse, and the output is low-pass filtered to tune the local oscillator. A variable voltage divider circuit that divides voltage, a high frequency amplifier whose tuning characteristics are controlled by the output of the variable voltage divider circuit, a mixer that converts a high frequency signal into an intermediate frequency signal, and an intermediate frequency amplifier that amplifies the intermediate frequency signal. , an A/D converter that converts the input field strength signal detected from each amplification stage of the intermediate frequency amplifier into a binary signal, and a frequency divider of a variable voltage divider of the PLL circuit that controls the A/D converter. a microcomputer section that controls the ratio; and a microcomputer section that controls the ratio;
D/A that converts a forward signal into a variable duty pulse
When selecting a single station with a converter, PLL
The frequency division ratio of the variable frequency divider of the circuit is varied from the frequency division ratio for the desired reception frequency, the input electric field strength signal obtained from the intermediate frequency amplifier is converted into a binary signal by an A/D converter, and this binary coded signal is By calculating in the microcomputer section, the presence or absence or strength of the intermodulation interference signal with respect to the desired receiving frequency is determined, and by varying the duty of the output pulse of the D/A converter, the high frequency amplifier is tuned. A receiver characterized in that intermodulation interference is reduced by switching characteristics to a frequency above or below an original desired reception frequency. 3 Voltage controlled oscillator, variable voltage divider, phase comparator,
A local oscillator is configured with a PLL circuit consisting of a low-pass filter, and the output of the low-pass filter is switched by an external variable duty pulse, and the output is low-pass filtered to tune the local oscillator. A variable voltage divider circuit that divides voltage, a high frequency amplifier whose tuning characteristics are controlled by the output of the variable voltage divider circuit, a mixer that converts a high frequency signal into an intermediate frequency signal, and an intermediate frequency amplifier that amplifies the intermediate frequency signal. , an A/D converter that converts the input field strength signal detected from each amplification stage of the intermediate frequency amplifier into a binary signal, and a frequency divider of a variable voltage divider of the PLL circuit that controls the A/D converter. a microcomputer section that controls the ratio; and a microcomputer section that controls the ratio;
D/A that converts a forward signal into a variable duty pulse
In the converter, the duty of the output pulse of the D/A converter is varied in order to maximize the input field strength signal obtained from the intermediate frequency amplifier for one station selection. A receiver characterized in that its tuning characteristics are optimized for the receiving frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170175A JPS5871736A (en) | 1981-10-26 | 1981-10-26 | Receiving machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170175A JPS5871736A (en) | 1981-10-26 | 1981-10-26 | Receiving machine |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5871736A JPS5871736A (en) | 1983-04-28 |
| JPH0254705B2 true JPH0254705B2 (en) | 1990-11-22 |
Family
ID=15900078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56170175A Granted JPS5871736A (en) | 1981-10-26 | 1981-10-26 | Receiving machine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5871736A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58173943U (en) * | 1982-05-17 | 1983-11-21 | パイオニア株式会社 | superheterodyne receiver |
| JPS5939538U (en) * | 1982-09-06 | 1984-03-13 | 山水電気株式会社 | electronically tuned receiver |
| JPS61195118U (en) * | 1985-05-13 | 1986-12-05 |
-
1981
- 1981-10-26 JP JP56170175A patent/JPS5871736A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5871736A (en) | 1983-04-28 |
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