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JPH02211055A - Abnormal operation detecting circuit of dc/dc converter - Google Patents

Abnormal operation detecting circuit of dc/dc converter

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Publication number
JPH02211055A
JPH02211055A JP3016589A JP3016589A JPH02211055A JP H02211055 A JPH02211055 A JP H02211055A JP 3016589 A JP3016589 A JP 3016589A JP 3016589 A JP3016589 A JP 3016589A JP H02211055 A JPH02211055 A JP H02211055A
Authority
JP
Japan
Prior art keywords
voltage
circuit
load
signal
load voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3016589A
Other languages
Japanese (ja)
Inventor
Noboru Abe
安倍 昇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to JP3016589A priority Critical patent/JPH02211055A/en
Publication of JPH02211055A publication Critical patent/JPH02211055A/en
Pending legal-status Critical Current

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  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To eliminate the limits unabling to detect abnormalities by monitoring an error voltage of a load voltage controlling circuit to detect load voltage abnormalities. CONSTITUTION:A DC power supply 1 is switched by a transistor 3, and it is boosted rectified and smoothed by means of a transformer 16 to supply to a load 12. In case an overcurrent is supplied, an abnormal current is detected by resistance 24 to hang down the load voltage by narrowing the width of a pulse. An error signal of a shunt regulator 9 in that time is voltage increasing signal because of lack of the load voltage, but a current of a photo-coupler 7 of the signal current reaches zero because of not rising of the load voltage. The signal current is detected by resistance 22, and a transistor 4 is turned OFF. According to the constitution, a capacitor 15 is charged through resistance 23, and when it reaches a prescribed voltage after the elapse of a certain time, a signal is transmitted a controlling circuit 11 through the resistance 23, and the load voltage is cut off.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、コンピュータなどに必要とするDC(直流)
電圧に、他の非安定のDC電圧より変換して安定化する
D C/D Cコンバータの異常動作検出回路に関する
ものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to DC (direct current) required for computers, etc.
The present invention relates to an abnormal operation detection circuit for a DC/DC converter that converts and stabilizes an unstable DC voltage into a voltage.

〔従来の技術〕[Conventional technology]

従来(第4図のように)非安定DC1tif*1をパワ
ートランジスタ3によりスイッチングしてそのパルス電
力をトランス16により絶縁するとともに電圧を変換し
て、ダイオード5により整流してコンデンサ13で平滑
したDC電圧を負荷12に供給するよう接続していた。
Conventionally (as shown in Fig. 4), an unstable DC 1tif*1 is switched by a power transistor 3, its pulse power is insulated by a transformer 16, and the voltage is converted, rectified by a diode 5, and smoothed by a capacitor 13. It was connected to supply voltage to the load 12.

負荷12の電圧を安定化するために、抵抗18と19で
電圧検出して、内部に基準電圧をもちその電圧を比較し
てその誤差を増幅するところのシャントレギュレータに
より、誤差電流信号を絶縁して伝達するホトカブラ17
で制御回路11の帰還(フィードバック)端子FBに送
る。
In order to stabilize the voltage of the load 12, the voltage is detected by resistors 18 and 19, and the error current signal is isolated using a shunt regulator that has an internal reference voltage and compares the voltages and amplifies the error. Photocoupler 17
and sends it to the feedback terminal FB of the control circuit 11.

ここで、制御回路11の概略動作を説明する。Here, the general operation of the control circuit 11 will be explained.

端子RfとCfに接続される抵抗21とコンデンサ14
によって決定される固有の周波数の三角波発振回路部を
もち、その三角波電圧と、端子FB信号電圧を比較する
ことによりFB倍信号固有周波数でのパルス巾変調(P
WM)されたパルス信号に変換して端子OUTより出力
する。端子OCは固有の低電圧をこえようとする信号を
入れることにより前記パルス巾を小さくすることで、端
子FBに関係なく過大電流を防止するための過電流垂下
保護回路の検出端子である。端子Ovは、異常時にきん
急しゃ断するための端子で、−度しゃ断信号を入れると
、その信号をとめても、端子VccにDC電源2が印加
されている間は、しゃ断状態を保持している。
A resistor 21 and a capacitor 14 connected to terminals Rf and Cf
It has a triangular wave oscillation circuit section with a unique frequency determined by the pulse width modulation (P
WM) into a pulse signal and output it from the terminal OUT. Terminal OC is a detection terminal of an overcurrent droop protection circuit that prevents excessive current regardless of terminal FB by inputting a signal that tends to exceed a specific low voltage and thereby reducing the pulse width. Terminal Ov is a terminal for abruptly shutting off the circuit in the event of an abnormality. When a -degree cutoff signal is input, the cutoff state is maintained even if the signal is stopped while DC power supply 2 is applied to terminal Vcc. There is.

第4図では、定電圧ダイオードlOと抵抗20からなる
過電圧検出回路かあるいは、トランジスタ43と44と
定電圧ダイオード45とダイオード42とコンデンサ5
0と抵抗46と47と48と49からなる不足電圧検出
回路の動作の異常時に、ホトカプラ8を通して制御回路
11の端子OVに信号を送り負荷に供給している電圧を
しゃ断する。抵抗24によりトランジスタ3のエミッタ
電流を検出することで、負荷12に異常な過電流が流れ
ようとする時には、制御回路11の端子OCの働きによ
り、過電流が流れないよう負荷電圧を垂下させて保護す
るため、この時の異常な負荷条件によって前記不足電圧
回路の働きで、抵抗46とコンデンサ50の時定数以上
長い時間異常状態が続くと負荷電圧をしゃ断して、トラ
ンス16やダイオード5などの部品の異常発熱による危
険より保護していた。
In FIG. 4, an overvoltage detection circuit consisting of a constant voltage diode lO and a resistor 20, or transistors 43 and 44, a constant voltage diode 45, a diode 42, and a capacitor 5 is shown.
When an undervoltage detection circuit consisting of resistors 46, 47, 48 and 49 malfunctions, a signal is sent to the terminal OV of the control circuit 11 through the photocoupler 8 to cut off the voltage being supplied to the load. By detecting the emitter current of the transistor 3 using the resistor 24, when an abnormal overcurrent is about to flow into the load 12, the terminal OC of the control circuit 11 causes the load voltage to drop to prevent the overcurrent from flowing. For protection, if the abnormal load condition continues for a longer time than the time constant of the resistor 46 and the capacitor 50, the undervoltage circuit will cut off the load voltage and disconnect the transformer 16, diode 5, etc. Protected from danger caused by abnormal heat generation of parts.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前記不足電圧検出回路の動作点は、定電圧ダイオード4
5により設定される固有の値であり、抵抗18と19と
シャントレギュレータ9などの設定した出力電圧値とは
、別に設定しなければならず、個々の部品のバラツキも
含めて、正常動作時出力電圧より十分なマージンを見た
値に設定する必要があった。
The operating point of the undervoltage detection circuit is the constant voltage diode 4.
5, and must be set separately from the output voltage values set by resistors 18 and 19 and shunt regulator 9, etc., and the output voltage during normal operation, including variations in individual parts. It was necessary to set the value with sufficient margin from the voltage.

さらに、出力電圧を可変する必要がある場合の、不足電
圧検出回路の動作設定値は、可変下限条件より十分なマ
ージンを見る必要があったため、負荷の異常時の条件に
よっては、過電流検出して負荷電圧51を垂下させても
、不足電圧検出値54までの異常検出不能範囲では、し
ゃ断することなく垂下したまま異常動作しつづけていた
Furthermore, when it is necessary to vary the output voltage, the operating setting value of the undervoltage detection circuit needs to have a sufficient margin from the variable lower limit condition. Even if the load voltage 51 was allowed to drop, the abnormal operation continued without being cut off in the abnormality detection impossible range up to the undervoltage detection value 54.

本発明の目的は、前記異常検出不能範囲をなくすことで
、より安全なり C/D Cコンバータを提供すること
である。
An object of the present invention is to provide a safer C/DC converter by eliminating the abnormality detection range.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、負荷電圧を検出するのではなく、負荷電圧を
検出してその電圧を安定化させるための制御信号である
ところの誤差信号の異常を検出することで、前記問題点
を解決させるものである。
The present invention solves the above problem by not detecting the load voltage, but detecting an abnormality in the error signal, which is a control signal for detecting the load voltage and stabilizing the voltage. It is.

すなわち本発明は、DC電源とトランスの一次巻線とト
ランジスタなどのスイッチング素子が直列に接続されて
いて、トランスの2次巻線にダイオードとコンデンサな
どによって整流されたDC電圧を負荷に供給できるよう
に接続して、負荷電圧を検出し基準電圧との比較増幅回
路と、その誤差信号をパルス巾に変換する回路と、前記
誤差信号の値が正常値であるか判定する回路と、前記ス
イッチング素子をしゃ断させる回路と、前記正常値判定
回路が正常でない場合に時間遅れ機能を通り前記しゃ断
回路に接続したことを特徴とするD C/D Cコンバ
ータの異常動作検出回路である。
In other words, the present invention has a DC power source, a transformer's primary winding, and a switching element such as a transistor connected in series, and a DC voltage rectified by a diode, a capacitor, etc. to the transformer's secondary winding can be supplied to the load. a circuit that detects the load voltage and compares it with a reference voltage; a circuit that converts the error signal into a pulse width; a circuit that determines whether the value of the error signal is a normal value; and the switching element. This is an abnormal operation detection circuit for a DC/DC converter, characterized in that the circuit is connected to the cutoff circuit through a time delay function when the normal value determination circuit is not normal.

〔実施例〕〔Example〕

第1図は、本発明の一実施例を示す。 FIG. 1 shows one embodiment of the invention.

パワートランジスタでパルス電圧にスイッチングして、
シャントレギュレータ9と制御回路11とダイオード5
、コンデンサ13などで、安定化した電圧に変換して負
荷に供給するところは、従来の第4図と同じである。
Switching to pulse voltage with a power transistor,
Shunt regulator 9, control circuit 11 and diode 5
, a capacitor 13, etc., to convert it into a stabilized voltage and supply it to the load, which is the same as in the conventional FIG. 4.

第5図の過電流検出値まで負荷の異常で電流が流れた場
合は、抵抗24より異常電流を検出して、パルス巾をせ
ばめて負荷電圧51を垂下させる。
If the current flows up to the overcurrent detection value shown in FIG. 5 due to an abnormality in the load, the abnormal current is detected by the resistor 24, and the pulse width is narrowed to cause the load voltage 51 to drop.

この時のシャントレギュレータ9の誤差信号は、負荷電
圧不足のため電圧上昇信号になるが、負荷電圧が上昇し
ないため、その信号電流のホトカブラフの電流はゼロ(
負荷電圧が最大になる信号よりさらに上昇して上限値)
になってしまうため、その信号電流を抵抗22で検出し
て、トランジスタ4がオフする。抵抗23よりコンデン
サ15を充電して、それらによって定められるある時間
以上その異常状態がつづくと、ダイオード6を通して制
御回路11の端子Ovに信号を送り負荷電圧をしゃ断す
る。
At this time, the error signal of the shunt regulator 9 becomes a voltage increase signal due to insufficient load voltage, but since the load voltage does not increase, the current of the photocoupler bluff of that signal current is zero (
The load voltage rises further from the maximum signal to reach the upper limit)
Therefore, the signal current is detected by the resistor 22 and the transistor 4 is turned off. The capacitor 15 is charged by the resistor 23, and if the abnormal state continues for a certain period of time determined by the resistor 23, a signal is sent to the terminal Ov of the control circuit 11 through the diode 6 to cut off the load voltage.

このため、従来方式とはちがい第5図の異常検出不能範
囲58は存在しない。
Therefore, unlike the conventional method, the abnormality undetectable range 58 shown in FIG. 5 does not exist.

また、第2図のように、抵抗20と定電圧ダイオード1
0とホトカブラ8とダイオード6を除いても、負荷電圧
安定制御回路の異常時たとえば、抵抗17の断線時など
により異常過電圧時でも、過電圧検出は不能であるが、
ホトカブラ7の電流異常を検出するため、長時間の過電
圧がつづくことなくしゃ断される。これは従来の不足電
圧検出方式では不可能であり、過電圧時の2重保護とな
り、仮りに過電圧検出回路が故障していたとしても、安
全が保障される。
Also, as shown in Fig. 2, a resistor 20 and a constant voltage diode 1 are connected.
Even if 0, photocoupler 8, and diode 6 are removed, overvoltage detection is not possible when the load voltage stabilization control circuit is abnormal, such as when the resistor 17 is disconnected.
Since an abnormality in the current of the photocoupler 7 is detected, the overvoltage is cut off without continuing for a long time. This is not possible with conventional undervoltage detection methods, and provides double protection in the event of overvoltage, ensuring safety even if the overvoltage detection circuit fails.

第3図は、第1図と第2図と制御回路がちがうが動作は
、まったく同じ内容で、本発明は、抵抗30とコンデン
サ33と定電圧40の部分である。
Although the control circuit in FIG. 3 is different from that in FIGS. 1 and 2, the operation is exactly the same, and the present invention involves the resistor 30, capacitor 33, and constant voltage 40.

制御回路35の端子2の電圧が正常時は、ある定められ
た電圧範囲内にあるのに対して、負荷の異常などの過電
流垂下時や、部品故障時の異常時は、DC電圧2の値ま
で異常上昇するため、その電圧が抵抗30とコンデンサ
33によって定められる時間以上つづくと、定電圧ダイ
オード40を通してサイリスタ38のゲートに信号を送
り、サイリっても、ホトカブラ8の過電圧動作時の動作
が遅れるだけで、基本的内容は同じである。
When the voltage at terminal 2 of the control circuit 35 is normal, it is within a certain voltage range, but when there is an overcurrent droop due to an abnormality in the load, or an abnormality due to a component failure, the voltage at terminal 2 of the control circuit 35 is within a certain voltage range. If the voltage continues to exceed the time determined by the resistor 30 and capacitor 33, a signal is sent to the gate of the thyristor 38 through the constant voltage diode 40, and even if the voltage exceeds the voltage limit, the photocoupler 8 will not operate during overvoltage operation. The basic content is the same, only with a delay.

また、第1図、第2図、第3図とも、フライバックコン
バータで示しているが、他にフォアードコンバータや、
プッシュプルコンバータや、ハーフブリッジコンバータ
や、フルブリッジコンバータや、ダブルスイッチフォア
ードコンバータでも同様の効果をえられることはあきら
かである。
In addition, although the flyback converter is shown in Figures 1, 2, and 3, there are also forward converters,
It is obvious that similar effects can be obtained with push-pull converters, half-bridge converters, full-bridge converters, and double-switch forward converters.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、従来の不足電圧検出方式とはちがい、
部品のバラツキなどを考え設計したり調整する必要もな
く、効果の大きい異常動作保護が可能になり、製造時の
作業性が改善されるだけでなく、安全性の高いD C/
D Cコンバータを作ることができる。
According to the present invention, unlike conventional undervoltage detection methods,
There is no need to design or adjust parts considering variations, etc., and it becomes possible to provide highly effective abnormal operation protection, which not only improves workability during manufacturing but also provides highly safe DC/DC.
You can make a DC converter.

また、DC電圧lの異常低下により負荷電圧が負荷の動
作に影響しない程度小さい電圧降下した場合も検出する
ことができ、入力不足電圧異常からも保護できる。
Further, it is also possible to detect a case where the load voltage drops to a small enough extent that it does not affect the operation of the load due to an abnormal drop in the DC voltage l, and it is also possible to protect against input undervoltage abnormalities.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第2図と第3図は本発明の一実施例を示す回路
図である。 第4図は、従来の回路図である。 第5図は、負荷の電圧・電流特性図である。 1と2はDC電源、3と4と37と43と44はトラン
ジスタ、5と6と42はダイオード、7と8はホトカブ
ラ、9はシャントレギュレータ、10と39と40と4
5は定電圧ダイオード、11と35は制御回路、12は
負荷、13と14と15と32と33と50はコンデン
サ、16はトランス、17と18と19と20と21と
22と23と24と25と26と27と28と29と3
0と31と46と47と48と49は抵抗、34と36
は誤差増幅回路、38はサイリスク、51は負荷電圧、
52は負荷電流、53は過電流検出値、54は不足電圧
検出値、55は正常時電圧値、56は過電圧検出値、5
7は正常時電流上限、58は異常検出不能範囲である。 第 図 第 図 第 図 第 図
1, 2, and 3 are circuit diagrams showing one embodiment of the present invention. FIG. 4 is a conventional circuit diagram. FIG. 5 is a voltage/current characteristic diagram of the load. 1 and 2 are DC power supplies, 3, 4, 37, 43 and 44 are transistors, 5, 6 and 42 are diodes, 7 and 8 are photocouplers, 9 is a shunt regulator, 10, 39, 40 and 4
5 is a constant voltage diode, 11 and 35 are a control circuit, 12 is a load, 13, 14, 15, 32, 33, and 50 are capacitors, 16 is a transformer, 17, 18, 19, 20, 21, 22, 23, and 24 and 25 and 26 and 27 and 28 and 29 and 3
0, 31, 46, 47, 48 and 49 are resistors, 34 and 36
is an error amplifier circuit, 38 is a cyrisk, 51 is a load voltage,
52 is load current, 53 is overcurrent detection value, 54 is undervoltage detection value, 55 is normal voltage value, 56 is overvoltage detection value, 5
7 is the normal current upper limit, and 58 is the range where abnormality cannot be detected. Figure Figure Figure Figure Figure

Claims (1)

【特許請求の範囲】[Claims] DC電源とトランスの一次巻線とトランジスタなどのス
イッチング素子が直列に接続されていて、トランスの2
次巻線にダイオードとコンデンサによって整流されたD
C電圧を負荷に供給できるように接続して、負荷電圧を
検出し基準電圧との比較増幅回路と、その誤差信号をパ
ルス巾に変換する回路と、前記誤差信号の値が正常値で
あるか判定する回路と、前記スイッチング素子をしゃ断
させる回路と、前記正常値判定回路が正常でない場合に
時間遅れ機能を通り前記しゃ断回路に接続したことを特
徴とするDC/DCコンバータの異常動作検出回路。
The DC power supply, the primary winding of the transformer, and switching elements such as transistors are connected in series, and the two
D rectified by a diode and capacitor in the next winding
A circuit that connects the C voltage to the load, detects the load voltage, compares it with the reference voltage, and amplifies it, a circuit that converts the error signal into a pulse width, and checks whether the value of the error signal is a normal value. An abnormal operation detection circuit for a DC/DC converter, comprising: a circuit for determining, a circuit for cutting off the switching element, and a circuit connected to the cutting circuit through a time delay function when the normal value judgment circuit is not normal.
JP3016589A 1989-02-09 1989-02-09 Abnormal operation detecting circuit of dc/dc converter Pending JPH02211055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3016589A JPH02211055A (en) 1989-02-09 1989-02-09 Abnormal operation detecting circuit of dc/dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3016589A JPH02211055A (en) 1989-02-09 1989-02-09 Abnormal operation detecting circuit of dc/dc converter

Publications (1)

Publication Number Publication Date
JPH02211055A true JPH02211055A (en) 1990-08-22

Family

ID=12296142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3016589A Pending JPH02211055A (en) 1989-02-09 1989-02-09 Abnormal operation detecting circuit of dc/dc converter

Country Status (1)

Country Link
JP (1) JPH02211055A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006111428A1 (en) * 2005-04-21 2006-10-26 SIEMENS AKTIENGESELLSCHAFT öSTERREICH Method for operating an inverter comprising an upstream step-up device
US8717781B2 (en) 2011-01-28 2014-05-06 Rohm Co., Ltd. Direct current/direct current converter, and power supply apparatus and electronic device using the same
US8724346B2 (en) 2010-12-14 2014-05-13 Rohm Co., Ltd. DC/DC converter, and power supply and electronic device using the same
US9106140B2 (en) 2012-07-05 2015-08-11 Rohm Co., Ltd. DC/DC converter
US9124184B2 (en) 2012-07-04 2015-09-01 Rohm Co., Ltd. DC/DC converter
US9190916B2 (en) 2012-09-11 2015-11-17 Rohm Co., Ltd. DC/DC converter, control circuit and control method thereof, power supply, power adapter and electronic apparatus using the same
US9231483B2 (en) 2012-07-27 2016-01-05 Rohm Co., Ltd. DC/DC converter
US9252669B2 (en) 2011-07-26 2016-02-02 Rohm Co., Ltd. AC/DC converter, and AC power adapter and electronic apparatus using the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006111428A1 (en) * 2005-04-21 2006-10-26 SIEMENS AKTIENGESELLSCHAFT öSTERREICH Method for operating an inverter comprising an upstream step-up device
US8310851B2 (en) 2005-04-21 2012-11-13 Siemens Aktiengesellschaft Method for operating an inverter having a step-up device connected upstream
US8724346B2 (en) 2010-12-14 2014-05-13 Rohm Co., Ltd. DC/DC converter, and power supply and electronic device using the same
US8717781B2 (en) 2011-01-28 2014-05-06 Rohm Co., Ltd. Direct current/direct current converter, and power supply apparatus and electronic device using the same
US9252669B2 (en) 2011-07-26 2016-02-02 Rohm Co., Ltd. AC/DC converter, and AC power adapter and electronic apparatus using the same
US9124184B2 (en) 2012-07-04 2015-09-01 Rohm Co., Ltd. DC/DC converter
US9106140B2 (en) 2012-07-05 2015-08-11 Rohm Co., Ltd. DC/DC converter
US9231483B2 (en) 2012-07-27 2016-01-05 Rohm Co., Ltd. DC/DC converter
US9190916B2 (en) 2012-09-11 2015-11-17 Rohm Co., Ltd. DC/DC converter, control circuit and control method thereof, power supply, power adapter and electronic apparatus using the same

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