JPH02162407A - Control device - Google Patents
Control deviceInfo
- Publication number
- JPH02162407A JPH02162407A JP63317068A JP31706888A JPH02162407A JP H02162407 A JPH02162407 A JP H02162407A JP 63317068 A JP63317068 A JP 63317068A JP 31706888 A JP31706888 A JP 31706888A JP H02162407 A JPH02162407 A JP H02162407A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- variable frequency
- control
- correction
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Control Of Velocity Or Acceleration (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は制御装置に関し、特に可変周波発生手段を含
む制御装置の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control device, and particularly to an improvement of a control device including variable frequency generating means.
以下の説明においては可変周波発生手段としてＶＣＯ＜
可変周波発振器ニジａｒｉａｂｌｅ Ｆｒｅｑｕｅｎｃ
ｙ ０ｓｃｉｌｌａｔｏｒ）を用い、制御装置としてＰ
ＬＬ （位相同期回路： Ｐｈａｓｅ Ｌｏｃｋｅｄ
Ｌｏｏｐ）を例として示すが本発明の趣旨はこれに限定
されるものではない。In the following explanation, VCO<
variable frequency oscillator
y 0scillator) and P as the control device.
LL (Phase Locked)
Loop) is shown as an example, but the gist of the present invention is not limited thereto.
ところで、ＰＬＬの重要な構成要素であるｖＣＯは素子
によりばらつきがあり、又、電＃電圧等の使用環境によ
って変動することは周知である。By the way, it is well known that vCO, which is an important component of a PLL, varies depending on the device and also changes depending on the usage environment such as the voltage.
第２図はＶＣＯの制御入力に対する出力周波数の一例を
示したものである。同図においてａは設計中心となる特
性、ｂ及びＣはＶＣＯの特性がばらついた場合の特性を
示す、このような３種のＶＣＯを用いて所定の周波数１
０を得、ＰＬＬとして良好な動作を行わしめるには、Ｖ
ＣＯの制御入力としてはそれぞれＶＢ １ Ｖ＞ ＋
Ｖ（なる入力信号が必要となる。そこで、ＶＣＯの
特性変化を自動補正する方法として、例えば特開昭６２
−９７４２８号公報がある。即ち、第３図はその制御装
置の概要を示すブロック図であり、図において、１は制
御信号Ｃに応じて周波数の変化する可変周波数信号Ｄを
出力するＶＣＯ１２は可変周波数信号りと外部からの入
力信号Ａとの位相差を検出する位相比較回路、３は可変
周波数信号りの周波数の所定値からのずれを検出し補正
信号Ｅを出力する補正回路、４は加算器である。FIG. 2 shows an example of the output frequency with respect to the control input of the VCO. In the figure, a shows the characteristics that are the focus of the design, and b and C show the characteristics when the characteristics of the VCO vary.
In order to obtain 0 and perform good operation as a PLL, V
As the control input for CO, each VB 1 V> +
Therefore, as a method for automatically correcting the change in VCO characteristics, for example,
There is a publication No.-97428. That is, FIG. 3 is a block diagram showing an outline of the control device. In the figure, 1 indicates a VCO 12 which outputs a variable frequency signal D whose frequency changes according to a control signal C. A phase comparison circuit 3 detects a phase difference with the input signal A, a correction circuit 3 detects a deviation of the frequency of the variable frequency signal from a predetermined value and outputs a correction signal E, and 4 an adder.
次に動作について説明する。Next, the operation will be explained.
入力信号への不在時には位相比較ｎ２は誤差信号Ｂとし
て零を出力する。この時、ＶＣＯＩの信号りの周波数を
所定値ｒ０とする制御回路が構成され、信号りの周波数
はｆｏとなる。一方、信号へが入力されると信号りは所
定周波数ｆ０となっているのでＰＬＬとして入力信号Ａ
に同期した信号りが得られる。In the absence of the input signal, the phase comparator n2 outputs zero as the error signal B. At this time, a control circuit is configured to set the frequency of the VCOI signal to a predetermined value r0, and the frequency of the signal becomes fo. On the other hand, when the signal is input, the signal has a predetermined frequency f0, so the input signal A is used as a PLL.
You can get a signal synchronized with the
第４図は第３図の信号Ｂに対する信号りの特性を示した
ものである。即ち第２図におけるｖａ＋ｖｂ、ｖｃなる
補正信号が補正回路３により得られ、制御信号としては
単一の値（例えば零）にて所定の周波数ｆ、が得られる
。FIG. 4 shows the signal characteristics for signal B in FIG. That is, correction signals va+vb and vc in FIG. 2 are obtained by the correction circuit 3, and a predetermined frequency f is obtained as a control signal with a single value (for example, zero).
しかしながら第２図から明らかな様に、ｖｃ。 However, as is clear from FIG. 2, vc.
１の特性のばらつきにより制御入力に対する出力周波数
の変化が変動を受ける。即ち、従来の制御装置において
はＶＣＯＩの感度の変化は補正できておらず、これによ
り制御性に重大な障害をもたらす場合がある。The variation in the output frequency with respect to the control input is subject to fluctuations due to variations in the characteristics of the control input. That is, in the conventional control device, changes in the sensitivity of the VCOI cannot be corrected, and this may cause a serious problem in controllability.
本発明は上記従来方式による問題点を解消すべくなされ
たものであり、可変周波発生手段の感度の変化に対して
も安定である制御装置を提供することを目的とする。The present invention has been made to solve the problems with the above-mentioned conventional system, and it is an object of the present invention to provide a control device that is stable even against changes in the sensitivity of the variable frequency generating means.
この発明における制御装置は、速度誤差情報等の第１の
制御信号と補正信号との乗算を行い第２の制御信号を出
力する乗算手段と、第２の制御信号に応動して周波数の
変化する可変周波数信号を出力する可変周波発生手段と
、可変周波数信号と外部からの入力信号とにより速度誤
差情報等の第一の制御信号を生成する誤差検出手段と、
可変周波数信号の所定値からのずれを補正する補正信号
を生成する補正手段とを備えたものである。The control device according to the present invention includes a multiplier that multiplies a first control signal such as speed error information by a correction signal and outputs a second control signal, and a multiplier that changes the frequency in response to the second control signal. variable frequency generation means for outputting a variable frequency signal; error detection means for generating a first control signal such as speed error information from the variable frequency signal and an external input signal;
and a correction means for generating a correction signal for correcting deviation of the variable frequency signal from a predetermined value.
この発明においては、上述のように誤差検出手段と可変
周波発生手段との間に乗算手段を設け、誤差検出手段か
らの出力である第一の制御信号と補正信号とを乗じ、そ
の出力を第２の制御信号として可変周波発生手段に入力
するようにしたので、可変周波発生手段の感度ばらつき
、変動等を抑圧できる。In this invention, as described above, the multiplication means is provided between the error detection means and the variable frequency generation means, the first control signal which is the output from the error detection means is multiplied by the correction signal, and the output is multiplied by the first control signal and the correction signal. Since the second control signal is input to the variable frequency generating means, it is possible to suppress variations in sensitivity, fluctuations, etc. of the variable frequency generating means.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
本発明の主たる目的の１つは上述した如＜ＶＣＯの感度
を一定にすることにある。即ち、第４図に示したＶＣＯ
の特性ａ、ｂ、ｃを等価的にａのみとすれば良い、第１
図は本発明の一実施例による制御装置を示し、図におい
て、第３図と同一符号は同一部分を示し、５は補正信号
Ｅと位相誤差信号Ｂとの乗算を行なう乗算器である。こ
こでＶｃｏｉの入力信号Ｃの電圧Ｖｃに対する出力信号
りの周波数ｆｄを次式により表す。One of the main objects of the present invention is to make the sensitivity of the VCO constant as described above. That is, the VCO shown in FIG.
It is sufficient to equivalently set the characteristics a, b, and c to only a, the first
The figure shows a control device according to an embodiment of the present invention. In the figure, the same symbols as in FIG. 3 indicate the same parts, and 5 is a multiplier that multiplies the correction signal E and the phase error signal B. Here, the frequency fd of the output signal with respect to the voltage Vc of the input signal C of Vcoi is expressed by the following equation.
ｆ ｄ ＝Ｇ −Ｖ ｃ （Ｈｚ） −（１）Ｇ：ＶＣ
Ｏの感度
信号Ｈに対する信号りの周波数ｆｄは第４図に示した通
りであり、ｖ、ｗＱＶとなっている。即ち、ＶＣＯＩの
特性は信号Ｈの電圧■、に対し、ｆ ｄ ＝Ｇ ”
（’／ｓ、 ＋ Ｖｍ ） ＝Ｇ ’ Ｖｈ ＋Ｑ Ｈ
ｖ。f d =G −V c (Hz) −(1) G:VC
The frequency fd of the signal with respect to the sensitivity signal H of O is as shown in FIG. 4, and is v, wQV. That is, the characteristics of the VCOI are f d = G ” for the voltage of the signal H.
('/s, +Vm) =G'Vh +QH
v.
となっている、また感度Ｇは、
Ｇ −ｆ ｄ ／Ｖ ｃ （Ｈｚ ／ Ｖ） ＝（３）
と表され、補正信号Ｅは信号りが所定周波数ｆ０となる
電圧Ｖ、となっているので、
ｃ＝ｒａ／ｖｍ・・・（４）
と表し得る。 （２）、 ＋４１式より、ｆｄ＝
・ｖ、＋ｆ０ ・・・（５）Ｖｍ
となる、即ち電圧ｖｈに対するＶＣＯＩの感度Ｇｈは、
なる。The sensitivity G is as follows: G - f d /V c (Hz / V) = (3)
Since the correction signal E has a voltage V at which the signal has a predetermined frequency f0, it can be expressed as c=ra/vm (4). (2), +41 formula, fd=
・v, +f0 (5) Vm, that is, the sensitivity Gh of the VCOI to the voltage vh is as follows.
乗算器５には位相誤差信号Ｂと電圧ｖ１なる補正信号Ｅ
が入力されているので信号Ｂの電圧ｖ１・・・（２）
に対するｖ５は、
Ｖ、＝Ｖ、 ・■５・・・（７）
となる。第１の制御信号である信号Ｂの電圧■。The multiplier 5 receives the phase error signal B and the correction signal E which is the voltage v1.
is input, the voltage v5 of the signal B with respect to the voltage v1...(2) is V,=V, .■5...(7). Voltage ■ of signal B, which is the first control signal.
に対する可変周波数信号である信号りの周波数ｆｄは（
５） 、 （７）式より次の通りとなる。The frequency fd of the signal, which is a variable frequency signal, is (
5) From equation (7), it is as follows.
ｆｄ＝ ・ｖ、＋ｒ。fd= ・v, +r.
＝ｆ、 ・ｖ、＋ｒ、・・・（８）
即ち、ＶＣＯＩの特性にばらつき、変動等が発生しても
第１の制御信号に対する可変周波数信号の特性は一定と
なる。=f, ·v, +r, (8) That is, even if variations, fluctuations, etc. occur in the characteristics of the VCOI, the characteristics of the variable frequency signal with respect to the first control signal remain constant.
以上のように本発明によれば制御装置を速度誤差情報等
の第一の制御信号と補正信号との乗算を行い第２の制御
信号を出力する乗算手段と、第２の制御信号に応動して
周波数の変化する可変周波数信号を出力する可変周波発
生手段と、可変周波数信号と外部からの入力信号とによ
り速度誤差情報等の第１の制御信号を形成する誤差検出
手段と、可変周波数信号の所定値からのずれを補正する
補正信号を生成する補正手段とを備えるようにしたので
、可変周波発生手段のばらつき、変動等に対して安定し
た制御が行える効果がある。As described above, according to the present invention, the control device includes a multiplier that multiplies a first control signal such as speed error information by a correction signal and outputs a second control signal, and a multiplier that responds to the second control signal. a variable frequency generating means for outputting a variable frequency signal whose frequency changes with a change in frequency; an error detecting means for forming a first control signal such as speed error information from the variable frequency signal and an external input signal; Since the present invention includes a correction means for generating a correction signal for correcting a deviation from a predetermined value, it is possible to perform stable control against variations, fluctuations, etc. of the variable frequency generation means.
第１図は本発明の一実施例による制御装置を示すブロッ
ク図、第２図はＶＣＯの特性を示す図、第３図は従来方
式による制御装置の一例を示す図、第４図は第３図の制
御装置における制御信号に対する出力周波数の特性を示
す図である。
１・・・ＶＣＯ１２・・・位相比較器、３・・・補正回
路、４・・・加算器、５・・・乗算器。
なお図中同一符号は同−又は相当部分を示す。1 is a block diagram showing a control device according to an embodiment of the present invention, FIG. 2 is a diagram showing characteristics of a VCO, FIG. 3 is a diagram showing an example of a conventional control device, and FIG. 4 is a block diagram showing a control device according to an embodiment of the present invention. It is a figure which shows the characteristic of the output frequency with respect to a control signal in the control apparatus of a figure. 1... VCO12... Phase comparator, 3... Correction circuit, 4... Adder, 5... Multiplier. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
度誤差情報等の第１の制御信号を生成する誤差検出手段
と、 該第１の制御信号と補正信号との乗算を行い第２の制御
信号を出力する乗算手段と、 該第２の制御信号に応動して周波数の変化する上記可変
周波数信号を出力する可変周波発生手段と、 上記可変周波数信号の所定値からのずれを補正する上記
補正信号を生成する補正手段とを備えたことを特徴とす
る制御装置。(1) Error detection means that generates a first control signal such as speed error information based on a variable frequency signal and an external input signal, and a second control that multiplies the first control signal and a correction signal. a multiplier for outputting a signal; a variable frequency generating means for outputting the variable frequency signal whose frequency changes in response to the second control signal; and a correction for correcting deviation of the variable frequency signal from a predetermined value. A control device comprising: a correction means for generating a signal.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63317068A JPH02162407A (en) | 1988-12-15 | 1988-12-15 | Control device |
| US07/450,233 US5097219A (en) | 1988-12-15 | 1989-12-13 | Pll for controlling frequency deviation of a variable frequency oscillator |
| EP89313083A EP0377978B1 (en) | 1988-12-15 | 1989-12-14 | A PLL control apparatus |
| DE68923073T DE68923073T2 (en) | 1988-12-15 | 1989-12-14 | Control circuit for a PLL circuit. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63317068A JPH02162407A (en) | 1988-12-15 | 1988-12-15 | Control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02162407A true JPH02162407A (en) | 1990-06-22 |
Family
ID=18084068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63317068A Pending JPH02162407A (en) | 1988-12-15 | 1988-12-15 | Control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02162407A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7737800B2 (en) | 2007-01-09 | 2010-06-15 | Panasonic Corporation | Frequency modulation circuit |
-
1988
- 1988-12-15 JP JP63317068A patent/JPH02162407A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7737800B2 (en) | 2007-01-09 | 2010-06-15 | Panasonic Corporation | Frequency modulation circuit |
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