JPH0990000A - Eb tester having coordinate converting function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the positioning precision in the gaining of potential images in the same position of a good item and a defective item by storing the relative coordinate data of CAD data of a first LSI, and converting this data into an absolute coordinate data in loading to position a second LSI. SOLUTION: The SEM image (image obtained by scanning of electron beam EB) of a LSI chip A is positioned to a CAD data. The chip A is moved so that the EB is emitted to the observation range of the chip A to gain a potential image, and the relative coordinate data A1 on the CAD data is stored. The chip A is replaced by a LSI chip B, its SEM image is positioned to the CAD data, and a converted coordinate data Z2 in which the origin data of the relative coordinate on the CAD data is expressed by the absolute coordinate of an EB tester is stored. The stored data A1 is then read, and the chip B is moved to the position of the absolute coordinate data calculated by A1+Z1. Consequently, a highly precise positioning can be performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an EB tester (electron beam tester), and more particularly to a technique for storing and loading coordinate data of an observation range of the EB tester.

[0002]

2. Description of the Related Art Conventionally, when a fault location of a semiconductor integrated circuit device (referred to as "LSI") is specified by using this type of EB tester, a potential image of a good product (KGD; Known Good Device) and a potential of a defective product are identified. After acquiring the image, the obstacle location is driven in by comparing these potential images and obtaining a difference image.

The EB tester will be briefly described below. FIG. 8 shows a schematic diagram of the EB tester.

Referring to FIG. 8, an EB lens barrel 11, an electron beam generator 12 for generating an electron beam to an LSI to be measured, and an LSI to be tested 13 are mounted to apply a power supply voltage and a signal pattern. Test board 14 with jig,
XY stage 15, secondary electron detector 16 for detecting a secondary electron beam generated from LSI under test 13, LSI under test 1
LSI tester 1 which gives power supply voltage and test pattern to 3
7, XY stage drive 18, electron beam generator 12
Beam pulse control device 20 for controlling the generation of an electron beam from an electron beam, processing the detected secondary electrons into image information or waveform information, accumulating this information, beam pulse control device 20 and an XY stage from image data. Drive device 1
C which controls 8 and performs a conversion process to a layout image and navigation by further using the CAD data of the LSI.
The PU 19 and the display device 21 that displays the obtained potential image and various information are provided.

The coordinates of the EB tester are only the coordinates given to the XY stage drive device 18, and these coordinates are called "absolute coordinates".

In the following, the LSI 13 is mounted on the XY stage 15.
A conventional EB tester of a system in which the XY stage driving device 18 moves the LSI 13 will be described. The EB generating unit 12 is moved in the XY directions and the LSI 13 is moved.
Since the method of fixing the same is the same in the relative movement operation, the description thereof will be omitted.

Further, as shown in FIG. 7, the test board 1
4 is equipped with an LSI socket 14-1 and the LS
The LSI 13 to be measured is inserted into the I socket 14-1 and then mounted on the XY stage 15.

FIG. 6 schematically shows the arrangement of an LSI case (package) and an LSI chip enclosed in the package. FIG. 6A shows a DIP (Dual
inLine Plug Package), an example of PGA is shown in Fig. 6 (B).
An example of (Pin Grid Array) is shown in FIG.
It is a figure which respectively shows the example of Flat Package.

The LSI 13 to be measured is shown in FIGS.
As shown in (C), L is placed in the LSI cases 2a to 2c.
SI chips 1a-1c are enclosed, and each figure is an LSI.
Shown with the chip visible. 6A to 6C show an LSI case (package)
However, this is not the only example.

Using the EB tester shown in FIG.
A procedure for acquiring a potential image at the same location of SI (two LSIs having LSI chip A and LSI chip B) will be described below with reference to the flowchart of FIG.

First, the LSI on which the LSI chip A is mounted
13 is mounted at a predetermined position on the test board 14, and the LSI
The SEM (scanning electron microscope) image obtained by scanning the electron beam of the EB tester of the chip A, and the CA
D data (LSI chip design layout data)
And are aligned with reference to the image output to the display device 21, for example (step 21). Note that, for example, the SEM image of the LSI chip and the layout image of the CAD data displayed on the monitor screen of the display device 21 are moved in synchronization with each other (for example, when the display range of the SEM image is moved on the screen, The layout image is also moved and displayed).

Next, the XY stage 15 is moved to a portion of the LSI chip A to be observed to obtain a potential image, and the absolute coordinate data X1 of the XY stage 15 is stored in a predetermined storage area (also called "position store"). ) (Step 22 ″).

The position store function is a function that is usually implemented in an EB tester as a convenient function when observing another place and then observing the place again.

Next, the LSI is replaced (step 23),
The SEM image of the LSI chip B and the CAD data are aligned (step 24 ').

Next, the previously stored absolute coordinate data X1 is read, and the XY stage 15 moves to the coordinate position (step 25 ").

However, as shown in FIG. 10, the displacement of the mount on the LSI case and the L on the LSI socket are caused.
Due to the positional shift of the SI case, the positional shift of the test board 14, etc., the LSI chip A and the LSI chip B are not always positioned at exactly the same place.
In general, the position is almost always displaced.

In the LSI chip B, the LSI chip A
Therefore, the XY stage 15 is moved to the position to be observed (see step 27).

After that, the potential image of the LSI chip B is acquired and compared with the potential image of the LSI chip A (by the difference image method) (step 26).

This SEM is shown in FIGS. 5 (A) to 5 (C).
It is the figure which showed the position gap of an image typically. Note that FIG.
(A) is an SEM of the area to be observed on the LSI chip A
5B is a layout image of the LSI, and FIG.
(C) is a diagram schematically showing an SEM image of the LSI chip B when the position stored by the relative coordinate data of the LSI chip A is loaded. 5A to 5
In (C), 31, 31 ″ are the first wiring layer, 3
2, 32 "are second-layer wiring layers, 33, 33" are contact portions connecting the first and second layers, 41, 4
5 is the first wiring layer on the CAD data, 42, 44
Is the second wiring layer on CAD data, and 45 is CAD
It is an example of a contact part on data. Note that FIG.
The layout image of the LSI chip shown in FIG.
Corresponding to the observation target area by the SEM image shown in (A),
The CAD data of the LSI chip is displayed and output on the monitor screen.

SEM of the portion of the LSI chip A to be observed
If the image is as shown in FIG.
(B) is the layout image. LSI chips A and L
Since the SI chip B and the SI chip B are displaced from each other as shown in FIG.
When the stored absolute coordinate data X1 of the LSI chip A is loaded, the SEM image of the I chip B shifts as shown in FIG. 5 (C).

In this case, if the deviation is about 1 to 2 μm, the work efficiency does not deteriorate, but sometimes the position deviation is about 1 mm, which causes the deterioration of the work efficiency.

[0022]

As described above, in the above-mentioned conventional EB tester, it is impossible to avoid the displacement every time the LSI sample to be analyzed is replaced, and it is difficult to improve the measurement accuracy. In addition, there is a problem that work efficiency and inspection efficiency are significantly reduced when a large displacement occurs.

The present invention solves the above-mentioned problems of the prior art, improves the positioning accuracy when acquiring potential images of the same location of a good product and a defective product by using an EB tester, and performs good work. It is an object to provide an EB tester that achieves efficiency.

[0024]

In order to achieve the above object, the present invention detects a secondary electron beam generated from an integrated circuit device under test by irradiating the integrated circuit device with an electron beam. Means, means for displaying the secondary electron beam two-dimensionally on the monitor screen as a potential image, means for displaying CAD data of the integrated circuit device under test as a layout image on the monitor screen, the potential image and the potential image. In an EB tester having at least means for moving the observation range in synchronization with alignment with the layout image, relative coordinates using an arbitrary point on the layout as an origin with respect to a point of interest on the layout image. Stores system coordinate data (store)
Also, there is provided an EB tester characterized by comprising: means for reading (loading); and means for converting between the relative coordinate system on the layout image and the coordinates of the absolute coordinate system held by the EB tester.

According to the present invention, instead of storing and loading the absolute coordinate data held by the EB tester, the relative coordinate data or the arbitrary origin of the CAD data of the first DUT is obtained. Stored relative coordinate data, converts the relative coordinate data to absolute coordinate data at the time of loading, and controls the positioning of the second integrated circuit device under test based on the converted absolute coordinate data. The positioning accuracy is improved when the potential image of the defective product at the same place is acquired, and the working efficiency is improved.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. The schematic configuration of the EB tester according to various embodiments of the present invention described below is substantially the same as the configuration of the conventional example shown in FIG. 8, and thus the description thereof is omitted. In the following, the EB tester will be used. A process of acquiring a potential image at the same location of two LSIs will be described.

[0027]

[Embodiment 1] FIG. 1 shows two LSIs using an EB tester having a coordinate conversion function according to an embodiment of the present invention.
(Two Ls equipped with LSI chip A and LSI chip B
11 is a flow chart for explaining a process of acquiring a potential image at the same place in (SI).

Referring to FIG. 1, first, similarly to the conventional example, the SEM image of the LSI chip A and the CAD data are aligned (step 21).

Next, the XY stage 15 is moved so as to irradiate the portion of the LSI chip A to be observed (observation range) with the potential beam to obtain a potential image, and at the same time XY
The relative coordinate data A1 on the CAD data that is moving in synchronization with the movement of the stage 15 is stored (step 2).
2).

At this time, for example, an LSI based on an SEM image
The display of the wiring of the chip A is as shown in FIG. 4A, and the layout image of the LSI chip A is as shown in FIG. 4B.

In FIG. 4, 31 and 31 'are first-layer wiring layers, 32 and 32' are second-layer wiring layers, and 33 and 3 '.
Reference numeral 3'denotes a contact portion that connects the first and second layers, 41 and 45 are first wiring layers on CAD data, and 42 and 44 are second wiring layers on CAD data. The wiring layer 45 is an example of a contact portion on CAD data. Corresponding to the SEM image of FIG. 4A, the layout image shown in FIG. 4B is displayed such that the contact portion is located at the center of the screen.

Next, the LSI is replaced (step 23),
The SEM image of the LSI chip B is aligned with the CAD data, and when the alignment process is performed, the origin data of the relative coordinates on the layout image (CAD data) is expressed as the absolute coordinate data of the EB tester. The data Z2 is stored (step 24).

Next, the previously stored relative coordinate data A1 is read, and the XY stage 15 is moved to the position of the absolute coordinate data calculated by A1 + Z2 from the relative coordinate data (step 25).

If the process of aligning the CAD data with each LSI is accurately performed, the SEM image is as shown in FIG. 4 (C).

Therefore, in the present embodiment, the potential image may be acquired as it is, and even if there is a positional deviation, it is at most about several μm. As described above, according to the present embodiment, the working efficiency is improved as compared with the conventional example.

Finally, the potential image of the LSI chip B is acquired and compared with the potential image of the LSI chip B (step 2).
6).

In the present embodiment, as described above, the converted coordinate data Z2 is described by observing the relative coordinates with reference to the absolute coordinates. However, the converted coordinate Z3 with respect to the absolute coordinates with respect to the relative coordinates (that is, with reference to the relative coordinates). , -Z2), A1-
The absolute coordinates will be obtained with Z3.

[0038]

[Embodiment 2] FIG. 2 shows two LSs using an EB tester having a coordinate conversion function according to a second embodiment of the present invention.
7 is a flowchart for explaining a process of acquiring a potential image at the same position of I.

Referring to FIG. 2, first, the SEM image of the LSI chip A and the CAD data are aligned with each other in the same manner as in the conventional example (step 21).

Next, on the SEM image area, for example, the lower left of the chip is designated as the origin of the relative coordinates, and the portion to be observed is marked with X.
The Y stage 15 is moved to acquire an electric potential image, and relative coordinate data A2 of a portion to be observed on the SEM image is acquired.
Is stored (step 22 '). At this time, for example, the SEM image is as shown in FIG. 4 (A), and the layout image is as shown in FIG. 4 (B).

Next, the LSI is replaced (step 23),
The SEM image of the LSI chip B and the CAD data are aligned (step 24 ').

Then, on the SEM image area, the origin is designated at the same position as the position designated as the origin of the relative coordinates in step 22 ', and the relative coordinate data A2 stored previously is stored.
, The origin on the LSI chip is designated to be the same, so that the LSI chip B moves to the same position as the relative coordinate A2 of the LSI chip A (step 2).
5 ').

If the origin of the relative coordinates of each LSI is accurately specified, the SEM image is as shown in FIG. 4 (C). Therefore, it suffices to acquire the potential image as it is, and even if there is a positional deviation, it is about several μm at the most, and therefore the working efficiency can be improved.

[0044]

[Third Embodiment] FIG. 3 is a diagram for explaining a process of acquiring a potential image at the same location of two LSIs using an EB tester having a coordinate conversion function according to a third embodiment of the present invention. It is a flow chart.

First, in the SEM image area of the LSI chip A, for example, the lower left of the chip is designated as the origin of the relative coordinates, the XY stage 15 is moved to the portion to be observed, and an electric potential image is acquired. The relative coordinate data A2 of the portion to be observed is stored (step 22 ').
At this time, for example, the SEM image is as shown in FIG. 4 (A), and the layout image is as shown in FIG. 4 (B).

Next, the LSI is replaced (step 23),
Next, on the SEM image area, the origin is designated at the same position as the origin of the relative coordinates designated by 22 ', and the relative coordinate data A2 stored previously is read, and the origin on the LSI chip is the same. Therefore, the LSI chip B is moved to the same position as the relative coordinate A2 of the LSI chip A (step 25 ').

If the origin of the relative coordinates of each LSI is accurately specified, the SEM image is as shown in FIG. 4 (C). Therefore, it suffices to acquire the potential image as it is, and even if there is a positional deviation, it is at most about several μm, which improves working efficiency.

[0048]

As described above, in the EB tester of the present invention, the positioning accuracy can be improved when the potential images of the non-defective product and the defective product at the same place are acquired, and the working efficiency can be improved. There is an effect.

[Brief description of drawings]

1 is an EB tester according to an embodiment of the present invention,
7 is a flowchart for explaining a processing step of acquiring a potential image at the same location of two LSIs.

FIG. 2 is a flowchart for explaining a processing step of acquiring an electric potential image at the same location of two LSIs by the EB tester according to the second embodiment of the present invention.

FIG. 3 is a flowchart for explaining a processing step of acquiring a potential image at the same location of two LSIs by an EB tester according to a third embodiment of the present invention.

FIG. 4A is a diagram schematically showing an example of an SEM image of an area to be observed on the LSI chip A. (B) is L
It is a figure which shows the layout image of SI. FIG. 6C is a diagram schematically showing an SEM image of the LSI chip B when the position stored by the relative coordinate data of the LSI chip A is loaded according to the embodiment of the present invention.

5A is a diagram schematically showing an example of an SEM image of an area to be observed on the LSI chip A. FIG. (B) is L
It is a figure which shows the layout image of SI. (C) is a diagram schematically showing an SEM image of the LSI chip B when the position stored in the relative coordinate data of the LSI chip A is loaded.

FIG. 6 is a diagram schematically showing how an LSI case (package) and an LSI chip are mounted. FIG. 9A is a diagram showing an example in which the package is DIP. FIG. 3B is a diagram showing an example in which the package is PGA. (C) Package is Q
It is a figure which shows the example of FP.

FIG. 7: Test board, LSI socket, and LS to be measured
It is a figure which shows typically an example of a mode of mounting (mounting) of I.

FIG. 8 is a diagram schematically showing a configuration of an EB tester.

FIG. 9 is a diagram for explaining a processing step of acquiring a potential image at the same location of two LSIs in a conventional EB tester.

FIG. 10 is a diagram for explaining an example in which the origin of the LSI chip A and the origin of the LSI chip B are displaced.

[Explanation of symbols]

 11 EB lens barrel section 12 EB generation section 13 LSI 14 test board 15 XY stage 16 secondary electron detection section 17 LSI tester 18 XY stage drive unit 19 CPU 20 beam pulse control unit 21 CRT

Claims (6)

[Claims] 1. A means for irradiating an integrated circuit device to be measured with an electron beam, a means for detecting a secondary electron beam generated from the integrated circuit device to be measured, and a monitor screen for the secondary electron beam two-dimensionally. Means for displaying as a potential image on the monitor, means for displaying the CAD data of the measured integrated circuit device as a layout image on the monitor screen, and after aligning the potential image and the layout image, the observation range is synchronized. And storing (loading) coordinate data of a relative coordinate system having an origin at an arbitrary point on the layout with respect to a point of interest on the layout image in an EB tester having at least An EB tester comprising: a means for converting the relative coordinate system on the layout image; and a conversion means for converting the coordinates of the absolute coordinate system held by the EB tester. 2. The EB tester according to claim 1, wherein the coordinate data of the relative coordinate system is relative coordinate data on the potential image. 3. A first measuring integrated circuit device comprising: control means for two-dimensionally moving an observation range of the measured integrated circuit device relative to the means for irradiating the electron beam to control positioning. The relative coordinate data of the CAD data layout image is stored, the relative coordinate data is converted to absolute coordinate data at the time of loading, and the control means controls the positioning of the second measured integrated circuit device based on the converted absolute coordinate data. The EB tester according to claim 1, wherein 4. A control means for two-dimensionally moving an observation range of the measured integrated circuit device relative to the means for irradiating the electron beam to perform positioning control, comprising: After the SEM image and the layout image are aligned with each other, a relative movement is performed so that the electron beam is irradiated to a position corresponding to the observation range of the first measured integrated circuit device to obtain a potential image, The relative coordinate data on the layout image corresponding to the position is stored and then replaced with the second integrated circuit device under test, and the SEM image of the second integrated circuit device under test is aligned with the layout image. At the same time, it is calculated from the converted relative coordinate data obtained by converting the coordinate data of the predetermined position of the relative coordinate on the layout image into the absolute coordinate data of the EB tester and the stored relative coordinate data. EB tester of claim 1, wherein the absolutely coordinate data in the corresponding position for moving the second of the measured integrated circuit device, and controls so that. 5. A control means for two-dimensionally moving the integrated circuit device to be measured relative to the means for irradiating the electron beam to position the integrated circuit device, the SEM image of the first integrated circuit device to be measured, and the control means. After the layout images are aligned, the relative coordinates of a desired position on the SEM image are designated so that the electron beam is irradiated to a position corresponding to the observation range of the first DUT. The relative movement is performed to obtain an electric potential image and the SE
Relative coordinate data of a desired position on the M image is stored, then exchanged with the second integrated circuit device under test, and the SEM image of the second integrated circuit device under test is aligned with the layout image. At the same time, on the SEM image of the second measured integrated circuit device, coordinates are designated so as to be the same relative coordinates as the designated relative coordinates, and the stored relative coordinate data is read out and automatically The EB tester according to claim 1, wherein the EB tester is controlled so as to be converted into absolute coordinate data and to move the second integrated circuit device under test to a position corresponding to the coordinate data. 6. A control means for two-dimensionally moving the integrated circuit device under test relative to the means for irradiating the electron beam to position the integrated circuit device, the SEM image of the first integrated circuit device under test being provided. , Relative coordinates are designated, relative movement is performed so that the electron beam is irradiated to a position corresponding to the observation range of the first measured integrated circuit device, an electric potential image is acquired, and a desired image on the SEM image is obtained. The relative coordinate data of the position is stored, and then it is exchanged with the second integrated circuit device to be measured, the SEM image of the second integrated circuit device to be measured and the layout image are aligned, and On the SEM image of the measured integrated circuit device, the coordinates are designated so as to be the same relative coordinates as the designated relative coordinates, and the stored relative coordinate data is read out and automatically converted into absolute coordinate data. Conversion to EB tester of claim 1, wherein the moving the second measured integrated circuit device at a position corresponding to the coordinate data, and controls so.