JPH0973405A - Parallel program operating status display method - Google Patents

Abstract

(57) [Summary] [Construction] This parallel program operation display processing unit 100 receives a parallel program 101, an operation display method type 102, and user data 103, and generates a internal information table 105. 101
And the operation status display processing 109 for displaying the execution status of the parallel program by the target operation display method from the internal information table 105. [Effect] Since the processor can be arranged in the shape specified by the user and the operating status of the parallel computer can be displayed, display according to the structure of the program is possible. Further, since the processors can be divided into groups and the operating status can be displayed for each group, the operating status of a large-scale program can be seen at once, and the number of steps for debugging and optimizing a parallel program can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is directed to an arbitrary parallel program and relates to a method of displaying the operating status of this parallel program.

[0002]

2. Description of the Related Art Two prior arts are shown below. One is the display technology of computer performance itself.

In order to bring out the performance of a parallel computer, a program running on it uses a plurality of processors without any bias, and places where CPUs, I / Os, and networks have extremely heavy loads (called bottlenecks). It is important not to generate it. Usually, it is not easy for the user to write such an ideal parallel program from the beginning. Therefore, the procedure is to first create a program that operates logically correctly, observe the operation status on the parallel machine, perform tuning, and finally finish the program that operates at high speed. In order to reduce the effort for that, a tool that allows the user to quickly grasp the operating status of the parallel program is essential.

On the other hand, conventionally, the method of displaying the performance data of a computer (CPU operating rate, I / O usage status, memory usage status, network usage status, etc.) is based on Intel's Parade. As is done in, the drawing corresponding to the parallel computer is drawn on the computer screen, and the color of the corresponding portion is changed according to the level of the performance data to display the operating status of the parallel computer.
This is to display the performance of each processor corresponding to a parallel computer.

Another conventional technique is to grasp a more detailed execution state of a parallel program.
In the message passing type parallel computer, each processor has a local memory, and necessary information is transmitted / received from processor to processor via a communication path.

To create an efficient parallel program,
A major factor is how to distribute the data in the program to each memory. Also, in debugging, it is important to confirm that these arranged data are operating correctly. When using a general program description language C, Fortran (FORTRAN), etc., the data allocation and communication instructions are described by the user on the program. Specifically, a processor sends information using a send instruction, a designated processor receives the information using a receive instruction, and a processor sends a broadcast instruction using a broadcast instruction. It is common to send information to all processors, and all processors receive this using a receive instruction. If this interprocessor communication is not programmed by controlling the timing, unnecessary waiting time may occur and deadlock may occur. In a parallel program, optimizing the timing of this inter-processor communication leads to a reduction in the execution time of the program and ultimately an improvement in the performance of the program.

One of the conventional techniques for supporting the optimization regarding the inter-processor communication is XPMV (Oak Ridge).
(National Institute) etc. to execute a user program and graphically display the timing of data transmission / reception between processors using a Gantt chart in which the vertical axis is the processor and the horizontal axis is the time. If this is used, transmission / reception time, waiting time, timing, etc. can be known at a glance, so it is easy to grasp the points to be corrected in the program, which is useful when optimizing the program.

[0008]

By using the above conventional technique, it is possible to grasp the performance of the parallel computer, the timing of each execution statement in the program for creating the parallel computer, and the timing of data communication. However, the following issues remain.

(1) Even if the operating status of the processor is known, it is difficult to know what role it plays in the structure of the program.

(2) When the number of processors is large, it is very difficult to grasp the operation of the parallel computer if the operating states of all the processors are output.

(3) When the number of processors is large, it is very difficult to grasp the operation of the program if the Gantt charts of all the processors are output. Gantt chart is a tool that is indispensable for debugging and tuning parallel programs, because time series data can be grasped at a glance.
Even with dozens of processors with few parallel machines, if the Gantt chart of all processors is output, the amount of information will be large and it will be difficult to grasp the program operation.

An object of the present invention is to solve these problems and to provide a method for efficiently displaying the parallel computer performance and the operating status of a parallel program.

[0013]

Means for solving the above-mentioned problems are as follows.

(1) When a message passing type parallel computer is used, large data is often allocated to a plurality of processors for programming, and memory allocation of this data is important for programming. In many cases, this data represents the shape of the user. Therefore, by arranging the processor in this user image shape and displaying the operating status of the processor,
A display of operational status along the parallel program structure is achieved.

(2) Displaying the performance of a parallel program by regarding a plurality of processors as one processor, and displaying the information of the plurality of processors as the information of one processor also in the display of the Gantt chart showing the execution state of the program. By reducing, the display of the operating status of a large-scale program can be achieved with few display items.

[0016]

The operation of the above means is as follows.

(1) By arranging the processor in the shape of a user image and displaying the performance of the processor, it becomes easy to grasp the operating state of the program.

(2) Information regarding all processors is
Since it is displayed with a small amount of information, the operation of the entire program can be easily grasped.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 4 shows a hardware configuration on which the present invention is based. The parallel program 101, which is the target of operation display, is input and processed by the user in the parallel program operation display processing unit 100 and the parallel computer 110 on the workstation. The parallel computer 110 has a plurality of cpu 401
Memory 402 and data collection unit 40, respectively.
Have 3. The operation data 108 obtained by executing the parallel program on the parallel computer 110 is sent to the parallel program operation display processing unit 100 via the communication path 404 and processed. The present invention relates to the processing of the parallel program operation display processing unit 100. Hereinafter, the parallel program operation display processing unit 100 and the parallel processing unit 106 will be described in detail.

FIG. 1 is a processing procedure of a parallel program operation display method showing an embodiment of the present invention. The input of the parallel program operation display processing unit 100 is the parallel program 101 which is the object of operation display, the operation display method type 102 indicating what kind of display is to be specified, and the user data 103 required in each operation display method. is there. There are three kinds of operation display method types 102, and a graphical processor operation status display function 1021 for mapping and displaying the operation status of each processor of the parallel computer to the shape specified by the user.
A processor group operating state display function 1022 showing a plurality of processors as one processor and a Gantt chart function 1023 displaying a Gantt chart in a processor group. User data 103 required for each is graphical processor operating status display function 1
When 021 is designated, the mapping shape 1031 indicates the display shape of the processor, the processor group operating status display function 1022, and when the Gantt chart function 1023 is designated, the processor grouping information 1032.

In the program operation display processing unit 100, the input data 101, 10 is processed by the data reception processing 104.
When receiving 2, 103, first, the user data 103
The internal information table 105 corresponding to is generated. The internal information table 105 is, specifically, the mapping shape 103.
A processor coordinate table 1051 corresponding to 1 and a processor group table 1052 corresponding to processor grouping information 1032 are generated. Next, the process is transferred to the parallel computer processing unit 106 of the parallel computer, and the parallel program 101 is executed by the compile / link / execute process 107. While running the program, the operation data 108, which is the performance data of each processor and memory, is output.
Upon receiving the operation data 108, the program operation display processing unit 100 then displays the operation status according to the various operation display types 102 designated by the user by the operation display processing 109. Specifically, the parallel calculation processing unit 106 is executed at the time of execution.
Operation data 108 sent from the internal information table 10
Map to 5 and perform the desired display. More than,
6 is a schematic diagram of a processing procedure of the parallel program operation display method 100.

The details of the present invention will be described below with reference to examples.

Details of the input information and the data reception processing 104 which is the first processing will be described with reference to FIG. FIG. 2 shows a data reception screen 201 for input information. The data reception processing 104 receives the input information 101, 102, 103 interactively on the reception processing screen 201.

First, the parallel program 101, which is the operation status display target, is read by the file name (20
2). This is a FORTRA that allows users to target multiple processors.
It is written in a programming language such as N or C.

Next, the operation display method type 102 is read in the selected format (203). There are three options, and the graphical processor operating status display function 1021, the processor group operating status display function 1022, and the Gantt chart function 10 are provided.
At 23, the user selects by pressing the corresponding toggle button. Both the graphical processor operating status display function 1021 and the processor group operating status display function 1022 can be pressed. In this example, these two are selected.

Next, the required data is requested according to the selected function. First, when the graphical processor operating status display function 1021 is designated, the screen of the data reception 204 for displaying the graphical processor is displayed to receive the data. Specifically, first, a toggle button is used to select whether the specified shape is for an individual processor or a processor group (205). In this example, since the processor group display is also selected above, the processor group is selected.

Next, the shape to be mapped is input.
A shape is selected from the four parts 206 on the right side of the screen, and these are combined to create a desired shape (207). In the parts, n, m, p, etc. are locations where the user inputs the processor number. 1 when inputting one number in a part
Indicates a processor or a processor group, and in the two cases it means the beginning and end of consecutive processor numbers. For example, the uppermost rectangle in the user entry example 207 indicates processor group numbers 1 to 5. When four numbers are entered in one rectangle, the processor numbers are consecutive, and by entering two numbers in the middle, it is indicated in which of the vertical and horizontal directions the processors are consecutively arranged. In this example, it is instructed that five processor groups of 6 to 25 are continuously arranged in the horizontal direction and are arranged in the vertical direction.

When the processor group operating state display function 1022 and the Gantt chart function 1023 are instructed, the processor group display data reception 208
Displays the screen and accepts data. Specifically, the group number is entered and the processor number attached to it is entered (210). Successive processor numbers can be described using the symbols ~. For example, in this example, it is instructed that the group 1 includes processor numbers 1-10.

Using the above method, the user gives an instruction for input data, and presses the end button 212 when finished.
The data reception process 102 ends the reception of the input data 101, 102, 103 by pressing the end button 212, and the processor coordinate table 1051 and the processor group table 10 are set as the internal information table 105.
52 is generated.

An example of the processor coordinate table 1051 is shown in FIG. The processor coordinate table 105 has coordinate values 312 for all processors or processor groups 311. The coordinate value is obtained from the arrangement designated by the user in the data reception process 104. Further, the processor group table 1051 has all the processor numbers attached to each group number.

Next, the processing is transferred to the parallel computer processing unit 106 in the parallel computer 110, and the parallel program 101 is executed by the compile / link / execute processing 107. While running the program, the operation data 108, which is the performance data of each processor and memory, is output.

This will be described with reference to FIG. The parallel computer has a plurality of cpu 401, each having a memory 402. Further, each has a data collection unit 403 and collects performance data. What is collected is, for example, the usage status of the processor, memory, communication system, reception system, and the like. Each performance data can be obtained by issuing a system call to the operating system running on each processor. The operation data 108, which is the collected performance data, is sent to a computer such as a workstation having the program operation display processing unit 100 via the network 404.

When the operation data 108 is sent from the parallel computer 107 to the program operation display processing section 100, various operation display types specified by the user by the operation display processing 109.
The operating status is displayed according to 102. When the specified operation display type 102 is the graphical processor operation status display function 1021, the processor is arranged according to the processor coordinate table 105 and the operation data 108 is displayed. In addition, the processor group operating status display function 102
When 2 is specified, the operation data 108 is integrated according to the processor group table 106 and displayed.

FIG. 5 shows an output example for the user's input shown in FIG. In the screen display example of FIG. 5, the upper row (501) is
This is an operating state of the parallel program 101 input on the processor group and processor group arrangement designated by the user in FIG. When the processor group is clicked with the mouse 507, the group name and the processor to which it belongs are displayed (502). The following selection items are displayed in the lower row (503). The user selects either cpu operating rate, memory, or communication as the display data (504). Further, by inputting the number of each processor group, the details of the processor group can be displayed (505). You can also change the viewpoint of the upper screen display (50
6).

According to this embodiment, there are the following effects.

This program is a numerical simulation of a model having the same physical shape as the input shape, but the process groups 1 to 5 are heavily loaded and the process groups 21 to 25 are lightly loaded. Therefore, it can be seen at a glance that the physical areas corresponding to the process groups 1 to 5 may be reduced and the physical areas corresponding to the process groups 21 to 25 may be increased in the memory allocation.

[0037]

According to the present invention, it is possible to arrange the processor in the shape specified by the user and display the operating status of the parallel computer. Therefore, the display according to the structure of the program is possible. Further, since the processors can be divided into groups and the operating status can be displayed for each group, even a program that drives a large number of processors can see the operating status of the entire program at once. Therefore, according to the present invention, it is possible to reduce man-hours for debugging and optimizing a parallel program.

[Brief description of drawings]

FIG. 1 is a flowchart of parallel program operation display processing according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of an example of a data reception processing screen.

FIG. 3 is an explanatory diagram of an example of a processor coordinate table.

FIG. 4 is an explanatory diagram of a hardware configuration.

FIG. 5 is an explanatory diagram of a parallel program operating state display example.

[Explanation of symbols]

Reference numeral 100 ... Parallel program operation display processing unit, 101 ... Parallel program, 102 ... Operation display method type, 1021 ... Graphical operation status display method, 1022 ... Processor group operation status display method, 103 ... User data, 10
31 ... Mapping shape, 1032 ... Processor grouping information, 104 ... Data reception processing, 105 ... Internal information table, 1051 ... Processor coordinate table, 10
52 ... Processor coordinate table, 108 ... Operating data,
109 ... Operating state display processing.

Claims (4)

[Claims] 1. A parallel program operating status display method, wherein information obtained from each processor of a parallel computer is arranged in a shape specified by a user and the operating status of the processor is displayed. 2. A method for displaying a parallel program operating state, characterized in that information obtained from each processor of a parallel computer is divided into a plurality of groups designated by a user and the information is displayed in group units. 3. The information obtained from each processor of the parallel computer is divided into a plurality of groups designated by the user, the groups of the processors are arranged in a shape designated by the user, and the information is displayed in group units. The parallel program operating state display method according to the first or second aspect. 4. A method for displaying the execution status of a parallel program, wherein all processors are divided into a plurality of groups designated by the user, and the operation status is displayed as if each group is one processor. Method.