JPH095790A - Method for manufacturing thin film transistor - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide a method for manufacturing a thin film transistor capable of performing sufficient exposure of a resist layer in a short time when performing patterning of a semiconductor channel layer by performing back exposure from the lower surface side of a substrate. To do. A step of forming an opaque gate electrode on a transparent substrate, and a step of sequentially forming a semiconductor channel layer and an impurity-doped layer on the entire surface of the substrate including a region for forming the gate electrode via a transparent insulating layer. A step of forming a resist layer having sensitivity to visible light on the entire surface of the impurity-doped layer, a step of irradiating light from the lower surface side of the substrate and exposing the resist layer using the gate electrode as a mask, the resist A step of developing the layer and removing the exposed portion, and using the non-exposed portion of the resist layer as a mask, the semiconductor channel layer and the impurity-doped layer are etched to remove unnecessary semiconductor channel layer and impurity-doped layer. The process of removing the visible light is not light in the ultraviolet region that is easily absorbed by the semiconductor channel layer or the impurity-doped layer, but visible light. Area light can be used, and the resist layer can be sufficiently exposed in a short time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor, and more particularly to a method of manufacturing a thin film transistor in which backside exposure is performed from the lower surface side of a substrate.

[0002]

2. Description of the Related Art Thin film transistors have high utility value especially in the field of liquid crystal displays, and the demand for thin film transistors is expected to increase in the future. A thin film transistor is an active element in which a gate electrode is usually formed on a glass substrate, and a source electrode and a drain electrode and a semiconductor channel layer made of an intrinsic semiconductor are formed on the gate electrode via an insulating layer. The semiconductor channel layer is a layer formed in a region between the source electrode and the drain electrode, and makes the semiconductor channel layer conductive or non-conductive by controlling the voltage applied to the gate electrode. Accordingly, the thin film transistor can operate as a switching element in which the source electrode and the drain electrode are turned on / off.

When such a thin film transistor is applied to a liquid crystal display, the thin film transistors are arranged vertically and horizontally in a matrix form so that one thin film transistor exists in each pixel. Then, for example, if the gate electrode is extended in the horizontal direction of this matrix, the source electrode is extended in the vertical direction of this matrix, and in each thin film transistor, the drain electrode is connected to the display (pixel) electrode corresponding to one pixel. The potential of the display (pixel) electrode corresponding to an arbitrary pixel can be controlled by combining the gate electrode and the source electrode.

As a method for efficiently manufacturing a thin film transistor having the above-mentioned structure, a method of performing back exposure from the lower surface side of the substrate (Japanese Patent Laid-Open Nos. 2-196222 and 2).
No. -250037) has been proposed. in this way,
In patterning the semiconductor channel layer, the resist layer is exposed by irradiating light from the lower surface side of the substrate using the gate electrode as a mask. Thus, by using the gate electrode as a mask, the patterning process can be simplified.

[0005]

In the method of manufacturing a thin film transistor using backside exposure as described above, the light emitted from the lower surface side of the substrate is transmitted through the substrate, the insulating layer and the semiconductor channel layer to expose the resist layer. Need to let. However, among the layers that transmit light, the semiconductor channel layer has a relatively low light transmittance, so when this layer becomes thick, a considerable part of the irradiated light is absorbed inside the layer,
There is a possibility that the amount of light necessary for exposing the resist layer to light may not be obtained. In particular, light in the ultraviolet region, which is the photosensitive band of a commonly used organic resist, is easily absorbed in the semiconductor channel layer. Therefore, a long exposure time is required to sufficiently expose the resist layer to light.

On the other hand, it is possible to improve the photosensitivity of the resist layer by reducing the thickness of the semiconductor channel layer. In this case, however, in the subsequent step of etching the impurity-doped layer formed on the semiconductor channel layer, When over-etching occurs, there is a risk that the semiconductor channel layer will be completely removed, and the semiconductor channel layer is inevitably required to have a certain thickness or more.

The present invention has been made in view of the above situation, and when the back surface exposure is performed from the lower surface side of the substrate to pattern the semiconductor channel layer, the resist layer is sufficiently exposed in a short time. It is an object of the present invention to provide a method of manufacturing a thin film transistor capable of performing the above.

[0008]

In order to achieve such an object, a method of manufacturing a thin film transistor according to the present invention includes a step of forming an opaque gate electrode on a transparent substrate and a formation area of the gate electrode. A step of sequentially forming a semiconductor channel layer and an impurity-doped layer on the entire surface of the substrate with a transparent insulating layer interposed therebetween,
The step of forming a resist layer having sensitivity to visible light, the step of irradiating light from the lower surface side of the substrate and exposing the resist layer using the gate electrode as a mask, the resist layer is developed, and the exposed portion is removed. And a step of removing the unnecessary semiconductor channel layer and the impurity-doped layer by etching the semiconductor channel layer and the impurity-doped layer using the non-exposed portion of the resist layer as a mask. did.

The method of manufacturing a thin film transistor according to the present invention comprises a step of forming an opaque gate electrode on a transparent substrate, and a semiconductor over the entire surface of the substrate including a region for forming the gate electrode via a transparent insulating layer. A step of sequentially forming a channel layer and an impurity-doped layer, a step of forming a source electrode and a drain electrode on the impurity-doped layer, and an entire surface of the impurity-doped layer including a formation region of the source electrode and the drain electrode, The step of forming a resist layer having sensitivity to visible light, the step of irradiating light from the lower surface side of the substrate and exposing the resist layer using the gate electrode as a mask, the resist layer is developed, and the exposed portion is removed. Step and etching the semiconductor channel layer and the impurity-doped layer using the unexposed portion of the resist layer as a mask Removing unnecessary semiconductor channel layer and the impurity-doped layer, and the like have configure.

Further, in the method of manufacturing a thin film transistor of the present invention, the resist layer is made of an alkali-soluble polymer,
The resist is composed of an acid-decomposable dissolution inhibitor, a photo-acid generator and a sensitizing dye.

Further, in the method of manufacturing a thin film transistor of the present invention, the resist layer is formed by using a resist comprising a polymer in which an alkali-soluble group is blocked by a hydrophobic structure, a photoacid generator and a sensitizing dye. In addition, at least one of the polymers represented by the following general formula (I), general formula (II) and general formula (III) is used as the polymer.

[0012]

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[0013]

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[0014]

[Chemical 6] (In the formula, R ¹ , R ² and R ³ are each independently an element other than a hydrogen atom or a substituent)

[0015]

The light radiated from the lower surface side of the transparent substrate is transmitted through the semiconductor channel layer and the impurity-doped layer in the region where the gate electrode is not formed to expose the resist layer to visible light. Since it has sensitivity, it is possible to perform exposure with light in the visible light region, not light in the ultraviolet light region, which is easily absorbed by the semiconductor channel layer or the impurity-doped layer, as exposure light, and resist in a short time. Sufficient exposure of the layer can be performed.

[0016]

Embodiments of the present invention will be described below with reference to the drawings.

First, the structure of a conventional general thin film transistor will be briefly described. FIG. 1 is a plan view showing a state in which a plurality of thin film transistors are arranged in a matrix when the thin film transistors are used in a general liquid crystal display. The portion indicated by the solid line in FIG. 1 is the gate electrode G. The gate electrode G is composed of a main portion that extends in the lateral direction of the figure and corresponds to a scanning line of a liquid crystal display, and a gate portion that extends downward from the main portion and that acts as a gate for each transistor element. There is. On the other hand, the portion indicated by the broken line in FIG. 1 is the source electrode S, which extends in the vertical direction of the figure and functions as the data line of the liquid crystal display. As described above, a large number of squares are formed by the plurality of gate electrodes G arranged in the horizontal direction and the plurality of source electrodes S arranged in the vertical direction, and the display electrodes E (indicated by a chain double-dashed line in the figure) are formed in the respective squares. (Shown by) are formed. Each drain electrode D (shown by a chain line in the figure) is formed so as to be electrically connected to each display electrode E, and the semiconductor channel layer A is provided between each drain electrode D and the source electrode S. (Indicated by a dotted line in the figure) are formed. The gate portion of the gate electrode G overlaps with each semiconductor channel layer A, and the channel in the semiconductor channel layer A can be ON / OFF controlled by the voltage applied to the gate electrode G.

In the above structure, one set of thin film transistors includes a drain electrode D, a source electrode S, a semiconductor channel layer A formed between them, and a gate electrode G for controlling the semiconductor channel layer A. It is composed by. Although FIG. 1 shows a state in which four sets of thin film transistors are formed, in reality, a large number of thin film transistors are formed on a two-dimensional plane, and a display having each display electrode E as one pixel is formed. It And
By applying a predetermined voltage to the gate electrode G corresponding to one specific scanning line, the channel layers of the thin film transistors arranged in a row in the figure can be turned on, and the source electrode S is provided as a data line. The signal value can be written to the display electrode E. In other words, a voltage is selectively applied to the plurality of gate electrodes G arranged in the horizontal direction of the drawing and the plurality of source electrodes S arranged in the vertical direction of the drawing to thereby generate a two-dimensional image. A desired charge can be stored in a desired display electrode among the large number of display electrodes E arranged on a plane.

FIG. 2 is a vertical sectional view taken along line XX 'of the liquid crystal display shown in FIG. In FIG. 2, a gate electrode 2 (corresponding to the gate electrode G in FIG. 1) is formed on a glass substrate 1, and a semiconductor channel layer 4 (see FIG. 1) is formed so as to cover the gate electrode 2 with a gate insulating layer 3 interposed therebetween. Corresponding to the semiconductor channel layer A) is formed. In addition, the drain electrode 6D via the drain side impurity doped layer 5D
A source electrode 6S (corresponding to the drain electrode D in FIG. 1) and a source electrode 6S (corresponding to the source electrode S in FIG. 1) are formed via the source-side impurity doped layer 5S. Drain side impurity doped layer 5D and source side impurity doped layer 5S
Is an intermediate layer for ensuring ohmic contact with the semiconductor channel layer 4.

A method of manufacturing a thin film transistor according to the first aspect of the present invention will be described by taking the above-mentioned thin film transistor as an example.

FIG. 3 is a process chart for explaining the method of manufacturing the thin film transistor of the first invention. First, the gate electrode 2 is formed on the glass substrate 1 by a photolithography method or the like, and the gate insulating layer 3, the semiconductor channel layer 4, and the impurity doped layer 5 are formed on the glass substrate 1 so as to cover the gate electrode 2. (FIG. 3 (A)). Further, a positive resist for back exposure is applied on the impurity-doped layer 5 to form a resist layer 7 (FIG. 3 (B)).

Next, light is irradiated from the lower surface (back surface) side of the glass substrate 1, and the resist layer 7 is formed using the gate electrode 2 as a mask.
Exposure is performed (FIG. 3C). That is, in the portion where the gate electrode 2 does not exist at the time of exposure, the light irradiated from the lower surface side of the glass substrate 1 passes through the gate insulating layer 3, the semiconductor channel layer 4 and the impurity-doped layer 5, and the glass substrate upper surface side. After reaching the resist layer 7 located at, the resist is exposed to light to form an exposed portion 7a. On the other hand, in the portion where the gate electrode 2 exists, the opaque gate electrode 2 does not transmit light, so the resist in the portion corresponding to this gate electrode 2 becomes the non-exposed portion 7b without being exposed to light.

The present invention is characterized in that the resist layer 7 is formed using a positive resist having sensitivity to visible light as described later. Generally, in a thin film transistor, hydrogenated amorphous silicon (a-Si: H) is used as a semiconductor channel layer. This a-S
Since i: H has a characteristic of strongly absorbing light in the ultraviolet region, when the back exposure as described above is performed, the light in the ultraviolet region, which is a photosensitive band of a resist generally used in the past, is
It is absorbed by the semiconductor channel layer, and a sufficient amount of light for promptly exposing the resist cannot be obtained. However, a-
The absorption of Si: H becomes weaker as the wavelength becomes longer,
Absorption is very weak for light in the visible light range. Especially,
A-Si: H hardly absorbs light having a wavelength of 600 nm to 700 nm, that is, red light. Therefore, if back exposure is performed using light in this visible region,
The resist layer can be exposed quickly. However, the photosensitive band of a novolak / naphthoquinonediazide type resist, which is a commonly used positive type resist, is 3
The light in this wavelength range has a transmittance of 0.01% or less in an a-Si: H film (semiconductor channel layer) having a film thickness of 0.2 μm. Therefore, it takes a very long time for exposure and cannot be put to practical use. However, in the present invention, since the resist layer 7 is formed using a positive resist having sensitivity to visible light, it is possible to perform exposure with light in the visible light region that is difficult to be absorbed by the semiconductor channel layer 4 and the impurity-doped layer 5. Therefore, the resist layer 7 can be sufficiently exposed in a short time.

As described above, after the back exposure, the non-exposed portion 7b is formed in the resist layer 7 in the same pattern as the gate electrode 2, and then the resist layer 7 is developed to remove the exposed portion 7a (FIG. 3D). ). Next, the semiconductor channel layer 4 and the impurity doped layer 5 are patterned using the non-exposed portion 7b as a mask to form the semiconductor channel layer 4 and the impurity doped layer 5 having the same pattern as the gate electrode 2 (FIG. 3).
(E)). Then, the source electrode 6S and the drain electrode 6D
Is formed by a photolithography method as in the conventional case, and the impurity doped layer 5 in the channel portion is removed using the source electrode 6S and the drain electrode 6D as a mask to complete a thin film transistor (FIG. 3F).

In the method of manufacturing a thin film transistor according to the present invention described above, since it is not necessary to perform highly accurate alignment in patterning the semiconductor channel layer and the impurity-doped layer, a high-performance alignment device is unnecessary, and
Since the resist layer can be sufficiently exposed in a short time, the efficiency of the process can be significantly improved.

Next, a method of manufacturing the thin film transistor of the second invention will be described by taking a thin film transistor having another structure as an example.

FIG. 4 is a plan view showing a state in which a plurality of thin film transistors are arranged in a matrix when the thin film transistors are used in a liquid crystal display. The portion indicated by the solid line in FIG. 4 is the gate electrode G. Further, the portion shown by the broken line in FIG. 4 is the source electrode S, and this source electrode S extends in the vertical direction of the figure and functions as the data line of the liquid crystal display. In this way, a large number of squares are formed by the plurality of gate electrodes G arranged in the horizontal direction and the plurality of source electrodes S arranged in the vertical direction, and the display electrodes E (indicated by a chain line in the figure) are formed in each of the squares. (Shown) is formed. Further, on the right side of the source electrode S, an L-shaped source electrode S ′ (shown by a broken line in the drawing) is formed. On the other hand, the upper left portion of the display electrode E extends upward in the figure and is located as the drain electrode D between the source electrodes S and S ′. The source electrodes S and S'and the drain electrode D
Has a structure that three-dimensionally intersects with the gate electrode G at points P, Q, and R, respectively.

Further, the pattern is arranged above the gate electrode G and below the source electrodes S and S'and the drain electrode D, that is, as shown by hatching in FIG. 5 (gate electrode, source electrode, The semiconductor channel layer A is formed with a common pattern of the drain electrode and the display electrode.

FIG. 6 is a vertical sectional view taken along line XX 'of the liquid crystal display shown in FIG. 4, and FIG. 7 is a vertical sectional view taken along line YY'. 6 and 7, the gate electrode 12 (the gate electrode G in FIG. 4 is formed on the glass substrate 11).
Corresponding to the semiconductor channel layer 14 is formed via the gate insulating layer 13 so as to cover the gate electrode 12.
Further, the impurity doped layer 15 (corresponding to the semiconductor channel layer A in FIGS. 4 and 5) is formed. Further, the drain electrode 16D and the source electrodes 16S, 16S 'are formed at positions corresponding to points P, Q, R in FIG. 4, respectively. The impurity-doped layer 15 is the semiconductor channel layer 14
Is an intermediate layer for ensuring the ohmic contact with the impurity doped layer 15 between the points P and R and between the points R and Q in FIG.

Next, the manufacturing method of the thin film transistor of the second invention will be described by taking the thin film transistor as shown in FIG. 4 as an example.

8 and 9 are process drawings for explaining the method of manufacturing the thin film transistor of the second invention. First, the gate electrode 12 is formed on the glass substrate 11 by a photolithography method or the like, and the gate insulating layer 13, the semiconductor channel layer 14, and the impurity doped layer 15 are formed on the glass substrate 11 so as to cover the gate electrode 12. . After that, the source electrodes 16S and 16S ', the drain electrode 16D and the display electrode (not shown) made of ITO are formed by photolithography or the like (FIGS. 8A and 9).
(A)). Next, a positive type resist for backside exposure is applied to the entire surface to form a resist layer 17 (FIG. 8).
(B), FIG. 9 (B)).

Next, light is irradiated from the lower surface (back surface) side of the glass substrate 11 to expose the resist layer 17 using the gate electrode 12 as a mask. That is, in the portion where the gate electrode 12 does not exist at the time of exposure, the light irradiated from the lower surface side of the glass substrate 11 is exposed to the gate insulating layer 13 and the semiconductor channel layer 1.
4, through the source electrode 16S, 16S 'and the drain electrode 16D made of the impurity-doped layer 15 and ITO,
Reaching the resist layer 17 located on the upper surface side of the glass substrate,
The resist is exposed to light to form the exposed portion 17a. On the other hand, since the opaque gate electrode 12 does not transmit light in the portion where the gate electrode 12 is present, this gate electrode 1
The resist of the corresponding portion of 2 is not exposed and the non-exposed portion 17
b.

Also in the second invention, the resist layer 17 is formed by using a positive type resist having sensitivity to visible light as described later.

As described above, the non-exposed portion 17 is formed on the resist layer 17 in the same pattern as the gate electrode 12 by backside exposure.
After forming b, the resist layer 17 is developed to expose the exposed portion 17
a is removed (FIG. 8 (D), FIG. 9 (D)). Next, the semiconductor channel layer 14 and the impurity doped layer 15 are patterned using the non-exposed portion 17b as a mask. However, in this patterning, the source electrodes 16S, 16S ', the drain electrode 16D, and the display electrode (not shown) function as a mask together with the non-exposed portion 17b, so that the pattern shown by hatching in FIG. The semiconductor channel layer 14 and the impurity-doped layer 15 are formed (FIGS. 8E and 9E). Then, the source electrode 16
A thin film transistor is completed by removing the impurity-doped layer 15 in the channel portion between S, 16S ′ and the drain electrode 16D.

In the method of manufacturing a thin film transistor of the second invention, the source electrodes 16S, 16S 'and the drain electrode 16D are made of ITO which is a transparent conductor, but they are made of a conductive metal such as Cr. Good. in this case,
When the resist layer 17 is exposed by the back surface exposure, the source electrodes 16S and 16S ′ and the drain electrode 16D also function as a mask in addition to the gate electrode 12, but the non-exposed portion 17 is used.
In the patterning of the semiconductor channel layer 14 and the impurity-doped layer 15 using b as a mask, the pattern A as shown by hatching in FIG. 5 is formed as in the above example.

Next, the resist sensitive to visible light used in the present invention will be described.

A resist generally called a chemically amplified resist is composed of an alkali-soluble polymer, an acid-decomposable dissolution inhibitor (or a polymer in which an alkali-soluble group is blocked by a hydrophobic structure), and a photoacid generator, and is usually used. Is sensitive to ultraviolet light. In this chemically amplified resist, the photoacid generator generates an acid by irradiating the resist with light, which is a photosensitive band of the photoacid generator, and the generated acid decomposes the acid-decomposable dissolution inhibitor ( Alternatively, the generated acid decomposes the hydrophobic structure blocking the alkali-soluble group), and the polymer becomes alkali-soluble, so that the exposed part of the resist is dissolved in the alkaline solution to perform development. It is a resist to be used.

The photoacid generator generally has a photosensitive band only in the ultraviolet region, but in the present invention, a resist in which a sensitizing dye is added to a chemically sensitized resist is used, whereby the sensitizing dye and the photoacid generator are used. The agents interacted with each other, and the photoacid generator was made to generate an acid by irradiating light in the photosensitive zone of the sensitizing dye. This acid causes the above-mentioned reaction, so that the portion of the sensitizing dye exposed to the light in the photosensitive zone is removed by the development. Therefore, by appropriately selecting the sensitizing dye, it is possible to freely select the light for the resist to be exposed, and for example, hydrogenated amorphous silicon (a-S) used as a semiconductor channel layer is used.
It is also possible to perform exposure with red light that i: H) hardly absorbs.

An alkali-soluble polymer used in the present invention,
A resist comprising an acid-decomposable dissolution inhibitor, a photo-acid generator and a sensitizing dye contains an alkali-soluble polymer in an amount of 80 to 97.
% By weight, 1 to 5% by weight of an acid-decomposable dissolution inhibitor, 1 to 5% by weight of a photoacid generator, and 0.5 to 10% by weight of a sensitizing dye. Further, a resist comprising a polymer in which an alkali-soluble group is blocked by a hydrophobic structure, a photo-acid generator and a sensitizing dye is contained in an amount of 80 to 98% by weight of a polymer, 1 to 5% by weight of a photo-acid generating agent and a sensitizing dye. 0.5 ~
It is contained in the range of 10% by weight. The formation of a resist layer using such a resist can be performed by applying a coating liquid in which the resist is dispersed in a solvent and drying.

As the polymer in which the alkali-soluble group is blocked with a hydrophobic structure, at least one kind of polymers represented by the following general formula (I), general formula (II) and general formula (III) is used. be able to.

[0041]

[Chemical 7]

[0042]

Embedded image

[0043]

Embedded image (In the formula, R ¹ , R ² and R ³ are each independently an element or a substituent other than a hydrogen atom.) Specific examples of the above polymer include R ¹ , R ² and R in the formula.
³ may include polymers as shown in Table 1 below, and the molecular weight of these polymers is from 1000 to 500.
About 00 is preferable.

[0044]

[Table 1] The thickness of the resist layer formed using the chemically amplified resist having sensitivity in the visible light range as described above is generally 0.2.
It is preferably about 2 μm.

Next, the present invention will be described in more detail by showing more concrete examples. (Example 1) First, a chemically sensitized resist, AZPF-500 manufactured by Hoechst Co., was used as a base, and this was mixed with a sensitizing dye (squarylium dye) in the following composition, and stirred for 2 hours in a dark room to homogenize. A resist solution was obtained. The sensitivity of this resist solution was 600 to 700 nm. The Hoechst AZPF-500 is a chemical composition containing an alkali-soluble novolac resin as a base polymer, an acetal-type dissolution inhibitor, and a photoacid generator that generates a strong Bronsted acid by irradiation with light. It is a sensitized resist.

(Resist Composition) AZPF-500 manufactured by Hoechst Co., Ltd. 10.0 g Squarylium dye 0.025 g On the other hand, a Cr electrode layer for a gate electrode (thickness: 0. 1 μm) was formed and patterned by photolithography to form a gate electrode having a line width of 20 μm and a line interval of 310 μm. Next, a gate insulating layer (SiN) is formed on the glass substrate so as to cover the gate electrode.
_x , thickness 0.3 μm), semiconductor channel layer (a-Si:
H, thickness 0.2 μm) and impurity-doped layer (n ⁺ a-
Si: H and a thickness of 0.05 μm) were successively formed in this order (corresponding to FIG. 3A). Then, the above resist solution is spin-coated on the impurity-doped layer (first step: 500 rpm for 3 seconds, second step: 3000 r
pm for 20 seconds) and then heated for 1 minute on a hot plate heated to 90 ° C. to remove the solvent to form a resist layer (thickness 0.5 μm) (corresponding to FIG. 3B). .

Next, light (Kr laser light (wavelength 647 nm)) was irradiated from the lower surface (back surface) side of the glass substrate, and the resist layer was exposed using the gate electrode as a mask (FIG. 3).
(Corresponding to (C)). The exposure intensity was 3 mW / cm ² , the exposure time was 33 seconds, and the exposure amount was 100 mJ / cm ² . The exposed substrate was heat-treated (5 minutes) on a hot plate at 100 ° C. to accelerate the reaction in the resist.

Thereafter, development was performed by immersing in a 1.6% tetramethylamine hydroxy aqueous solution for 5 minutes to remove the exposed portion (corresponding to (D) in FIG. 3).

Next, the semiconductor channel layer and the impurity-doped layer are patterned (corresponding to (E) in FIG. 3) by plasma etching using SF ₆ as a reactive gas, using the non-exposed portion of the resist layer as a mask. The unexposed resist layer was removed by immersing in acetone to which ultrasonic waves were applied for 2 minutes. After that, a Cr electrode layer (having a thickness of 0.2 μm) for the source electrode and the drain electrode is formed and patterned by a photolithography method to form the source electrode and the drain electrode. Further, the impurity-doped layer in the channel portion is removed. Then, a thin film transistor was manufactured (corresponding to (F) in FIG. 3).

When the electrical characteristics of this thin film transistor were evaluated, sufficient switching characteristics were confirmed. (Example 2) As a chemically sensitized resist, the following composition was stirred in a dark room for 2 hours to obtain a uniform resist solution. The sensitivity of this resist solution was 600 to 700 nm.

(Composition of resist) -t-butoxycarbonylated polyparavinylphenol (t-butoxycarbonylation introduction rate 44%) ... 2.5 g-antimonic fluorinated-4,4-di-t-butylphenyl Iodonium salt: 0.075 g Squarylium dye: 0.025 g Propylene glycol monoethyl ether acetate: 7.5 g A thin film transistor was produced in the same manner as in Example 1 using the above resist solution. However, the heat treatment after exposure of the resist layer was performed using a hot plate at 120 ° C., the heat treatment time was 30 minutes, and the 1.15% developer was an aqueous tetramethylammonium hydroxide solution.

When the electrical characteristics of the produced thin film transistor were evaluated, sufficient switching characteristics were confirmed. Example 3 A Cr electrode layer (thickness 0.1 μm) for a gate electrode was formed on a glass substrate having a thickness of 1.1 mm, and patterned by photolithography to obtain a line width of 20 μm.
A gate electrode having a line interval of 310 μm was formed. Next, a gate insulating layer (SiN _x , thickness 0.3 μm) and a semiconductor channel layer (a) are formed on the glass substrate so as to cover the gate electrode.
—Si: H, thickness 0.2 μm) and impurity-doped layer (n ⁺ a-Si: H, thickness 0.05 μm) were successively formed in this order. Then, an ITO electrode layer (having a thickness of 0.2 μm) for the source electrode and the drain electrode was formed and patterned by the photolithography method to form the source electrode and the drain electrode (see FIGS. 8 and 9A). Correspondence).

Next, the same resist solution as that used in Example 1 was spin-coated on the surface of the glass substrate on which the source and drain electrodes were formed (first step: 500 rp).
m for 3 seconds, second step: 3000 rpm for 20 seconds), and then heated for 1 minute on a hot plate heated to 90 ° C. to remove the solvent to form a resist layer ((in FIGS. 8 and 9). Corresponding to B)).

Next, light (Kr laser light (wavelength 647 nm)) was irradiated from the lower surface (back surface) side of the glass substrate to expose the resist layer using the gate electrode as a mask ((C) in FIGS. 8 and 9). Corresponding to). The exposure intensity is 3 mW / cm ² ,
The exposure time was 33 seconds, and the exposure amount was 100 mJ / cm ² . The exposed substrate was heat-treated (5 minutes) on a hot plate at 100 ° C. to accelerate the reaction in the resist.

Then, development was carried out by immersing in a 1.6% tetramethylamine hydroxy aqueous solution for 5 minutes to remove the exposed portion (corresponding to (D) in FIGS. 8 and 9).

Next, the semiconductor channel layer and the impurity-doped layer are patterned by plasma etching using SF ₆ as a reactive gas, using the non-exposed portion of the resist layer as a mask, and then the resultant is immersed in acetone to which ultrasonic waves have been applied. The unexposed resist layer was removed by immersion for a minute, and the impurity-doped layer in the channel portion was removed to produce a thin film transistor (corresponding to (E) in FIGS. 8 and 9).

When the electrical characteristics of this thin film transistor were evaluated, sufficient switching characteristics were confirmed. (Comparative Example 1) OF as a resist, manufactured by Tokyo Ohka Kogyo Co., Ltd.
Resist coating was performed in the same manner as in Example 1 except that PR-800 (viscosity 20 cp) was used, and then left in an oven at 80 ° C. for 30 minutes to remove the solvent. Then
Exposure was performed under the same conditions as in Example 1, and no heat treatment after exposure was performed, and development was performed by immersing in developer NMD-3 (concentration 2.38%) manufactured by Tokyo Ohka Kogyo Co., Ltd. for 1 minute. Then, the resist was removed in the same manner as in Example 1 to manufacture a thin film transistor.

When the electrical characteristics of the manufactured thin film transistor were evaluated, the switching characteristics could not be put to practical use. (Comparative Example 2) Exposure from the lower surface (back surface) side of the glass substrate was performed using ultraviolet light (wavelength 365 nm) of an ultra-high pressure mercury lamp, exposure intensity was 15 mW / cm ² , exposure time was 2 hours,
A thin film transistor was manufactured in the same manner as in Comparative Example 1 described above except that the exposure amount was 108 J / cm ² and the heat treatment after the completion of the exposure was not performed.

When the electrical characteristics of the produced thin film transistor were evaluated, sufficient switching characteristics were confirmed, but the time required for exposure was about 200 times that of Example 1, and the present invention is a very excellent method for producing a thin film transistor. Was confirmed.

[0060]

As described in detail above, according to the present invention, since the resist layer having sensitivity to visible light is used as the resist layer, it is not light in the ultraviolet region which is easily absorbed by the semiconductor channel layer or the impurity-doped layer. Further, it is possible to perform exposure with light in the visible light range, which allows sufficient exposure of the resist layer in a short time by back exposure even when the semiconductor channel layer has a certain thickness or more. The effect that the thin film transistor can be easily manufactured is exhibited.

[Brief description of drawings]

FIG. 1 is a plan view showing a state in which a plurality of thin film transistors are arranged in a matrix when the thin film transistors are used in a general liquid crystal display.

FIG. 2 is a vertical cross-sectional view taken along line XX ′ of the liquid crystal display shown in FIG.

FIG. 3 is a process drawing for explaining the manufacturing method of the thin film transistor of the first invention.

FIG. 4 is a plan view showing a state in which a plurality of thin film transistors are arranged in a matrix when the thin film transistors are used in a liquid crystal display.

5 is a plan view showing a region of a semiconductor channel layer of the liquid crystal display shown in FIG.

6 is a vertical cross-sectional view taken along line XX 'of the liquid crystal display shown in FIG.

7 is a vertical sectional view taken along line YY 'of the liquid crystal display shown in FIG.

FIG. 8 is a process drawing for explaining the manufacturing method of the thin film transistor of the second invention.

FIG. 9 is a process drawing for explaining the manufacturing method of the thin film transistor of the second invention.

[Explanation of symbols]

 1, 11 ... Glass substrate 2, 12 ... Gate electrode 3, 13 ... Gate insulating layer 4, 14 ... Semiconductor channel layer 5, 15 ... Impurity doping layer 6D, 16D ... Drain electrode 6S, 16S ... Source electrode 7, 17 ... Resist Layer 7a, 17a ... Exposed part 7b, 17b ... Non-exposed part A ... Semiconductor channel layer D ... Drain electrode E ... Display electrode G ... Gate electrode S ... Source electrode

Claims (5)

[Claims] 1. A step of forming an opaque gate electrode on a transparent substrate, wherein a semiconductor channel layer and an impurity-doped layer are sequentially formed on the entire surface of the substrate including a region for forming the gate electrode via a transparent insulating layer. The step of forming a resist layer having sensitivity to visible light on the entire surface of the impurity-doped layer, irradiating light from the lower surface side of the substrate, and exposing the resist layer using the gate electrode as a mask, Developing the resist layer and removing the exposed portion; and etching the semiconductor channel layer and the impurity-doped layer using the unexposed portion of the resist layer as a mask to remove unnecessary semiconductor channel layer and impurity-doped layer. And a step of removing the layer. 2. A step of forming an opaque gate electrode on a transparent substrate, wherein a semiconductor channel layer and an impurity-doped layer are sequentially formed on the entire surface of the substrate including a region for forming the gate electrode via a transparent insulating layer. A step of forming a source electrode and a drain electrode on the impurity-doped layer, a resist layer sensitive to visible light is formed on the entire surface of the impurity-doped layer including a formation region of the source electrode and the drain electrode. A step of forming, a step of irradiating light from the lower surface side of the substrate, exposing the resist layer using the gate electrode as a mask, a step of developing the resist layer and removing an exposed portion; Using the exposed portion as a mask, the semiconductor channel layer and the impurity-doped layer are etched to remove unnecessary semiconductor channel layer and impurity-doped layer. A step of removing the bias layer, and a method for manufacturing a thin film transistor. 3. The resist layer is formed using a resist comprising an alkali-soluble polymer, an acid-decomposable dissolution inhibitor, a photo-acid generator and a sensitizing dye. 7. A method of manufacturing a thin film transistor according to. 4. The resist layer is formed using a resist composed of a polymer in which an alkali-soluble group is blocked by a hydrophobic structure, a photoacid generator, and a sensitizing dye. 7. A method of manufacturing a thin film transistor according to. 5. The polymer according to claim 4, wherein at least one of the polymers represented by the following general formula (I), general formula (II) and general formula (III) is used as the polymer. Method of manufacturing thin film transistor of. Embedded image Embedded image Embedded image (In the formula, R ¹ , R ² and R ³ are each independently an element other than a hydrogen atom or a substituent)