JPH09275164A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) Abstract: A semiconductor device using a thick BCB film as a dielectric film, having high reliability and low insertion loss is provided. A ground conductor film 502 is formed on a substrate 501.
An insulating thin film 503 and a BCB film 504 are sequentially formed. A wiring conductor film 506 is formed on the BCB film 504, and the semiconductor chip 51 is partially formed on the wiring conductor film 506.
1 is flip-chip connected. That is, the signal wiring 512 of the semiconductor chip 511 is connected via the bump 513. This MFIC using the BCB film 504 as a dielectric film has an insulating thin film 503 as a base of the BCB film 504.
Since the BCB film 504 is formed, the adhesion of the BCB film 504 to the base is improved, peeling of the BCB film 504 can be prevented, and a highly reliable semiconductor device can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a high frequency semiconductor device used in the quasi-millimeter wave to millimeter wave band and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, technological progress in the field of information and communication has been remarkable, and the frequency band handled by communication equipment is being actively promoted to a higher frequency band from the microwave band to the millimeter wave band. For example, the 60 GHz band is about to be allocated to the wireless LAN and the vehicle collision prevention device in the office. In addition, as the system becomes higher in frequency, the speed and frequency of the devices used are significantly increasing. Recently, devices having a cutoff frequency exceeding 100 GHz, such as heterojunction compound semiconductor transistors, have been realized.
However, at high frequencies such as microwaves to millimeter waves, not to mention the characteristics of transistors,
The mounting method becomes a new major issue for realizing high-frequency circuits. For example, the effects of parasitic capacitance and inductance that occur during mounting increase in proportion to the frequency.
It is necessary to reduce these parasitic reactance components as the frequency becomes higher. Also, in communication equipment that handles the frequency band of microwaves to millimeter waves, the physical dimensions of the connection elements are sufficient at the time of design because the dimensions of the connection elements and the like that exist between the members that make up the circuit approach the wavelength of the signal. There is a need to consider. In addition, as a matter of course, extremely accurate precision is required for circuit components such as passive elements and lines.

Therefore, in order to realize such high-precision high-frequency characteristics, MMIC (Monoli) in which passive elements such as inductors, capacitors and resistors and transmission lines are formed on the same semiconductor substrate as the transistors and are collectively manufactured by a semiconductor process.
(Thic Microwave Integrated Circuit) has attracted attention and is being actively researched and developed in various places. However, in the MMIC, since passive elements and transmission lines that occupy most of the chip area are simultaneously formed on an expensive substrate (compound semiconductor substrate or the like) for producing active elements such as high-frequency transistors, the cost is high. I have a big problem. Originally,
This is because the cost of passive elements and transmission lines that can be manufactured on an inexpensive substrate is the same as that of a high frequency device.

Further, since the yield of the entire MMIC largely depends on the yield of the transistor which is an active element,
The advantage that passive devices and transmission lines, which are originally easy to fabricate, have a high yield cannot be utilized. Furthermore, since the active element, the passive element, the transmission line, and the like are manufactured collectively, the performance of each part cannot be confirmed after the manufacturing. This means
This means that extremely precise design technology is required, but in reality, it is difficult to perform precise impedance design in the high frequency range from the quasi-millimeter wave to the millimeter wave. This also causes a high cost of the MMIC.

Therefore, an MFIC (Microwave Fl) for connecting a transistor, which is an active element, by flip-chip bonding on a substrate having a passive circuit and a transmission line.
ip chip Integrated Circuit) has been newly proposed (Research method, ED94-134, MW94-121, ICD94-196 (1995-0
1), pp. 37-42).

According to this method, since the passive circuit and the transmission line portion are separately manufactured, the manufacturing cost is extremely low, and individual parts can be inspected before the high frequency transistor is connected, so that a high yield of the entire IC can be secured.

FIG. 15 is a sectional view of a proposed conventional MFIC. In FIG. 15, the relationship between the reference numerals and the members is as follows. Reference numeral 2001 is a substrate made of Si or glass, 2002 is a ground conductor film, 2003 is an interlayer insulating film, 2004 and 2005 are wiring conductor films, and 2006 is a contact hole for connecting the wiring conductor film 2004 and the ground conductor film 2002. A wiring board including a passive element and a transmission line is realized by the member. Here, for example, the wiring conductor film 2005 forms an MIM type capacitor in which the interlayer insulating film 2003 is sandwiched by the grounding conductor film 2002, and the wiring which needs to be grounded is grounded through the contact hole 2006 at an arbitrary place. It is grounded to 2002.

Reference numeral 2007 denotes a semiconductor chip on which a transistor is formed, and reference numeral 2008 denotes a signal wiring on this chip, which is flip-chip connected to a microstrip line on a wiring substrate via a bump 2009 to form an MFIC. .

[0009]

By the way, a SiO2 film having a small permittivity is generally used as a dielectric film of a microstrip line. In this case, an SiO2 film having a small dielectric constant is formed on an underlying ground conductor film made of Au. It is difficult to grow a thick SiO2 film that exceeds 10 .mu.m. However,
For example, when a line having a characteristic impedance of 50Ω is formed, the line width W and the film thickness h of the SiO2 film having this thickness are set to have a relationship represented by approximately W = 2h.
If the film is thin, the line width W of the microstrip line must be set thin. Therefore, the resistance of the line becomes large, and the conductor loss, that is, the conductor loss becomes large. Moreover, the SiO2 film has a dielectric loss called tan delta (tan).
δ) is large and is about 0.03. As described above, since the conductor loss and the dielectric loss are large, the loss when the high frequency signal passes through the microstrip line becomes large.

Therefore, the dielectric loss and the conductor loss are small,
Moreover, it is considered that the characteristics of the microstrip line or the like are improved by using the BCB film, which is easy to form a thick film, as the dielectric film.

However, when the BCB film is used as the dielectric film, the BCB film is peeled off from the ground conductor film during the process,
There are problems that the wiring conductor film is peeled from the BCB film, the BCB film is cracked, and thermal deformation occurs. Therefore, as a result of investigating the cause, it was presumed that it was due to poor adhesion between the BCB film and the conductor film, poor heat resistance of the BCB film, and the like.

The present invention has been made in view of such a problem, and an object thereof is to take measures to make up for the disadvantages of low adhesion and heat resistance while utilizing the excellent high frequency characteristics of the BCB film. Accordingly, it is an object of the present invention to provide a semiconductor device having excellent high frequency characteristics and high reliability, and a manufacturing method thereof.

[0013]

Means for Solving the Problems In order to solve the above-mentioned problems, the means taken by the present invention is as follows. First, a dielectric film made of BCB resin is used as a dielectric film, and the dielectric film is formed either above or below the BCB film. By providing the insulating thin film, the adhesion between the BCB film and the ground conductor film is enhanced, and the thermal shock stress on the BCB film is relaxed.

In order to achieve the above object, the present invention provides:
Means related to the first to fifth semiconductor devices described in claims 1 to 19 and means related to the method for manufacturing the first and second semiconductor devices described in claims 20 to 28 are taken.

A first semiconductor device of the present invention is a semiconductor device comprising a substrate and a wiring substrate having a dielectric film formed thereon, wherein the dielectric film is formed on a part of the substrate. The formed benzocyclobutene film (hereinafter abbreviated as BCB film) and an insulating thin film formed on at least one of the upper and lower sides of the BCB film and in contact with the BCB film.

As a result, a laminated film including a BCB film as a main component and an insulating thin film as a secondary component can provide a dielectric film having excellent adhesion and thermal shock resistance to a lower or upper conductor film. Therefore, various semiconductor devices using this dielectric film can be obtained.

As set forth in claim 2, in claim 1, it is preferable that the insulating thin film is made of at least one of silicon nitride, silicon oxide and silicon oxynitride.

This makes it possible to use the characteristics of silicon nitride, silicon oxide, and silicon oxynitride, which have high adhesion to the conductor film and low thermal conductivity, to overcome the above-mentioned drawbacks of the BCB film. .

As described in claim 3, in claim 1, the thickness of the BCB film is preferably thicker than 10 μm.

As a result, a dielectric film having a small conductor loss can be obtained.

According to a fourth aspect of the present invention, in the first aspect, it may further include a conductor film formed on a side facing the BCB film with the insulating thin film interposed therebetween.

As a result, a microstrip line using a dielectric film having a high heat resistance of the BCB film and having a high adhesion between the BCB film and the conductor film can be obtained.

As described in claim 5, the second semiconductor device of the present invention is characterized in that, in claim 4, the conductor film is a base conductor film formed in contact with the substrate.
The B film is formed above the base conductor film, and
A wiring conductor film formed on the side opposite to the base conductor film with the CB film and the insulating thin film sandwiched therebetween is further provided, and the base conductor film, the BCB film, the insulating thin film and the wiring conductor film constitute a microstrip line. There is.

As a result, it is possible to obtain a microstrip line in which the adhesion and heat resistance of the BCB film are improved and the dielectric loss and the conductor loss are small.

As described in claim 6, in claim 5, a semiconductor chip having a transistor, a signal wire formed on a surface of the semiconductor chip and connected to the transistor, the signal wire and the wire. A bump formed on at least one of the conductor films may be further provided, and the signal wiring of the semiconductor chip and the wiring conductor film may be connected via the bump.

As a result, the MFIC having the microstrip line having the above-mentioned excellent characteristics can be obtained.

As described in claim 7, in claim 6, when the insulating thin film is formed at least between the BCB film and the wiring conductor film, the insulating thin film is formed on the insulating thin film. It may further include a thin film resistor.

As a result, in the MFIC, the thermal shock force acting on the BCB film due to the heat generation of the thin film resistor is provided while the resistor is provided on the substrate side to downsize the semiconductor chip.
It can be mitigated by the insulating thin film.

According to an eighth aspect, in the sixth aspect, the insulating thin film is formed at least between the BCB film and the wiring conductor film, and a part of the wiring conductor film includes: The pad region may be formed so as to be connected to an external member via a wire.

As a result, the absorption of the bonding pressure in the BCB film is relaxed by the insulating thin film under the wiring conductor film during wire bonding to the pad region of the wiring conductor film, so that a highly reliable MFIC can be obtained. .

As described in claim 9, in claim 6, further comprising a capacitor, wherein the insulating thin film is formed at least between the BCB film and the wiring conductor film, and the insulating thin film and the BCB film are formed. And a lower electrode film of the capacitor interposed between the lower electrode film and the wiring conductor film, the wiring conductor film functions as an upper electrode of the capacitor above the lower electrode film, and the insulating thin film is the lower electrode. While functioning as a capacitance portion of the capacitor between the film and the wiring conductor film, it extends to a region other than above the lower electrode film and is interposed between the wiring conductor film and the BCB film. Can be configured.

As a result, it is possible to improve the adhesiveness and heat resistance of the BCB film by utilizing the insulating thin film which will be the capacitance portion of the capacitor formed on the substrate, and therefore the manufacturing cost of the MFIC can be reduced. it can.

As described in claim 10, claim 9
In the case where the pad region further includes a pad region formed in a part of the wiring conductor film and connected to an external member via a wire, the pad region is separated from a portion serving as an upper electrode of the capacitor by 50 μm or more. It is preferable to configure as described above.

This makes it possible to prevent the adverse effect on the capacitor during the wire bonding process.

As described in claim 11, claim 9
In the region of the wiring conductor film other than the upper electrode of the capacitor, there is provided a lead portion that is connected to the lower electrode film through a contact hole formed in the insulating thin film. A pad region that is connected to an external member via a wire may be formed on a part of the lead-out portion of the film.

As a result, it is possible to smoothly realize the supply of a signal to the lower electrode of the capacitor and the improvement of the characteristics of the BCB film using the insulating thin film which serves as the capacitor of the capacitor.

A third semiconductor device according to the present invention is claim 12.
And a substrate, a base conductor film formed on the substrate, a BCB film formed on at least a part of the base conductor film, and a BCB film formed on the BCB film, A wiring conductor film that constitutes a microstrip line together with the underlying conductor film and the BCB film is provided, and the wiring conductor film extends to a region on the substrate that is not covered with the BCB film, and in this region. A pad region that is connected to an external member via a wire is formed.

As a result, since the BCB film does not exist below the pad region where the wire exists, the wiring conductor film is not peeled off during wire bonding,
It is possible to obtain an MFIC having a microstrip line that uses a BCB film and has small dielectric loss and conductor loss.

As described in claim 13, claim 1
2, most of the underlying conductor film functions as a grounding conductor film, part of the underlying conductor film is separated from most of the underlying conductor film, and the pad region of the wiring conductor film is formed on this part. It can be configured to be in contact with each other.

Thus, the underlying conductor film serving as the ground conductor film can be utilized as the underlying layer of the wiring conductor film in the pad region.

A fourth semiconductor device of the present invention is defined in claim 14.
And a substrate composed of a semiconductor,
Element isolation made of an insulating material formed on the substrate,
A base conductor film formed on the substrate, a BCB film formed on at least a part of the base conductor film and a region excluding the element isolation, and a BCB film formed on the BCB film. A wiring conductor film that constitutes a microstrip line together with the base conductor film and the BCB film is provided, and the wiring conductor film extends to the region above the element isolation, and a wire is connected to an external member in this region. Pad regions are formed to be connected to each other.

As a result, an MFIC having a pad region insulated from the ground conductor film can be obtained by utilizing the element isolation required when a semiconductor element is formed on a semiconductor substrate.

As described in claim 15, in claim 1, 5, 6, 12 or 14, it is preferable that the substrate is made of Si or glass.

As a result, the MFIC is inexpensive and has excellent characteristics.
Can be obtained.

As described in claim 16, in claim 6, 7, 8, 9, 10 or 11, the semiconductor chip is preferably composed of a compound semiconductor containing GaAs.

As described in claim 17, in claim 6, 7, 8, 9, 10 or 11, the semiconductor chip is preferably composed of a semiconductor having a heterojunction.

As described in claim 18, in claim 6, 7, 8, 9, 10 or 11, the transistor is preferably a high frequency transistor used in a quasi-millimeter wave to a millimeter wave.

According to the sixteenth to eighteenth aspects, it is possible to obtain an MFIC including a transistor having excellent high frequency characteristics.

A fifth semiconductor device according to the present invention is defined in claim 19.
, A wafer-shaped substrate, a base conductor film formed on the substrate, a BCB film formed on at least a part of the base conductor film, and a BCB film formed on the BCB film. The base conductor film and the wiring conductor film forming a microstrip line together with the BCB film are provided, and the BCB film is present in a scribe-scheduled region for dividing the substrate into a plurality of substrate chips. However, the BCB film is divided for each substrate chip.

Thus, in the manufacturing process of the semiconductor device, the BCB film is not caught in the cutter blade during dicing, so that the life of the cutter blade is extended and the cost can be reduced.

The first semiconductor device manufacturing method of the present invention is
21. A first step of forming a base conductor film on a substrate, a second step of forming a BCB film on at least a part of the base conductor film, and the BCB according to claim 20.
The third step of forming a wiring conductor film on the film, and the second step
Before and / or after the step of
And a step of forming an insulating thin film in contact with the BCB film.

By this method, BCB in the manufacturing process
It is possible to prevent the peeling of the film from the underlying conductor film and the peeling of the wiring conductor film from the BCB film.

As described in claim 21, claim 2
0, after the second step and before the third step, forming a contact hole for exposing a part of the base conductor film at a desired position of the BCB film and the insulating thin film. Further, in the third step, the wiring conductor film can be formed so that a part of the wiring conductor film is embedded in the contact hole.

As described in claim 22, claim 2
0, in the first step, the underlying conductor film can be formed into a desired pattern.

As described in claim 23, claim 2
0, after the second step and before the third step, forming a contact hole for exposing a part of the underlying conductor film at a desired position of the BCB film and the insulating thin film. And a step of burying a metal in the contact hole to form a metal burying layer. In the third step, the wiring conductor film is formed so that the wiring conductor film is connected to the metal burying layer. can do.

As described in claim 24, claim 2
3, in the step of forming the metal burying layer,
The metal embedding layer can be formed by a selective plating method using the underlying conductor film exposed in the contact hole as a seed metal.

According to the twenty-third or twenty-fourth aspect, even when a contact hole having a large aspect ratio, that is, a small cross-sectional area and a deep contact hole is required, the buried metal layer can be easily formed, so that the wiring can be easily formed.

As described in claim 25, claim 2
0, 21, 22, 23 or 24, in the step of forming the insulating thin film, it is preferable that the insulating thin film is made of at least one of silicon nitride, silicon oxide and silicon oxynitride.

As described in claim 26, claim 2
0, 21, 22, 23 or 24, the wiring conductor film can be formed as a multilayer metal wiring layer in the third step.

The second semiconductor device manufacturing method of the present invention is
As described in claim 27, claims 20, 21, 2
2, 23 or 24, a step of preparing a semiconductor chip having a transistor and a signal wiring connected to the transistor, and bumping at a desired position on at least one of the wiring conductor film and the signal wiring. And a step of connecting the signal wiring of the semiconductor chip and the wiring conductor film via the bump.

By this method, it is possible to form an MFIC having a strip line composed of a laminated film of a BCB film and an insulating thin film having excellent adhesion and heat resistance as described above.

As described in claim 28, claim 2
7, further comprising a dicing step for dividing the substrate into a plurality of substrate chips, and in the second step, the BCB film is formed so that the BCB film does not exist in a scribing planned region in the dicing step. can do.

[0063]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) In the first embodiment, a film made of benzocyclobutene (Benzo Cyclo Butene, hereinafter abbreviated as BCB) having a smaller dielectric constant and dielectric loss tangent than a silicon oxide film is used as an interlayer insulating film. It was MFIC. FIG.
[FIG. 3] shows a sectional structure of an MFIC using a BCB film and sectional views of its manufacturing process.

In FIG. 1, the relationship between reference numerals and members is as follows. 501 is a substrate made of glass, Si, etc., and 502 is Ti / A formed on the substrate 501.
A ground conductor film made of a u / Ti laminated film, 504 is a BCB film formed on the ground conductor film 502, and 506 is a first wiring made of a Ti / Au / Ti laminated film formed on the BCB film 504. It is a conductor film. The first wiring conductor film 5
A part of 06 is the lower electrode of the capacitor. 507 is the first wiring conductor film 506 and the ground conductor film 50.
2, 508 is an interlayer insulating film that serves as a capacitor portion of the capacitor, and 509 is a second wiring conductor film that is a Ti / Au / Ti laminated film that partially serves as a capacitor upper electrode. . This ground conductor film 502, B
By the CB film 504 and the wiring conductor film 506 or 509,
A microstrip line is formed. Also, 51
Reference numeral 1 denotes a semiconductor chip in which a transistor is formed. This transistor is a high-frequency heterojunction field effect transistor having a cutoff frequency of 120 MHz used in the quasi-millimeter wave to millimeter wave band. Reference numeral 512 is a signal wiring on the semiconductor chip 511, and 513 is a bump for connecting the wiring conductor film 506 or 509 on the substrate 501 and the signal wiring 512 on the semiconductor chip 511. Bump 513
The semiconductor chip 511 is flip-chip connected to the microstrip line on the substrate 501 via the MFIC.
Is formed.

The manufacturing process of the MFIC of this embodiment will be described below.

First, as shown in FIG. 1A, the substrate 50
1 as the ground conductor film 502, for example, Ti / Au / Ti
The laminated film is formed to have a thickness of about 50/1000/50 nm, and a BCB film 504 having a thickness of about 10 μm is formed thereon.

Next, as shown in FIG. 1B, a contact hole 507 for connection to the ground conductor film 502 is formed in BC.
It is formed at a desired position on the B film 504.

Next, as shown in FIG. 1C, a Ti / Au / Ti laminated film, for example, is formed as the first wiring conductor film 506 having a desired pattern and partially forming the lower electrode of the capacitor. Further, for example, a silicon nitride film is formed as an interlayer insulating film 508 for the MIM capacitor on the entire surface of the substrate.

Next, as shown in FIG. 1D, after the interlayer insulating film 508 is processed into a desired pattern, for example, Ti /
After depositing the Au / Ti laminated film, the laminated film is patterned to partially form a second wiring conductor film 509 which serves as an upper electrode of the capacitor.

Next, as shown in FIG. 1E, a height of 10 μm is formed at a desired position on the wiring conductor film 506 or 509.
The bumps 513 are formed.

Next, as shown in FIG. 1F, the bumps 513 are connected to the signal wirings 512 on the semiconductor chip 511 to complete the MFIC.

As described above, by using the BCB film as the dielectric film, the insertion loss in the transmission line of the MFIC can be reduced.

(Second Embodiment) In the first embodiment,
The BCB film thickness may be up to about 10 μm, but if the BCB film thickness is increased in order to further reduce the insertion loss, the adhesion between the BCB film and the ground conductor film is poor even if the BCB film formation conditions are optimized. In the case of, peeling may occur. Therefore, in each of the following embodiments, B
A semiconductor device that does not peel off even if the thickness of the CB film is increased will be described.

A semiconductor device according to the second embodiment and a method for manufacturing the same will be described with reference to FIGS. 2 and 3A to 3F.
Will be described with reference to. 2 and 3 (a)-
(D) is sectional drawing which shows the structure and manufacturing process of MFIC concerning 2nd Embodiment, respectively.

2 and 3, the relationship between the reference numerals and the members is as follows. Reference numeral 501 is a substrate made of glass, Si or the like, 502 is a ground conductor film made of a Ti / Au / Ti laminated film formed on the substrate 501, 503.
Is an insulating thin film made of a silicon oxide film formed on the ground conductor film 502, 504 is a benzocyclobutene resin film (hereinafter abbreviated as BCB film) formed on the insulating thin film 503, and 506 is a BCB film 504. Au formed on
It is a wiring conductor film made of. The ground conductor film 502, the insulating thin film 503, the BCB film 504, and the wiring conductor film 506 form a microstrip line. Further, 507 is a contact hole for connecting the wiring conductor film 506 and the ground conductor film 502, 511 is a semiconductor chip in which a transistor is formed, 512 is a signal wiring on the semiconductor chip 511, and 514 is a glass substrate 50.
1 is a bump that connects the microstrip line on 1 and the signal wiring 512 on the semiconductor chip 511.

Next, a manufacturing process for realizing the MFIC shown in FIG. 2 will be described.

First, as shown in FIG.
01 on top of the ground conductor film 502, for example, Ti / Au.
/ Ti laminated film has a thickness of 50/1000/5
It is formed so as to have a thickness of about 0 nm, and the insulating thin film 50 is formed thereon.
As 3, a silicon oxide film is deposited to a thickness of about 300 nm.

Next, as shown in FIG. 3B, a BCB film 504 having a film thickness of 20 μm is formed, and the BCB film 504 and the insulating thin film 503 are dry-etched with a CF 4 / O 2 mixed gas to form a contact hole at a desired position. 507 is formed.

Next, as shown in FIG. 3C, a wiring conductor film 506 having a desired pattern having a thickness of 2 μm is formed on the contact hole 507 and the BCB film 504 by Au plating.
It is formed in about m.

Thereafter, as shown in FIG. 3D, bumps 513 are formed by plating at desired positions on the wiring conductor film 506, and bumps are formed on the signal wirings 512 of the semiconductor chip 511 incorporating a transistor such as HEMT. 513 is connected by flip chip mounting to complete the MFIC.

In this embodiment, the insulating thin film 503 composed of a silicon oxide film is interposed between the BCB film 504 and the ground conductor film 502, and the BCB film 504 and the insulating thin film 50 are formed.
3 and 3 form a dielectric film of a microstrip line. The adhesion of this silicon oxide film to the BCB film is excellent, and even if the thickness of the BCB film is about 30 μm,
Both show good adhesion without peeling. The reason will be described below. 4A and 4B are views showing the results of measuring the adhesion of the film using a scratch tester. FIG. 4 (a) shows the results of measuring the adhesiveness by changing the type of the film formed on the grounding conductor film as the underlayer, and FIG. 4 (b) shows the adhesion by changing the type of the underlying film of the BCB film. It is a figure which respectively shows the result of having measured sex. In FIG. 4A, the vertical axis represents the load applied to the needle by the film peeled off during scanning of the scratch tester needle, and the horizontal axis represents the scanning distance of the needle. In FIGS. 10A and 10B, the characteristic line C1 is a BCB film having a thickness of 20 μm and a ground conductor film 50.
2 on the Ti / Au / Ti laminated film (thickness of 1 μm), the characteristic line C2 shows the adhesion of B of 10 μm in thickness.
The characteristic line C3 shows the special adhesion when the CB film is formed on the Ti / Au / Ti laminated film, and the characteristic line C3 shows the adhesion when the silicon oxide film (thickness: 300 nm) is formed on the ground conductor film.
Is the adhesion when a silicon nitride film (thickness of 300 nm) is formed on the ground conductor film, and the characteristic line C5 is the adhesion when a BCB film having a thickness of 20 μm is formed on the silicon oxide film (thickness of 300 nm). Characteristic line C6 is BCB with a thickness of 20 μm
FIG. 6 is a characteristic diagram showing adhesion when a film is formed on a silicon nitride film (thickness: 300 nm). Referring to the figure, it can be seen that the adhesion of the BCB film on the Ti / Au / Ti laminated film is poor, and particularly when the thickness of the BCB film is 20 μm, the adhesion is extremely low. On the other hand, it can be seen that sufficient adhesion is obtained with the silicon oxide film and the silicon nitride film on the ground conductor film and the BCB film on the silicon oxide film and the silicon nitride film. Therefore, it is understood that by interposing the silicon oxide film or the silicon nitride film between the ground conductor film and the BCB film, the peeling of the BCB film from the ground conductor film can be effectively prevented.

In the method of the first embodiment as well, the BCB
From this evaluation result, it can be confirmed that up to a thickness of about 10 μm, the adhesion can be secured to some extent without interposing another insulating film such as a silicon oxide film. However, even in that case, there is an advantage that the adhesion of the BCB film to the base can be further strengthened by interposing an insulating thin film such as a silicon oxide film on the base of the BCB film.

Further, in this embodiment, the contact hole 5
When dry etching for forming 07 is performed, the insulating thin film 503 formed of a silicon oxide film is formed into the BCB film 5.
Since etching can be performed with the same gas as under 04 under the same conditions, the processing can be performed by one etching, and the number of steps does not increase.

(Third Embodiment) In the second embodiment, B
Although the case where the insulating thin film is formed below the CB film has been described, the insulating thin film is formed above the BCB film in the third embodiment.

FIGS. 5 and 6A to 6E are sectional views showing the structure and manufacturing process of the MFIC according to the third embodiment.

In FIGS. 5 and 6A to 6E,
The relationship between the reference numerals and the members is as follows. Reference numeral 501 is a substrate made of glass, Si or the like, and 502 is a substrate 501.
A ground conductor film made of a Ti / Au / Ti laminated film formed on the above, and 504 B formed on the ground conductor film 502.
CB film, 505 is an insulating thin film made of a silicon oxide film formed on the BCB film 504, and 506 is an insulating thin film 505.
It is a wiring conductor film made of Au formed on the above. The ground conductor film 502, the BCB film 504, the insulating thin film 505, and the wiring conductor film 506 form a microstrip line. 507 is a contact hole for connecting the wiring conductor film 506 and the ground conductor film 502,
510 is a thin film resistor formed on the insulating thin film 505,
511 is a semiconductor chip in which a transistor is formed, 512 is a signal wiring on this semiconductor chip 511,
Reference numeral 14 is a bump that connects the microstrip line on the glass substrate 501 and the signal wiring 512 on the semiconductor chip 511.

The manufacturing process of the MFIC of this embodiment will be described below.

First, as shown in FIG. 6A, a ground conductor film 502 such as Ti is formed on the glass substrate 501.
/ Au / Ti laminated film with a thickness of 50/1000
The thickness is about 50 nm, and the BCB film 504 is formed thereon with a thickness of about 20 μm.

Next, as shown in FIG. 6B, an insulating thin film 505, for example, a silicon nitride film having a thickness of 300 nm is formed on the entire surface.
A thin film resistor 510 made of, for example, a NiCr thin film is further formed thereon.

Next, as shown in FIG. 6C, the insulating thin film 505 and the BCB film 504 are dry-etched with a CF4 / O2 mixed gas, and the contact hole 50 is formed at a desired position.
7 is formed.

Next, as shown in FIG. 6D, Au is deposited in the contact hole 507 and on the insulating thin film 505.
2μ of wiring conductor film 506 having a desired pattern is formed by plating.
It is formed with a thickness of about m.

Thereafter, as shown in FIG. 6E, bumps 513 are formed by plating at desired positions on the wiring conductor film 506, and the bumps 513 are connected to the signal wiring 512 of the semiconductor chip 511 by flip-chip mounting. MFIC
To complete.

In this embodiment, the insulating thin film 505 (for example, a silicon nitride film) that constitutes the dielectric film together with the BCB film 504 has the function of enhancing the adhesion of the NiCr thin film that constitutes the thin film resistor 510, and Fever of BC
It has a function as a protective film for preventing transmission to the B film. Therefore, heat generated from the thin film resistor 510 is generated by the BCB film 5.
Since it is difficult to transmit to the B.C.O.4, the BCB film 504 is not cracked or deformed due to thermal shock, and a highly reliable MFIC can be realized.

The insulating thin film 505 is the semiconductor chip 51.
1 or 2 when flip chip bonding 1
Of the wiring conductor film 506 or 509. This prevents the bonding pressure from being transmitted to and absorbed in the BCB film 504, and an appropriate pressure is applied to the bumps, so that the bonding is favorably performed.

(Fourth Embodiment) In the second embodiment, B
In the third embodiment, the insulating thin film is formed under the CB film, and in the third embodiment, the insulating thin film is formed over the BCB film. In the fourth embodiment, the insulating thin film is formed under and over the BCB film.

FIGS. 7 and 8A to 8E are sectional views showing the structure and manufacturing process of the MFIC according to the fourth embodiment.

7 and 8, the relationship between the reference numerals and the members is as follows. Reference numeral 501 is a substrate made of glass, Si or the like, 502 is a ground conductor film made of a Ti / Au / Ti laminated film formed on the substrate 501, 503.
Is a first insulating thin film made of a silicon oxide film formed on the ground conductor film 502, and 504 is a first insulating thin film 503.
Is formed on the BCB film 504, a second insulating thin film made of a silicon oxide film is formed on the BCB film 504, and 506 is an A formed on the second insulating thin film 505.
It is a first wiring conductor film made of u. A part of the first wiring conductor film 506 serves as a lower electrode of the capacitor. Reference numeral 507 denotes a contact hole for connecting the first wiring conductor film 506 and the ground conductor film 502, and 508.
Is an interlayer insulating film that serves as a capacitor portion of the capacitor, and 509 is a second wiring conductor film that partially serves as an upper electrode of the capacitor. The ground conductor film 502, the first and second insulating thin films 5
03 and 505, BCB film 504 and wiring conductor film 506
Alternatively, 509 forms a microstrip line. Further, 510 is a thin film resistor formed on the second insulating thin film 505, and 511 is a semiconductor chip in which a transistor is formed. This transistor has a cutoff frequency used in the quasi-millimeter wave to millimeter wave band, for example. 120
It is a heterojunction field effect transistor for a high frequency of MHz. Reference numeral 512 is a signal wiring on the semiconductor chip 511, and 513 is a wiring conductor film 506 or 50 on the substrate 501.
9 is a bump for connecting the signal wiring 512 on the semiconductor chip 511.

The manufacturing process of the MFIC of this embodiment will be described below.

First, as shown in FIG. 8A, the substrate 50
1 as the ground conductor film 502, for example, Ti / Au / Ti
A laminated film is formed so that each thickness is about 50/1000/50 nm, and a first insulating thin film 503 is formed thereon.
For example, a silicon oxide film is formed with a film thickness of 300 nm. Furthermore, on top of that, a BCB having a thickness of about 26 μm
A film 504 and a second insulating thin film 505 made of a silicon nitride film having a thickness of about 300 nm are formed.

Next, as shown in FIG. 8B, for example, N
After the thin film resistor 510 made of an iCr thin film is formed on the second insulating thin film 505, the second insulating thin film 505, the BCB film 504, and the first insulating thin film 503 are CF4 /
Dry etching is performed with an O2 mixed gas to form a contact hole 507 at a desired position.

Next, as shown in FIG. 8C, the first wiring made of a Ti / Au film having a desired pattern and having a desired pattern is formed in the contact hole 507 and on the second insulating thin film 505. A conductor film 506 is formed.

Next, as shown in FIG. 8D, a 200 nm-thick silicon nitride film having a desired pattern is formed as an interlayer insulating film 508 for the MIM capacitor on the entire surface of the substrate, and then Au plating is performed to obtain the desired film. The second wiring conductor film 509 having the pattern of is formed. A part of the second wiring conductor film 509 serves as an upper electrode of the MIM capacitor.

Next, as shown in FIG. 8E, bumps 513 having a height of about 10 μm are formed at desired positions on the first or second wiring conductor film 506 or 509, and then on the semiconductor chip 511. The bumps 513 are connected to the signal wirings 512 to complete the MFIC.

In this embodiment, the first and second insulating thin films 503 and 505 above and below the BCB film 504 are respectively formed of BCB.
Adhesion between the film 504 and the ground conductor film 502 and the BCB film 5
04 and the first and second wiring conductor films 506 and 509 are strengthened. Further, the second insulating thin film 505 on the BCB film 504 also has a function as a protective film for preventing the heat generated from the NiCr thin film forming the thin film resistor 510 from being transmitted to the BCB film 504, and the thin film resistor 510.
Since the heat generated from the BCB film 504 is difficult to transfer to the BC
There is no thermal deformation or cracking due to thermal shock of the B film 504,
A highly reliable MFIC can be realized. Further, the second insulating thin film 505 acts as a holding material for the first or second wiring conductor film 506 or 509 when the semiconductor chip 511 is flip-chip bonded. This prevents the bonding pressure from being transmitted to and absorbed in the BCB film 504, and an appropriate pressure is applied to the bumps, so that the bonding is favorably performed.

(Fifth Embodiment) Next, a fifth embodiment will be described. In the present embodiment, illustration of the structure of the semiconductor device is omitted, and the manufacturing process is illustrated in FIG.
This will be described with reference to (e). 9 (a) to 9 (e)
FIG. 11A is a sectional view showing a manufacturing process of the MFIC according to the fifth embodiment. In FIG. 9, the relationship between the reference numerals and the members is as follows. 501 is a substrate composed of glass, Si, etc., and 502 is Ti / Ti formed on the substrate 501.
A ground conductor film made of an Au / Ti laminated film, 503 is an insulating thin film made of a silicon oxide film formed on the ground conductor film 502, and 504 is a BC formed on the insulating thin film 503.
A B film 506 is a wiring conductor film made of Au formed on the BCB film 504. Further, 507 is a contact hole for connecting the first wiring conductor film 506 and the ground conductor film 502, and 520 is a metal burying layer connecting the wiring conductor film 506 and the ground conductor film 502. The ground conductor film 502, the insulating thin film 503, the BCB film 504, and the wiring conductor film 506 form a microstrip line. Reference numeral 511 denotes a semiconductor chip having a transistor formed therein, which is a high-frequency heterojunction field effect transistor having a cutoff frequency of 120 MHz used in the quasi-millimeter wave to millimeter wave band. Reference numeral 512 is a signal wiring on the semiconductor chip 511, and 513 is a wiring conductor film 506 on the substrate 501 and the signal wiring 512 on the semiconductor chip 511.
It is a bump to connect with.

The manufacturing process of the MFIC of this embodiment will be described below.

First, as shown in FIG. 9A, the substrate 50
1 as the ground conductor film 502, for example, Ti / Au / Ti
A laminated film is formed to have a thickness of about 50/1000/50 nm, and a silicon oxide film, for example, having a film thickness of 300 nm is formed thereon as an insulating thin film 503.

Next, as shown in FIG. 9B, a BCB film 504 is formed to a film thickness of 20 μm, and the insulating thin film 505, the BCB film 504 and the silicon oxide film 503 are CF4 /.
Dry etching is performed with an O2 mixed gas to form a contact hole 507 at a desired position.

Next, as shown in FIG. 9C, the contact hole 5 is formed by a selective plating method using the ground conductor film 502 exposed in the contact hole 507 as a seed metal.
A metal burying layer 520 is formed in 07.

Next, as shown in FIG. 9D, the metal burying layer 520 and BCB are formed by Au plating.
A wiring conductor film 506 having a desired pattern on the film 504.
To have a thickness of 1 μm.

Next, as shown in FIG. 9E, bumps 513 are formed by Au plating at desired positions on the wiring conductor film 506, and the signal wirings 512 of the semiconductor chip 511 incorporating transistors such as HEMTs are formed. Wiring conductor film 50
Flip-chip connection is made on 6 to complete the MFIC.

In this embodiment, since the insulating thin film 503 is introduced to enhance the adhesion of the thick BCB film 504,
The same effect as each of the above-described embodiments can be obtained.

In addition, the following effects can be obtained by introducing a step of filling the contact hole with metal by selective plating. That is, in the future, even in the MFIC using the BCB film as the dielectric film, the integration will be advanced and the transmission line pattern will be further miniaturized. Along with that BC
It is considered that the ground contact of the B film is also fine and the aspect ratio of the contact hole is considerably large. When the aspect ratio of the contact hole becomes large, it is difficult to form the wiring conductor film with good coverage. Therefore, a process of newly filling the contact hole for grounding with metal by selective plating was introduced. As a result, the contact hole having a large aspect ratio, that is, a small and deep contact hole can be filled with the buried metal layer, and the subsequent step of forming the wiring conductor film can be performed extremely easily.

(Sixth Embodiment) Next, a sixth embodiment will be described. The present embodiment relates to a configuration in which an insulating thin film is provided under the bonding pad of the wiring conductor film. FIG. 10 is a cross-sectional view of the wiring board according to this embodiment.

In FIG. 10, the relationship between reference numerals and members is as follows. 501 is a substrate composed of glass, Si, etc., and 502 is Ti / Ti formed on the substrate 501.
A ground conductor film composed of an Au / Ti laminated film, 504 is a BCB film formed on the ground conductor film 502, and 505 is BCB.
An insulating thin film formed on the film 504 and a wiring conductor film 506 made of Au formed on the insulating thin film 505. Then, in the pad portion 531 of the wiring conductor film 506,
The wire 530 is connected.

Although not shown, a semiconductor chip containing a transistor such as HEMT is flip-chip connected on the substrate 501 in a region other than the cross section shown in this figure.

In this embodiment, the pad portion 53 to which at least the wire 530 is connected in the wiring conductor film 506.
By providing the insulating thin film 505 on the base of No. 1, it is possible to effectively prevent the wiring conductor film 506 from peeling from the BCB film 504 when the wire 530 is bonded to the microstrip line.

(Seventh Embodiment) Next, a seventh embodiment will be described. FIG. 11 is a cross-sectional view of the semiconductor device according to this embodiment. However, since FIG. 11 shows the structure in a region other than the region where the semiconductor chip is mounted, the semiconductor chip is not shown.

In FIG. 11, the relationship between reference numerals and members is as follows. 501 is a substrate composed of glass, Si, etc., and 502 is Ti / Ti formed on the substrate 501.
A ground conductor film composed of an Au / Ti laminated film, 504 is a BCB film formed on the ground conductor film 502, and 506 is BCB.
A first wiring conductor film made of Au is formed on the film 504, and 508 is an interlayer insulating film serving as a capacitor portion of a capacitor made of a silicon oxide film, a silicon nitride film, or the like.
Reference numeral 09 is a second wiring conductor film made of Au. And
The first wiring conductor film 506 serves as a lower electrode, the interlayer insulating film 508 serves as a capacitor portion, and a portion 509 of the second wiring conductor film.
An MIM capacitor having a as an upper electrode is formed. In addition, the interlayer insulating film 508 of the capacitor is formed not only in the portion which becomes the capacitor portion of the capacitor but also over the entire BCB film 504.
Thus, similar to the insulating thin film in each of the above-described embodiments, the adhesion between the second wiring conductor film 509 and the BCB film 504 is improved. Further, a part 509b of the second wiring conductor film is connected to the first wiring conductor film 506 through an opening provided in a part of the interlayer insulating film 508. The pad portion 531 is formed on the part 509b, and the wire 53 is formed on the pad portion 531.
0 is connected. However, the second wiring conductor film 509
In, the pad portion 531 is 50 μm away from the capacitor.
The above distance D1 is provided. In the area other than the capacitor, the ground conductor film 502 and the BCB film 5
04, the interlayer insulating film 508, and the second wiring conductor film 509 form a microstrip line.

The first wiring conductor film 506 constitutes a microstrip line together with the BCB film 504 and the ground conductor film 502 without having a film functioning as an insulating thin film in the base. Although not shown in the drawing, H is formed on the substrate 501 in a region other than the cross section shown in this drawing.
A semiconductor chip containing a transistor such as EMT is flip-chip connected.

In the structure of the conventional MFIC, when the MIM capacitor is formed on the substrate, the interlayer insulating film serving as the capacitance portion of the capacitor is formed only between the upper and lower electrodes of the capacitor and the peripheral portion thereof. On the other hand, in the present embodiment,
Insulating film that becomes the capacitance part of the capacitor (interlayer insulating film 508)
Is formed over the entire BCB film 504 outside the capacitor, so that the insulating film necessary for this capacitor is used to make the insulating thin film 5 in the sixth embodiment.
Similar to 05, it is possible to effectively prevent the wiring conductor film 509 from coming off from the BCB film 504 when the wire 530 is bonded. Therefore, in this embodiment, it is not necessary to increase the number of steps for forming the insulating thin film for enhancing the adhesion of the wiring conductor film to the BCB film. Therefore, there is an advantage that the manufacturing cost can be further reduced as compared with the sixth embodiment.

(Eighth Embodiment) Next, an eighth embodiment will be described. 12A and 13 are a cross-sectional view and a plan view of the semiconductor device according to this embodiment. However, FIG. 12A shows the wafer-shaped substrate 5 shown in FIG.
In the rectangular substrate chip 501a cut out from 01
It is a sectional view taken along line II-II.

In FIG. 12A, the relationship between the reference numerals and the members is as follows. 501 is a substrate made of glass, 502 is Ti / A formed on the substrate 501.
A ground conductor film made of a u / Ti laminated film, 504 is a BCB film formed on the ground conductor film 502, and 506 is a wiring conductor film made of Au formed on the BCB film 504. Further, in the present embodiment, a part 502x of the ground conductor film 502 is separated from the other part and insulated from the ground, and this part 502x serves as a pad part 531. In the pad portion 531, the BCB is provided below the wiring conductor film 506 to which the wire 530 is connected.
Membrane 504 is not present.

On the other hand, as shown in FIG. 13, a microstrip line or the like is formed on each of a large number of rectangular substrate chips 501a cut out from a wafer-shaped substrate 501. FIG. 13 shows that the pad portion 531 is separated from the ground conductor film 502. Further, on the substrate 501, Rbcb represents a formation region of the BCB film 504, and Rscrb represents a scribe line. That is, the BCB film 504 is configured not to exist in the scribe line Rscrb.

In this embodiment, the wafer-shaped substrate 5 is used.
The semiconductor chip 511 is flip-chip connected onto each substrate chip 501a before each substrate chip 501a is cut out from 01. However, after the substrate chip 501a is cut out from the wafer-shaped substrate 501, the semiconductor chip 51 is cut off.
1 may be flip-chip connected on the wiring conductor film 506 on each substrate chip 501a.

In this embodiment, the following effects can be obtained.

First, in the pad portion 531 for connecting the wire 530, the wiring conductor film 506 does not interpose the BCB film 504, but a part 502 of the ground conductor film 502.
It is formed on the substrate 501 via x. Therefore, compared with each of the above-described embodiments, the adhesion of the wiring conductor film 506 to the underlying layer can be maintained higher, and peeling of the wiring conductor film 506 during wire bonding can be prevented more reliably.

Secondly, the wiring conductor film 506 in the pad portion 531 is patterned by patterning the ground conductor film 502.
The base can be easily formed.

Third, BCB is placed on the scribe line Rscrb.
Since the film 504 does not exist, when the wafer-shaped substrate 501 is divided into rectangular substrate chips 501a by dicing, the BCB resin does not get caught in the cutter blade, and the life of the cutter blade is improved, and Maintenance is also easy.

Fourth, since no stress is applied to the BCB film 504 itself during dicing, the BCB film 50
4 does not damage the wiring conductor film 506.

Fifth, by dividing the BCB film 504 into fine pieces in the wafer state as described above, the stress applied to the BCB film itself is reduced, cracks and the like in the BCB film are less likely to occur, and some cracks occur. If it occurs, it is prevented from expanding to other parts, so that the manufacturing yield is also improved.

FIG. 12B is a cross-sectional view showing a modified example of this embodiment in which the substrate 501 is made of Si. In this case, after forming an insulating thin film 503 made of a silicon oxide film or the like on the substrate 501,
A ground conductor film 502, a BCB film 504, a wiring conductor film 506, etc. are formed on the insulating thin film 503. By providing the insulating thin film 503 in this way, conduction between the ground conductor film 502 and the pad portion 531 can be reliably avoided.

(Ninth Embodiment) Next, a ninth embodiment will be described. FIG. 14 is a sectional view showing the structure of a part of the semiconductor device according to the ninth embodiment.

As shown in FIG. 14, the structure of this embodiment is basically the same as that of the eighth embodiment. However, in this embodiment, the substrate 501 is made of a silicon single crystal, and the pad portion 531 is formed of a silicon oxide film on a part of the substrate 501.
It is provided above 0. That is, when the substrate is made of a semiconductor such as silicon and a transistor is formed on any of the substrates 501, the LOC for element isolation is formed.
Since the OS film 540 is formed, the LOCOS film 54
By forming the pad portion 531 on 0, there is an advantage that the pad portion 531 can be reliably insulated from the ground without increasing the number of steps.

In each of the above embodiments, the substrate 501 is made of glass or Si, but the substrate in the present invention is not limited to this, and may be a ceramic substrate or another substrate. Further, the insulating thin film has been described by using the silicon oxide film or the silicon nitride film, but the insulating thin film in the present invention is not limited to this and may be another type of insulating film.

Further, the first and second insulating thin films described in the fourth embodiment are described as the silicon oxide film and the silicon nitride film, respectively. In these, the first is the silicon nitride film and the second is the silicon oxide film. It may be a membrane. In each of the embodiments, a laminated film of a silicon oxide film and a silicon nitride film, a silicon oxynitride film, or the like can be used for any of the insulating thin films. Further, an insulating film other than the silicon oxide film or the silicon nitride film, preferably an inorganic insulating film can be used. When forming the insulating thin films on and under the BCB film, both may be the same film.

The semiconductor chip described in each embodiment is not limited to this, and may be another device. Also,
Although the wiring conductor film has been described as a single-layer wiring in each embodiment, there is no problem even if the wiring conductor film is a multilayer wiring due to the pattern layout or the layout of the passive elements. Further, the material of the wiring conductor film and the ground conductor film is not limited to the materials shown in the above embodiments, and various conductive materials can be arbitrarily selected and used.

In each of the above embodiments, the ground conductor film 502 is formed on the substrate 501, but this film 502 is not necessarily grounded, and the wiring conductor film 506 or 509 is grounded. Good.

[0139]

According to the present invention, since the dielectric film of the microstrip line is composed of the BCB film and the insulating thin film formed in contact with the BCB film, the adhesion is high and the reliability is high. It is possible to realize an MFIC with a low insertion loss that can favorably perform flip chip bonding.

According to the eleventh to nineteenth aspects, since the dielectric film of the microstrip line is composed of the BCB film and the pad portion and the scribe line for wire bonding are not provided on the BCB film, the adhesion is improved. It is possible to realize an MFIC that has good performance, high reliability, and low insertion loss.

According to the twentieth to twenty-eighth aspects, since the insulating thin film is formed before or after the formation of the BCB film as the method of manufacturing the semiconductor device, the adhesion of the BCB film can be remarkably enhanced, and the reliability of the semiconductor device can be improved. It is possible to greatly improve the property. Further, the yield of flip chip bonding can be greatly improved by the insulating thin film on the BCB film.

In particular, according to the twenty-third and twenty-fourth aspects, it is possible to easily form a fine wiring conductor film by selectively forming a buried metal in the fine ground contact, and to cope with future integration and miniaturization. A manufacturing method is provided.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of an MFIC according to a first embodiment.

FIG. 2 is a sectional view showing a configuration of an MFIC according to a second embodiment.

FIG. 3 is a cross-sectional view showing a manufacturing process of the MFIC according to the second embodiment.

FIG. 4 is a diagram showing the adhesiveness of each film in the MFIC according to the second embodiment.

FIG. 5 is a sectional view showing a configuration of an MFIC according to a third embodiment.

FIG. 6 is a cross-sectional view showing the manufacturing process of the MFIC according to the third embodiment.

FIG. 7 is a sectional view showing a configuration of an MFIC according to a fourth embodiment.

FIG. 8 is a cross-sectional view showing the manufacturing process of the MFIC according to the fourth embodiment.

FIG. 9 is a cross-sectional view showing the manufacturing process of the MFIC according to the fifth embodiment.

FIG. 10 is a cross-sectional view showing a structure of a wiring board near a pad portion in an MFIC according to a sixth embodiment.

FIG. 11 is a cross-sectional view showing a structure of a wiring board near a pad portion in an MFIC according to a seventh embodiment.

FIG. 12 is a sectional view taken along line II-II in FIG. 13 showing a structure of a wiring board near a pad portion in an MFIC according to an eighth embodiment and a modification thereof.

FIG. 13 is a plan view showing the structure of a substrate in a wafer state during the manufacturing process of the MFIC according to the eighth embodiment.

FIG. 14 is a cross-sectional view showing a structure of a wiring board near a pad portion in an MFIC according to a ninth embodiment.

FIG. 15 is a cross-sectional view showing a configuration of a conventional MFIC.

[Explanation of symbols]

 501 substrate 502 ground conductor film 503 insulating thin film 504 BCB film 505 insulating thin film 506 wiring conductor film 507 contact hole 508 interlayer insulating film 509 wiring conductor film 510 thin film resistor 511 semiconductor chip 512 signal wiring 513 bump 520 metal embedding layer 530 wire 531 pad Part 540 LOCOS film

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kaoru Inoue 1-1 Sachimachi, Takatsuki-shi, Osaka Prefecture Matsushita Electronics Industrial Co., Ltd. (72) Takayuki Yoshida 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd. Within

Claims (28)

[Claims] 1. A semiconductor device comprising a wiring board having a substrate and a dielectric film formed thereon, wherein the dielectric film is a benzocyclobutene film (hereinafter referred to as BCB) formed on a part of the substrate. Abbreviated as a film) and an insulating thin film formed on at least one of the upper and lower sides of the BCB film and in contact with the BCB film. 2. The semiconductor device according to claim 1, wherein the insulating thin film is made of at least one of silicon nitride, silicon oxide and silicon oxynitride. 3. The semiconductor device according to claim 1, wherein the BCB film has a thickness greater than 10 μm. 4. The semiconductor device according to claim 1, further comprising a conductor film formed on a side opposite to the BCB film with the insulating thin film interposed therebetween. 5. The semiconductor device according to claim 4, wherein the conductor film is a base conductor film formed in contact with the substrate, and the BCB film is formed above the base conductor film. A wiring conductor film formed on the side opposite to the underlying conductor film with the BCB film and the insulating thin film sandwiched therebetween is further provided, and the underlying conductor film, the BCB film, the insulating thin film and the wiring conductor film constitute a microstrip line. A semiconductor device characterized in that 6. The semiconductor device according to claim 5, wherein a semiconductor chip having a transistor, a signal wiring formed on a surface of the semiconductor chip and connected to the transistor, and the signal wiring and the wiring conductor film are included. A semiconductor device further comprising a bump formed on at least one of the above, and the signal wiring of the semiconductor chip and the wiring conductor film are connected via the bump. 7. The semiconductor device according to claim 6, wherein the insulating thin film is formed at least between the BCB film and the wiring conductor film, and a thin film resistor formed on the insulating thin film is formed. Further provided is a semiconductor device. 8. The semiconductor device according to claim 6, wherein the insulating thin film is formed at least between the BCB film and the wiring conductor film, and a part of the wiring conductor film is provided as an external member. A semiconductor device, wherein a pad region connected through a wire is formed. 9. The semiconductor device according to claim 6, further comprising a capacitor, wherein the insulating thin film is formed at least between the BCB film and the wiring conductor film, and between the insulating thin film and the BCB film. Further includes a lower electrode film of the capacitor interposed in a part of the wiring conductor film, the wiring conductor film functions as an upper electrode of the capacitor above the lower electrode film, and the insulating thin film serves as the lower electrode film. While functioning as a capacitance part of the capacitor with the wiring conductor film, it extends to a region other than above the lower electrode film and is interposed between the wiring conductor film and the BCB film. Semiconductor device. 10. The semiconductor device according to claim 9, further comprising a pad region formed in a part of the wiring conductor film and connected to an external member via a wire, wherein the pad region is formed of the capacitor. A semiconductor device characterized in that it is separated by 50 μm or more from a portion to be an upper electrode. 11. The semiconductor device according to claim 9, wherein a region of the wiring conductor film other than the upper electrode of the capacitor is connected to the lower electrode film through a contact hole formed in the insulating thin film. And a pad region connected to an external member through a wire is formed in a part of the lead portion of the wiring conductor film. 12. A substrate, a base conductor film formed on the substrate, and a BC formed on at least a part of the base conductor film.
A B film and a wiring conductor film formed on the BCB film and forming a microstrip line together with the base conductor film and the BCB film are provided, and the wiring conductor film is the BCB film on the substrate. A semiconductor device, which extends to an uncovered region, and a pad region which is connected to an external member via a wire is formed in this region. 13. The semiconductor device according to claim 12, wherein most of the base conductor film functions as a ground conductor film, and a part of the base conductor film is separated from the most part. A semiconductor device, wherein the pad region of the wiring conductor film is formed on and in contact with the semiconductor layer. 14. A substrate made of a semiconductor, element isolation made of an insulating material formed on the substrate, a base conductor film formed on the substrate, and at least a part of the base conductor film. A BCB film formed above and on a region excluding the element isolation, and a wiring conductor film formed on the BCB film and forming a microstrip line together with the base conductor film and the BCB film, The semiconductor device, wherein the wiring conductor film extends to a region above the element isolation, and a pad region connected to an external member via a wire is formed in this region. 15. The semiconductor device according to claim 1, 5, 6, 12 or 14, wherein the substrate is made of Si or glass. 16. A method according to claim 6, 7, 8, 9, 10 or 11.
The semiconductor device as described above, wherein the semiconductor chip is made of a compound semiconductor containing GaAs. 17. The method according to claim 6, 7, 8, 9, 10 or 11.
The semiconductor device according to claim 1, wherein the semiconductor chip is composed of a semiconductor having a heterojunction. 18. The method according to claim 6, 7, 8, 9, 10 or 11.
The semiconductor device according to claim 1, wherein the transistor is a high-frequency transistor used in a quasi-millimeter wave to a millimeter wave. 19. A wafer-shaped substrate, a base conductor film formed on the substrate, and a BC formed on at least a part of the base conductor film.
A B film and a wiring conductor film which is formed on the BCB film and constitutes a microstrip line together with the base conductor film and the BCB film, and a scribing plan for dividing the substrate into a plurality of substrate chips The semiconductor device, wherein the BCB film does not exist in the region, and the BCB film is divided for each substrate chip. 20. A first step of forming a base conductor film on a substrate, a second step of forming a BCB film on at least a part of the base conductor film, and a wiring conductor on the BCB film. A semiconductor comprising: a third step of forming a film; and a step of forming an insulating thin film in contact with the BCB film at least one of before and after the second step. Device manufacturing method. 21. The method of manufacturing a semiconductor device according to claim 20, wherein the BCB is provided after the second step and before the third step.
The method further comprises the step of forming a contact hole for exposing a part of the base conductor film at a desired position of the film and the insulating thin film, and in the third step, a part of the wiring conductor film is part of the contact hole A method of manufacturing a semiconductor device, characterized in that the wiring conductor film is formed so as to be embedded therein. 22. The method of manufacturing a semiconductor device according to claim 20, wherein in the first step, the underlying conductor film is formed into a desired pattern. 23. The method of manufacturing a semiconductor device according to claim 20, wherein the BCB is provided after the second step and before the third step.
The method further comprises: forming a contact hole for exposing a part of the underlying conductor film at a desired position of the film and the insulating thin film; and forming a metal burying layer by burying a metal in the contact hole. In the third step, the wiring conductor film is formed so that the wiring conductor film is connected to the metal burying layer. 24. The method of manufacturing a semiconductor device according to claim 23, wherein in the step of forming the metal burying layer, the metal burying layer is formed by a selective plating method using a base conductor film exposed in the contact hole as a seed metal. A method of manufacturing a semiconductor device, which comprises forming the semiconductor device. 25. Claims 20, 21, 22, 23 or 2
4. The method of manufacturing a semiconductor device according to 4, wherein in the step of forming the insulating thin film, the insulating thin film is made of at least one of silicon nitride, silicon oxide and silicon oxynitride. Production method. 26. The claim 20, 21, 22, 23 or 2
4. The method for manufacturing a semiconductor device according to item 4, wherein in the third step, the wiring conductor film is formed as a multilayer metal wiring layer. 27. A method according to claim 20, 21, 22, 23 or 2.
4. The method of manufacturing a semiconductor device according to 4, wherein a step of preparing a semiconductor chip having a transistor and a signal wire connected to the transistor, and a desired step on at least one of the wiring conductor film and the signal wire are provided. A method of manufacturing a semiconductor device, further comprising: a step of forming a bump at a position; and a step of connecting the signal wiring of the semiconductor chip and the wiring conductor film via the bump. 28. Claims 20, 21, 22, 23, 2
4, 25, 26, or 27, further comprising a dicing step for dividing the substrate into a plurality of substrate chips, and in the second step, a scribe scheduled area in the dicing step is provided. A method of manufacturing a semiconductor device, comprising forming the BCB film so that the BCB film does not exist.