JPH0922764A - Bare chip test socket - Google Patents

Abstract

(57) [Summary] [Object] The present invention relates to a bare chip test socket used when a bare chip cut out from a wafer is tested as it is, and to provide the socket suitable for easily performing a bare chip test. To aim. [Structure] A socket base 10 having an opening 10A at a substantially central portion, and a socket base 1 so as to cover the opening 10A.
A chip base 6 which is seated at 0 and slidable with respect to the socket base 10 by a stage 8, a chip guide 12 having transparent plates 14 and 16 and a conductor pattern 18, and a chip guide 12 which is detachably fixed to the socket base 10. And means 30 for doing so.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a socket for testing electronic components, and more particularly to a bare chip test socket used when testing bare chips cut out from a wafer as they are.

In recent years, a bare chip mounting technique has been put into practical use in which an electronic circuit is provided by directly mounting a bare chip on a substrate such as a printed wiring board. There is a demand for optimization of a method of individually testing the bare chips as they are.

[0003]

A bare chip having a first surface, a second surface, and a plurality of electrodes for connecting an external circuit provided on the first surface has been put into practical use. Bare chip first side and second side
The surfaces are, for example, several mm × several mm in size, and the electrode interval is extremely small, for example, 0.12 mm to 0.15 mm.

As an electrical test method for bare chips, a technique has been developed in which a plurality of fine contact probe pins having a special shape are used and these are brought into direct contact with the electrodes.

[0005]

However, this test method has the drawback that the unit cost of the contact probe pin is high and the test cost is high. Further, the state in which the contact probe pins are in accurate contact with the electrodes of the bare chip is extremely delicate, so that it is difficult to perform the burn-in test for eliminating the initial failure as it is.

Therefore, it is an object of the present invention to provide a bare chip test socket suitable for easily testing a bare chip.

[0007]

According to the present invention, there is provided a bare chip test socket which is applied to a bare chip having a first surface, a second surface and a plurality of electrodes for connecting an external circuit provided on the first surface. There is a socket base having an opening in a substantially central portion, and an upper surface and a lower surface, and is seated on the socket base so as to cover the opening, and the bare chip is mounted on the upper surface by its second surface, It is formed on a chip base slidable with respect to the socket base at least within the range of position adjustment of the electrodes by a stage for position adjustment contacting the lower surface through the opening, a transparent plate, and the transparent plate. A chip guide having a plurality of conductor patterns, and the conductor pattern facing the electrodes of the bare chip, and between the socket base and the chip guide. Chip-based and bare chip test socket the chip guide in a state in which the bare chip is sandwiched and means for detachably secured to the socket base is provided.

[0008]

The method of using the bare chip test socket of the present invention is as follows. First, the bare chip is mounted on the upper surface of the chip base by its second surface. Then, the chip guide is fixed to the socket base with the conductor pattern of the chip guide facing the electrode of the bare chip and the chip base and the bare chip being sandwiched between the socket base and the chip guide.

In this state, the position adjusting stage can be brought into contact with the lower surface of the chip base through the opening of the socket base. Therefore, the position of the bare chip electrode is adjusted by this stage to correspond to each electrode. It can be brought into contact with the conductor pattern of the chip guide. Therefore, by using the bare chip test socket of the present invention, an electrical test of the bare chip can be easily performed.

[0010]

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view of a bare chip test socket showing an embodiment of the present invention, and FIG. 2 is an exploded sectional view of the socket. For convenience of explanation, an XYZ coordinate system is defined in each drawing. The X axis is orthogonal to the paper surface, the Y axis is parallel to the horizontal direction, and the Z axis is orthogonal to the X axis and the Y axis.

A bare chip 2 cut out from a substrate made of Si or the like has a first surface (upper surface) 2A and a second surface (lower surface) 2B. A plurality of electrodes 4 for connecting an external circuit are formed on the first surface 2A. The electrodes 4 are, for example, arranged at equal intervals along the edge on the first surface 2A, and the interval between the electrodes is, for example, 0.12 to 0.15 mm.

The bare chip 2 is mounted on the chip base 6 such that the second surface 2B of the bare chip 2 is in close contact with the upper surface 6A of the chip base 6. The chip base 6 has a recess 6B on its lower surface for engaging with a stage 8 for position adjustment. Details of the position adjusting device including the stage 8 will be described later.

Reference numeral 10 represents a socket base having an opening 10A at a substantially central portion. The socket base 10 further has a step 10B at the edge facing the opening 10A.
The chip base 6 has a step 10B so as to cover the opening 10A.
It is seated on and is slidable with respect to the step 10B of the socket base at least within the range of position adjustment of the electrode 4 of the bare chip described later.

Specifically, the socket base opening 10A
By operating the stage 8 in a state where the position adjusting stage 8 is engaged with the recess 6B of the chip base via, the center of an axis parallel to the X-axis and Y-axis coordinates of the bare chip 2 and the Z-axis. The rotation angle θ can be adjusted.

Reference numeral 12 is transparent plates 14 and 16 and transparent plate 1.
6 shows a chip guide having a plurality of conductor patterns 18 formed on the surface 6. In this embodiment, the transparent plate 14
Is a quartz glass plate, and the transparent plate 16 is a film base of a flexible printed wiring board (FPC).

The transparent plates 16 and 14 are placed on the first frame member 20 in this order, and the second frame member 22 is placed on the transparent plate 14. First and second frame members 20 and 22
Openings 20A and 22A for visually observing the bare chip 2 are formed in the approximate center of each. Frame member 22
By screwing the screw 26 penetrating the transparent plate 16 into the frame member 20, the chip guide 12 is formed in a state where the transparent plates 14 and 16 are sandwiched by the frame members 20 and 22.

The chip guide 12 is mounted on the socket base 10 with the conductor pattern 18 of the transparent plate 16 facing the electrode 4 of the bare chip 2 and the chip base 6 and the bare chip 2 sandwiched between the socket base 10 and the chip guide 12. Socket base 10 for detachable fixing
An L-shaped lever 30 is swingably provided by a shaft 32 at the edge of the. In this example, four levers 30 are provided at the four corners of the socket base 10.

As shown in FIG. 1, the chip guide 12 is mounted on the socket base 10 and the edge of the socket base 12 is pressed by the tip of the lever 30 so that the bare chip 2 and the chip base 6 are sandwiched. The guide 12 can be fixed to the socket base 10.

Particularly in this embodiment, the spring 2 for urging the tip guide 12 in the direction away from the socket base 10.
8 is provided on the socket base 10. As a result, the bare chip 2 and the chip base 6 are elastically supported by the chip guide 12 and the socket base 10, and it is possible to prevent undesired displacement of the bare chip 2 with respect to the socket base 10.

The stage 8 acts on the chip base 6 while the bare chip 2 and the chip base 6 are sandwiched by the chip guide 12 and the socket base 10, so that the conductor patterns 18 and The position of the bare chip 2 can be adjusted while visually observing the relative positional relationship of the electrodes 4, and the conductor pattern 18 can be overlapped with the target electrode 4 to obtain and maintain electrical contact.

FIG. 3 is a detailed sectional view of the contact portion in this embodiment. In the present embodiment, in order to improve the electrical connection between the conductor pattern 18 of the chip guide 12 and the electrode 4 of the bare chip 2, each of the conductor patterns 18 is made of gold or a gold alloy at a position facing the electrode 4. Bump 3
4 are provided. By adopting such bumps 34, it becomes possible to repeatedly perform the burn-in test under high temperature.

That is, in the conventional method using the contact probe pin, it was difficult to repeat the burn-in test due to the deformation or surface oxidation of the probe pin, whereas in the present embodiment, it is made of gold or gold alloy. Since the bumps 34 are used, a good electrical connection between the conductor pattern 18 and the electrode 4 can be maintained even when the burn-in test is repeated.

In this embodiment, the transparent plate 14 made of quartz glass having a linear thermal expansion coefficient substantially equal to the linear thermal expansion coefficient of the bare chip 2 is used to form a transparent plate (FPC film). Since the base is supported, the relative positional relationship between the conductor pattern 18 and the electrode 4 hardly changes due to the temperature change during the burn-in test, so that the test can be satisfactorily performed.

In this embodiment, since a connector for connecting the conductor pattern 18 to the test board is adopted as will be described later, the conductor pattern 18 is a transparent plate 16 different from the transparent plate 14 made of quartz. Although it is formed on the upper side, an integral transparent plate made of quartz glass may be used and the conductor pattern may be directly formed thereon. Although the bumps 34 are formed on the conductor pattern 18 on the chip guide 12 side, the bumps may be formed on each electrode of the bare chip.

FIG. 4 is a side view of the position adjusting device applicable to this embodiment. The lower end of the support column 38 is fixed to the edge of the base 36, and the socket base 10 is attached to the upper end of the support column 38.
A table 40 on which a table (see FIG. 1) can be placed is fixed.

On the base 36, the XYθ adjusting mechanism 4
4 are provided. This mechanism 44 has a rotation angle θ
An adjustment knob 46, a Y-coordinate adjustment knob 48,
And a knob 50 for adjusting the X coordinate. These knobs 4
The stage 8 can be rotated or moved in the XY plane by adjusting 6, 48 and 50 alternately or simultaneously.

Next, a method of using the bare chip test socket and the position adjusting device in this embodiment will be described. First, the socket base 1 is placed on the table 40 of the position adjusting device.
0 is mounted and the socket base 10 is fixed to the position adjusting device by a clamp means (not shown).

Next, the chip base 6 is replaced with the socket base 1.
The chip base 6 to cover the opening 10A
The chip 8 is placed on the stage B, and the stage 8 is engaged with the recess 6B on the lower surface of the chip base 6. Then, the bare chip 2 is placed on the chip base 6, the bare chip 2 and the chip base 6 are sandwiched by the chip guide 12 and the socket base 10, and this state is determined by the lever 30.

In this state, the knobs 46, 48 and 50 of the position adjusting mechanism 44 are observed while observing the relative positional relationship between the conductor pattern 18 and the electrode 4 through the transparent plates 14 and 16.
The bare chip 2 is adjusted in position so that a predetermined electrical connection between the conductor pattern 18 and the electrode 4 is established.

Thereafter, the bare chip test socket is removed from the position adjusting device and a predetermined test is performed. An example of the bare chip electrical test method will be described with reference to FIG. FIG. 5 is a sectional view showing a state in which the bare chip test socket of this embodiment is mounted on a test board.

In this embodiment, a connector 52 is provided at the end of the transparent plate (FPC) 16, and this connector 5
By mounting 2 on the test board 54, the conductor pattern 18 and the circuit on the test board 54 are connected.

The bare chip test socket is mounted on the test board 54, and the connectors 52 are mounted on the test board 54 on both sides of the test socket. According to this embodiment, the electrode 4 of the bare chip 2 can be easily electrically connected to the circuit of the test board 54.
Can be easily tested.

By using an elastic body such as rubber as the material of the chip base 6, the parallelism of the bare chip 2 (parallelism to the transparent plate) when adjusting the position of the bare chip 2
Is easy to secure.

In the embodiment described above, the method of manually adjusting the position of the bare chip is shown. However, the relative position relationship between the electrode and the conductor pattern is monitored by image recognition by a camera or the like, and the position adjustment of the bare chip is automated. You can also do it.

[0035]

As described above, according to the present invention,
As a result, it is possible to provide a bare chip test socket suitable for easily performing a bare chip test.

[Brief description of drawings]

FIG. 1 is a sectional view of a bare chip test socket showing an embodiment of the present invention.

FIG. 2 is an exploded sectional view of a bare chip test socket showing an embodiment of the present invention.

FIG. 3 is a detailed sectional view of a contact portion showing an embodiment of the present invention.

FIG. 4 is a side view of a position adjusting device applicable to an embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a state in which a bare chip test socket is mounted on a test board in an embodiment of the present invention.

[Explanation of symbols]

 2 Bare chip 4 Electrode 6 Chip base 8 Stage 10 Socket base 12 Chip guide 14, 16 Transparent plate 18 Conductor pattern

Claims (8)

[Claims] 1. A bare chip test socket applied to a bare chip having a first surface, a second surface, and a plurality of electrodes for external circuit connection provided on the first surface, wherein an opening is provided at a substantially central portion. And a socket base having an upper surface and a lower surface, and is seated on the socket base so as to cover the opening, the bare chip is mounted on the upper surface by the second surface thereof, and contacts the lower surface through the opening. And a chip guide having a transparent plate and a plurality of conductor patterns formed on the transparent plate. And the conductor pattern faces the electrode of the bare chip and is between the socket base and the chip guide. Bare-chip test socket for the chip guide in a state in which up is sandwiched and means for detachably secured to the socket base. 2. The bare chip test socket according to claim 1, wherein the transparent plate includes a quartz glass plate. 3. The spring according to claim 1, further comprising a spring provided on the socket base and interposed between the socket base and the chip guide to urge the chip guide away from the socket base. Bare chip test socket. 4. The bare chip test socket according to claim 1, further comprising a bump provided on the conductor pattern at a position corresponding to the electrode of the bare chip and contacting the electrode. 5. The bare chip test socket according to claim 4, wherein the bump is made of gold or a gold alloy. 6. The bare chip test socket according to claim 1, wherein the chip base is made of an elastic material. 7. The transparent plate includes a flexible printed wiring board having the conductor pattern formed on the surface thereof, and a connector provided at an end of the flexible printed wiring board for connecting the conductor pattern to a test board. The bare chip test socket according to claim 1, further comprising: 8. The chip guide includes first and second frame members each having an opening at a substantially central portion and sandwiching the transparent plate, and means for fixing the first and second frame members to each other. The bare chip test socket according to claim 1, further comprising: