JPH09167807A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Abstract

Kind Code: A1 A semiconductor device that always exhibits good write characteristics and erase characteristics by suppressing gate bird's beaks and improving coupling, and a semiconductor device that easily and with good yield. Providing manufacturing methods that can be manufactured. A semiconductor device is provided with a gate structure (4) having a structure in which a gate oxide film (4a), a first electrode layer (4b), a gate insulating film (4c), and a second electrode layer (4d) are sequentially stacked. Is at least the first electrode layer 4b and the second electrode layer
A layer in contact with the 4d are formed in the nitride silicon 4c _1, 4c _3, and nitride the silicon layer 4c _1, 4c silicon oxide layer between ₃
The semiconductor device is characterized in that it is of a stacked type in which 4c ₂ is inserted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a gate structure and a method for manufacturing the same, and more particularly to a semiconductor device having good write characteristics and erase characteristics, and a semiconductor device having such a structure. A method that can be manufactured.

[0002]

2. Description of the Related Art A semiconductor device having a gate structure, such as an EEPROM (nonvolatile memory) element, is widely known as a so-called memory element (device) and is put to practical use. The gate structure in this type of semiconductor device is configured as shown in FIG.

In FIG. 3, reference numeral 1 is a semiconductor substrate having an active element region composed of a drain region 1a, a gate region 1b and a source region 1c, and 2 is a gate oxide film (tunnel) formed in sequence on the surface of the gate region 1b. The gate structure includes an oxide film) 2a, a first electrode layer (floating gate) 2b, a gate insulating film 2c, a second electrode layer (control gate) 2d, and a stabilizing protective film 2e. Where the first electrode layer
2b and the second electrode layer 2d are made of, for example, polysilicon, α
-It is formed of silicon (amorphous silicon) or tungsten silicon, and the gate insulating film 2c includes a silicon oxide layer 2c ₁ -a silicon nitride layer 2c ₂ -a silicon oxide layer 2c.
_It is formed in a laminated type of ₃ and further, stabilizing protective film 2e
Are formed by oxidation of the outer peripheral surfaces of the electrode layers 2b and 2d.

Incidentally, the above-mentioned gate insulating film 2c is formed into a laminated type.
This is intended to reduce the adverse effects on the writing characteristics and the erasing characteristics due to the miniaturization of the wiring and the gate width accompanying the higher integration of the active element region. That is, the gate structure 2
The stabilization protective film 2e is formed by controlling the amount of oxidation of the electrode layers 2b and 2d, but it becomes difficult to control the amount of oxidation with the miniaturization of the wiring and the gate width, and writing as designed. Since the characteristics and the erasing characteristics cannot be ensured, the insulating film 2c is multilayered to adjust the capacitance and the like to improve the writing characteristics and the erasing characteristics.

Next, a method of manufacturing the semiconductor device having the gate structure will be described with reference to FIGS. 4 (a) and 4 (b). First, a gate oxide film 2a is formed by, for example, a CVD method on the surface of the first conductivity type semiconductor substrate 1 formed by diffusing the first conductivity type impurities, and the first oxide film 2a is formed on the gate oxide film 2a.
As the electrode layer (floating gate) 2b of, for example, a polysilicon layer is formed.

Thereafter, a silicon oxide layer 2c ₁ , a silicon nitride layer 2c ₂ and a silicon oxide layer 2c ₃ are sequentially formed by, for example, a CVD method, and the second electrode layer (control layer) is further formed on the silicon oxide layer 2c _3. As the gate) 2d, for example, a polysilicon layer is formed. Then, the film formations 2a, 2b, 2c ₁ ,
The laminated film of 2c ₂ , 2c ₃ and 2d is processed by, for example, an RIE device to form a predetermined group 2 of gate structures.

After forming the above-mentioned group of gate structures 2, a thermal oxidation process is performed, and each gate structure 2 has a first gate oxide layer (first gate bird's beak) as shown in a sectional view in FIG. 4 (a). ) 2e ₁ is formed to prevent surface contamination. Next, the semiconductor substrate 1 adjacent to the gate structure 2
The second conductivity type impurity is selectively diffused on the surface to form a second impurity region corresponding to the drain region 1a and the source region 1c, and then thermal oxidation treatment is performed to form a second impurity region shown in FIG. As shown in a cross-sectional view, by forming a second gate oxide layer (second gate bird's beak) 2e ₂ , a gate having a laminated gate insulating film 2c interposed between the floating gate 2b and the control gate 2d. A semiconductor device having a structure is manufactured.

[0008]

However, in the case of the semiconductor device and the manufacturing method thereof having the above configuration, there are the following inconvenient problems. I.e. usually 800-9
The first gate oxide layer formed by the thermal oxidation process for forming the _first gate oxide layer 2e ₁ performed at a high temperature of about 00 ° C.
2e ₁ is combined with the silicon oxide layers 2c ₁ and 2c ₃ which are in contact with the floating gate 2b and the control gate 2d, respectively, resulting in an increase in capacitance between the floating gate 2b and the control gate 2d. Further, in the growth of this silicon oxide film, the growth on the side surface side (cutting in the lateral direction) can be controlled by controlling the thermal oxidation treatment, but the growth on the surface in contact with the floating gate 2b and the control gate 2d (thickness It cannot control the bite in the vertical direction.

As described above, when the gate insulating film 2c is a laminated type of the silicon oxide layer 2c ₁ -the silicon nitride layer 2c ₂ -the silicon oxide layer 2c ₃ , the bird's beak (biting of the gate insulating film) should be controlled. Therefore, the so-called coupling is adversely affected, and it cannot be said that the writing characteristics and the erasing characteristics are sufficiently satisfied. Especially, the pitch of the active element region is about 1500 nm, and the width and length of the gate structure 2 are 400 to 500
In the case of a semiconductor device having a high integration density of about nm, it means a variation in performance / quality and a decrease in reliability, which may pose a serious problem including a yield problem.

The coupling is performed by Lox = width of gate structure−bird's beak amount Lono = width of electrode layer−amount of bird's beak Wox = width of gate structure Wono = (slit width of active element region pitch) + (thickness of electrode layer) Tox = gate oxide film thickness (tunnel film thickness) Tono = gate insulating film thickness Capacitance = A (surface area) / T (thickness), and if ε0 and ε of Cono and Cox are the same, the following formula Cono = ε 0 ・ ε ono / Tono ・ Aono ＝ Wono ・ Lono / Tono ＝
C2 Cox ＝ ε0 ・ εox / Tox ・ Aox ＝ Wox ・ Lox ／ Tox ＝ C1 Coupling ＝ C2 / (C1 ＋ C1) ＝ Cono ／ (Cox ＋ Cono) and the capacitance of the gate oxide film 2a (capacitor)
And the capacitance of the gate insulating film 2c, the bird's beak of the gate insulating film 2c (the biting of the gate insulating film) influences, and the bird's beak influences the writing characteristic and the erasing characteristic.

The present invention has been made in consideration of the above circumstances, and by suppressing gate bird's beaks and improving coupling, a semiconductor device which always exhibits good write characteristics and erase characteristics, and An object of the present invention is to provide a manufacturing method capable of easily manufacturing a semiconductor device with a high yield.

[0012]

According to a first aspect of the present invention, there is provided a semiconductor device having a gate structure in which a gate insulating film and an electrode layer are sequentially laminated, the gate insulating film being in contact with at least the electrode layer. The layer is formed of silicon nitride,
In addition, the semiconductor device is characterized by being a laminated type of a silicon nitride layer and a silicon oxide layer.

According to a second aspect of the present invention, there is provided a semiconductor device having a gate structure having a structure in which a gate oxide film, a first electrode layer, a gate insulating film, and a second electrode layer are sequentially stacked. Is a laminated type in which at least layers in contact with the first electrode layer and the second electrode layer are formed of silicon nitride, and a silicon oxide layer is interposed between the silicon nitride layers. Is.

According to a third aspect of the present invention, in the semiconductor device according to the second aspect, the gate insulating film is of a three-layer laminated type including a silicon nitride layer-silicon oxide layer-silicon nitride layer.

According to a fourth aspect of the present invention, in the semiconductor device according to the second or third aspect, at least one of the first electrode layer and the second electrode layer is polysilicon. .

According to a fifth aspect of the present invention, a step of forming a gate oxide film at a predetermined position on the surface of the first conductivity type semiconductor substrate, a step of forming a first electrode layer on the gate oxide film, A step in which a silicon nitride layer and a silicon oxide layer are alternately laminated at least once on one electrode layer, and then a silicon nitride layer is further laminated to form a gate insulating film; and a second step on the gate insulating film. Forming a gate structure by forming a second electrode layer, and forming a region adjacent to the formed gate structure in the second step.
And a step of subjecting the outer peripheral surface of the gate structure to stabilization and protection treatment, the method of manufacturing a semiconductor device.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, the first electrode layer and the second electrode layer are formed of polysilicon, amorphous silicon or tungsten silicon, and an oxidation treatment is performed. The feature is that the outer peripheral surface of the gate structure is stabilized and protected.

The present invention is based on the following findings. That is, when the gate structure has a single electrode layer, or when a plurality of two or more layers are formed of polysilicon, amorphous silicon (α-silicon), tungsten silicon, or the like, and a gate insulating film in contact with this electrode layer is used as a chip. In a gate structure in which a silicon nitride layer-silicon oxide layer-based stacked gate insulating film is interposed, a layer in direct contact with each electrode layer is replaced with three or more stacked gate insulating films having a silicon nitride layer. In this case, gate bird's beaks (biting oxidation on the side surface side) of both electrode layers during stabilization and formation of a protective film (thermal oxidation) are easily suppressed, and good coupling properties are formed and maintained, resulting in high reliability. The present invention has been achieved by confirming that it exhibits high writing characteristics and erasing characteristics.

In the present invention, the semiconductor substrate is, for example, a Si substrate in which an n-type or p-type conductive impurity is diffused, and the formation of the active element region, the gate structure, and the like are common memory elements and semiconductors. It can be formed by a conventional manufacturing means such as an integrated circuit device.

According to the first aspect of the invention, at least the layer in contact with the electrode layer is made of silicon nitride and is a laminated type of the silicon nitride layer and the silicon oxide layer. Therefore, the electrode layer is oxidized in the thickness direction. The growth of the oxide layer is suppressed, and the gate insulating film value and the capacitance value as designed are maintained, so that a semiconductor device exhibiting predetermined write characteristics and erase characteristics can be provided.

According to the second aspect of the invention, in the gate insulating film, at least the layers in contact with the first electrode layer and the second electrode layer are silicon nitride layers, and the silicon oxide layer is interposed between the silicon nitride layers. It is a laminated type. In other words, as a layer in contact with the electrode layer is provided with a non-oxygen-permeable silicon nitride layer, oxide layer growth in the thickness direction due to oxidation of the electrode layer is suppressed, and the gate is designed as designed. Since the insulating film value and the capacitance value are retained, a semiconductor device exhibiting predetermined writing characteristics and erasing characteristics can be provided.

In the invention of claim 3, since the gate insulating film is a three-layer laminated type of silicon nitride layer-silicon oxide layer-silicon nitride layer, the structure is simplified while the gate insulating film is simplified.
Functions as a semiconductor device exhibiting the action and effect of.

In the invention of claim 4, since at least one of the first electrode layer and the second electrode layer is made of polysilicon, it is easier to perform the method according to claim 2 or 3.
Functions as a semiconductor device exhibiting the action and effect of.

According to the invention of claim 5, the above-mentioned operation
A semiconductor device exhibiting the effect can be easily manufactured with high yield.

According to a sixth aspect of the present invention, both electrode layers are formed of polysilicon, amorphous silicon or tungsten silicon, and the outer peripheral surface of the gate structure is stabilized and protected by an oxidation treatment. Action
It is possible to provide a highly reliable semiconductor device with which the effect can be obtained more easily.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments will be described below with reference to FIGS. 1, 2 (a) to 2 (b), and 3 (a) to 3 (b).

In FIG. 1, 3 is a semiconductor substrate having an active element region composed of a drain region 3a, a gate region 3b, and a source region 3c, and 4 is a gate oxide film (tunnel) sequentially formed on the surface of the gate region 3b. Film) 4a, first electrode layer (floating gate) 4b, gate insulating film 4c, second electrode layer (control gate) 4d and stabilizing protective film 4e
It is a gate structure consisting of. Here, the first electrode layer 4b and the second electrode layer 4d are made of, for example, polysilicon, amorphous silicon or tungsten silicon, and the gate insulating film 4c is made of silicon nitride layer 4c ₁ -silicon oxide layer 4c. _It is formed in a laminated type of _2- silicon nitride layer 4c ₃ , and further, the stabilizing protective film 4e is formed on each of the electrode layers 4b and 4d.
The outer peripheral surface is oxidized.

Next, a method of manufacturing the semiconductor device having the gate structure 2 will be described with reference to FIGS. First, a first conductivity type impurity is diffused
A gate oxide film 4a is formed on the surface of the conductivity type semiconductor substrate, for example, the n-type single crystal silicon substrate 3 by the CVD method, as shown in a sectional view in FIG. 2 (a). That is, a gate oxide film 4a having a thickness of about 7.5 nm is formed by a CVD method using a boron oxide halide-hydrochloric acid in a temperature atmosphere of 750 ° C. Then, as shown in a sectional view in FIG. 2B, a polysilicon layer having a thickness of, for example, about 200 nm is formed as a first electrode layer (floating gate) 4b on the gate oxide film 4a.

After that, as shown in a sectional view in FIG.
For example, by the LPCVD method, a silicon nitride layer 4c ₁ having a thickness of about 6 nm is formed on the surface of the silicon nitride layer 4c ₁ by CVD.
A silicon oxide layer 2c ₂ having a thickness of about 11.5 nm by the LPCVD method, and a thickness of 6 nm by LPCVD on the surface of the silicon oxide layer 2c _2.
The silicon nitride layer 2c ₃ having a certain degree is sequentially formed. Then, as shown in a sectional view in FIG. 2D, the silicon nitride layer 2c ₃
As the second electrode layer (control gate) 4d, a polysilicon layer having a thickness of about 6 nm is formed by, for example, LPCVD method, and then the above-mentioned film formation 4a, 4b, 4c ₁ , 4c ₂ , 4c ₃
The laminated films of 4 and 4d are processed by, for example, an RIE device to form a predetermined group 2 of gate structures as shown in a sectional view in FIG.

After forming the above-mentioned group of gate structures 2, a thermal oxidation treatment is performed at 850 ° C. in a 10% hydrochloric acid atmosphere, for example, and each gate structure 2 is cross-sectionally shown in FIG. 2 (f).
A first gate oxide layer (first gate bird's beak) 4e ₁ having a thickness of about 15 nm is formed to prevent surface contamination.
Next, on the surface of the semiconductor substrate 1 adjacent to the gate structure 2, a second conductivity type impurity (for example, arsenic) is implanted by ion implantation at a voltage of 40 KeV and selectively diffused to form a drain 3a region and a source. A second impurity region corresponding to the region 3c is formed.

Thereafter, for example, in an atmosphere of 10% hydrochloric acid, 850
A thermal oxidation treatment is carried out at a temperature of ℃ to form a second gate oxide layer (second gate bird's beak) 4e ₂ having a thickness of about 15 nm as shown in a sectional view in FIG. By taking such a series of steps, a semiconductor device having the gate structure 2 in which the laminated gate insulating film 4c is interposed between the floating gate 4b and the control gate 4d is manufactured.

In the semiconductor device having the gate structure, the bird's beak (cutting of the gate insulating film) of the gate insulating film 4c is avoided or reduced, and therefore, as shown by the equation relating to the coupling,
The effect of coupling, which is determined by the ratio between the capacitance of 4a and the capacitance of gate insulating film 4c, is also reduced / avoided, and as a result, the desired function is exhibited without impairing the write and erase characteristics. It will be. In particular, the effect is great in a semiconductor device having a NAND type gate structure.

[0033] In the configuration of the semiconductor device, a gate insulating film 4c the nitride silicon layer 4c ₁ - silicon oxide layer 2c ₂ - was a three-layer structure of the nitride silicon layer 2c _3, for example, a thickness of 40
A similar tendency was observed as a 5-layer type of a silicon nitride layer having a thickness of 50 μm, a silicon oxide layer having a thickness of 50 μm, a silicon nitride layer having a thickness of 40 μm, a silicon oxide layer having a thickness of 60 μm and a silicon nitride layer having a thickness of 40 μm. Was given.

When the electrode layers 4b and 4d are formed of amorphous silicon or tungsten silicon, or in the above-mentioned structure, the silicon nitride layer 4c ₁ -silicon oxide layer 2c is formed as the gate insulating film 4c on the gate oxide film 4a. ₂
- a three-layer structure of the nitride silicon layer 2c ₃ provided, even if on the nitride silicon layer 2c ₃ of poly silicon electrode layer was formed (floating gate) structure, similarly write characteristics and erase characteristics are impaired The required semiconductor device could be easily manufactured without the need.

The present invention is not limited to the above embodiments, but various modifications can be made without departing from the spirit of the invention. For example, the semiconductor device may be something other than an EEPROM having a gate structure, and the semiconductor substrate may be a p-type Si substrate. The oxide film such as the gate oxide film may be formed by a method other than the CVD method such as a natural oxidation method, and the electrode layer may be formed by the first electrode layer (floating gate) and the second electrode. The structure is not limited to the two-layer structure of layers (control gate), and may have a structure of three or more layers.

[0036]

According to the first aspect of the invention, in the gate structure, the electrode layer which is easily oxidized is provided with the silicon nitride layer which is hard to pass oxygen and is placed in contact with the electrode layer to suppress the growth of the oxide layer in the thickness direction due to the oxidation. The adopted configuration is adopted. That is, since one of the coupling parameters can be set as designed, the semiconductor device functions as a semiconductor device exhibiting predetermined write characteristics and erase characteristics.

According to the second aspect of the present invention, in the gate structure, the oxygen gate permeable silicon nitride layer is placed in contact with and arranged on the floating gate and the control gate which are easily oxidized, and the thickness of the floating gate and the control gate due to oxidation is increased. The structure is such that the growth of the oxide layer in the depth direction is suppressed. That is, since one of the coupling parameters can be set as designed, the semiconductor device functions as a semiconductor device exhibiting predetermined write characteristics and erase characteristics.

According to the invention of claim 3, since the gate insulating film is of a three-layer laminated type, a semiconductor device having the operation and effect of claim 1 is provided while simplifying the gate structure. Become.

According to the invention of claim 4, since at least one of the floating gate and the control gate is made of polysilicon, the semiconductor device exhibiting the action and effect of claim 2 or 3 can be more easily manufactured. Will be provided.

According to the fifth aspect of the present invention, one of the coupling parameters can be set as designed, so that a semiconductor device exhibiting predetermined write characteristics and erase characteristics can be easily manufactured with high yield.

According to the invention of claim 5, the floating gate and the control gate are formed of polysilicon, amorphous silicon or tungsten silicon, and the outer peripheral surface of the gate structure is stabilized and protected by oxidation. Therefore, it is possible to manufacture a semiconductor device that exhibits predetermined write characteristics and erase characteristics more easily and with good yield.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a main configuration of a semiconductor device according to an embodiment.

2A to 2G are cross-sectional views each schematically showing a main part of a manufacturing mode of the semiconductor device shown in FIG.

FIG. 3 is a cross-sectional view illustrating a configuration of a main part of a conventional semiconductor device.

4 (a) and 4 (b) are cross-sectional views each schematically showing a process main part of a manufacturing mode of the semiconductor device shown in FIG.

[Explanation of symbols]

1, 3 ... n-type semiconductor substrate 1a, 3a ... drain region 1b, 3b ... gate region 1c, 3c ... source region 2, 4 ... gate structure 2a, 4a ... gate oxide film 2b, 4b ... 1st electrode layer (floating gate) 2c, 4c ... Gate insulating film 2c ₁ , 2c ₃ , 4c ₂ ... Silicon oxide layer 2c ₂ , 4c ₁ , 4c ₃ ... Silicon nitride layer 2d, 4d. Second electrode layer (control gate) 2e, 4e ... Stabilizing protective film 2e ₁ , 4e ₁ ...... First gate oxide layer 2e ₂ , 4e ₂ ...... Second gate oxide layer

Claims (6)

[Claims] 1. A semiconductor device having a gate structure having a structure in which a gate insulating film and an electrode layer are sequentially stacked, wherein at least a layer in contact with the electrode layer of the gate insulating film is formed of silicon nitride and A semiconductor device characterized by being a laminated type of a silicon oxide layer and a silicon oxide layer. 2. A semiconductor device having a gate structure having a structure in which a gate oxide film, a first electrode layer, a gate insulating film, and a second electrode layer are sequentially stacked, wherein the gate insulating film is at least the first 2. The semiconductor device, wherein the layers in contact with the electrode layer and the second electrode layer are made of silicon nitride and a silicon oxide layer is interposed between the silicon nitride layers. 3. The semiconductor device according to claim 2, wherein the gate insulating film is a three-layer laminated type of silicon nitride layer-silicon oxide layer-silicon nitride layer. 4. The semiconductor device according to claim 2, wherein at least one of the first electrode layer and the second electrode layer is polysilicon. 5. A step of forming a gate oxide film at a predetermined position on the surface of a first conductivity type semiconductor substrate, a step of forming a first electrode layer on the gate oxide film, and a step of forming a first electrode layer on the first electrode layer. At least once with a silicon nitride layer,
A step of forming a gate insulating film by further stacking silicon nitride layers after alternately forming silicon oxide layers, and a step of forming a second electrode layer on the gate insulating film to form a gate structure. A semiconductor having a step of forming an active element by converting a region adjacent to the formed gate structure to a second conductivity type, and a step of subjecting an outer peripheral surface of the gate structure to stabilization and protection treatment. Device manufacturing method. 6. The first electrode layer and the second electrode layer are formed of polysilicon, amorphous silicon or tungsten silicon, and the outer peripheral surface of the gate structure is stabilized and protected by oxidation treatment. The method for manufacturing a semiconductor device according to claim 5.