JPH0831304B2 - Method for manufacturing plasma display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A method for manufacturing a plasma display panel, comprising:
When an intermediate layer such as a layer is baked at 500 to 600 ° C., the glass substrate shrinks by a predetermined amount and the lower layers such as the electrode pattern also shrink,
By forming the lower layer pattern in such a size that the contraction amount is expected, it is possible to improve the alignment accuracy with the upper layer pattern such as the partition wall for crosstalk prevention formed by alignment.

[Industrial applications]

The present invention relates to a method for manufacturing a plasma display panel, and more particularly to a method for forming a pattern of an electrode or a crosstalk preventing partition that compensates for shrinkage of a glass substrate in a firing process of an insulating layer of an electrode or a crosstalk preventing partition. .

A glass substrate of a plasma display panel (hereinafter referred to as PDP) has a predetermined pattern of electrodes, a glass insulating layer (hereinafter referred to as IF layer), and a cross talk prevention partition of adjacent discharge cells, which are sequentially laminated, There is one in which an electrode is further formed on the talk preventing partition. On the other hand, the pattern of these electrodes and the barrier ribs for crosstalk prevention is becoming denser and the number of elements is increasing, and the pitch is 360 μm and the pattern width is 100 μm.
m, total of 640 patterns.

Therefore, there has been a demand for a method of manufacturing a panel with high accuracy and high work efficiency.

[Problems to be solved by conventional technology and invention]

Soda lime glass is used for the glass substrate of the PDP, but this material is used after the firing temperature of the barrier ribs for preventing crosstalk and the IF layer, 500 to 600 ° C, before firing as shown in the representative example in Fig. 2. Shrinkage allowance of 0.0323 per firing
%, 0.999679 after contraction, 0.0537% for each of the same two times,
It becomes 0.999473. The shrinkage allowance depends on the firing conditions.
There are variations of 0.0261 to 0.0398% and 0.0407 to 0.0549%, respectively.

This shrinkage is 74 μm for a 230 mm glass substrate, 1
It reaches 24 μm. In the past, when the pitch was large, the pattern width was large, and the total number was small, such an error could be ignored, but as mentioned above, recently, the pitch is 360 μm and the electrode width is 100 μm.
With the use of small and large number of patterns of 640 μm and a total of 640, the shrinkage values have become non-negligible.

The present invention has been devised in view of such a point, and a PDP capable of highly accurate pattern formation by a simple method.
It is intended to provide a manufacturing method of.

[Means for solving problems]

When the substrate is made of soda lime glass and the electrode layer is formed on the substrate as a plurality of linear electrodes parallel to each other at a predetermined pitch, the pitch in the width direction of the electrode layer and the electrode width are the insulating layer. Is formed by a pattern having a size larger than a predetermined size by a size that allows for the amount of shrinkage of the glass substrate when baking, and then the insulating layer is formed by applying a glass paste and baking the insulating layer. The feature is that the partition layer for crosstalk prevention is printed and formed on the layer by a parallel pattern having a predetermined interval because of being positioned between the electrode patterns.

[Work]

Although the pattern of the electrode layer formed on the glass substrate shrinks by a predetermined amount when the insulating layer is formed on the electrode layer, the contracted pattern is appropriate to the pattern of the partition layer for crosstalk prevention formed on the insulating layer. Because of the positional relationship, there is no positional deviation between the patterns of the partition layer for crosstalk prevention and the electrode layer.

〔Example〕

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows the structure of one electrode supporting substrate in a memory type PDP to which the present invention is applied. 1 is a glass substrate, 2 is a linear pattern electrode, 3 is an IF layer, 4 is for crosstalk prevention It is a partition.

The electrode pattern 2 is formed on the glass substrate 1 by a method such as vapor deposition and sputtering. The IF layer 3 is formed by applying a glass paste on the electrode pattern 2 and baking it at 500 to 600 ° C. The crosstalk preventing partition wall 4 is formed by a printing method such that the electrode pattern 2 is aligned with the electrode pattern 2 after firing of the IF layer, that is, the electrode pattern 2 is correctly arranged at the center of the pitch of the partition wall 4.

Now, the dimensions of these patterns will be described with specific numerical values. When the electrode pattern pitch after completion is 360 μm and the total number is 640, the width occupied by all the patterns on the glass substrate is 0.
36 × (640-1) = 230.04 mm. Therefore, IF layer burning 3
The pitch and the occupied width of the glass substrate 1 of the electrode pattern 2 before firing are 0.9996 to 0.9998 depending on the IF layer firing conditions.
Since the shrinkage varies twice as much and shrinks, a shrinkage ratio suitable for the actual firing conditions is selected and applied. Now, as a typical value, the central value of shrinkage 0.9997 is obtained as follows. That is, pitch = 360 / 0.9997 = 360.11 μm and occupation width = 230.04 / 0.9997 = 230.11 mm. After the electrode pattern 2 having this size is formed, the IF layer glass 3 is applied to form the IF layer, and is baked at a predetermined temperature of 500 to 600 ° C., the electrode pattern shrinks together with the glass substrate 1 as described above. However, the pitch and the total pattern width after contraction match the pitch and the total pattern width of the crosstalk preventing partition wall pattern 4 aligned thereon.

Since the shrinkage varies from 2.30 to 3.98 × 10 ⁴ depending on the firing conditions, the optimum value according to the firing conditions is determined from the above range.

On the other hand, in the surface discharge type gas electric panel previously proposed by the present inventors in Japanese Patent Application No. 60-160952, an electrode, an IF layer, a partition for crosstalk prevention, and an electrode are sequentially laminated on one glass substrate. It is formed, and includes a firing step at 500 to 600 ° C. in the formation of the IF layer and the partition for preventing crosstalk. In this way, when the firing process is performed twice, the shrinkage further progresses as shown in Fig. 2, and the dimension before the first firing is 0.0537%.
Contract. Therefore, when there are two firing steps, the dimension of the pattern to be aligned after the second firing is set to 0.
A value obtained by dividing by a shrinkage ratio selected from 9993 to 0.9996 suitable for the firing conditions is the dimension before the first firing.

The same idea is applied when the firing process is performed three times or more.

[Advantages of the Invention] As described above, according to the present invention, a highly accurate electrode and a partition pattern for crosstalk prevention can be efficiently formed by an extremely simple method, so that it is possible to improve the quality of the PDP and reduce the cost. It contributes and the industrial effect is great.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part showing one embodiment of the present invention, and FIG. 2 is a diagram for explaining measured values of shrinkage of a glass substrate by firing. In the figure, 1 is a glass substrate, 2 is an electrode pattern, 3 is an IF layer, and 4 is a partition for crosstalk prevention.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Den Shinoda 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Limited (56) References JP-A-56-109431 (JP, A) JP-A-58-188030 (JP, A) JP-A-57-121125 (JP, A)

Claims (1)

[Claims] 1. A crosstalk having a predetermined pattern after forming an electrode layer having a predetermined pattern on a glass substrate which constitutes one substrate of a plasma display panel and further forming an insulating layer which is baked at a predetermined temperature on the electrode layer. In the method for forming a barrier for prevention, the substrate is made of soda lime glass, and when the electrode layers are formed on the substrate as a plurality of linear electrodes parallel to each other at a predetermined pitch, Form a pattern in which the pitch in the width direction and the electrode width are larger than the predetermined dimension by a dimension that allows for the amount of shrinkage of the glass substrate when firing the insulating layer, and then the insulating layer is coated with a glass paste. Then, the partition wall layer for crosstalk prevention is formed by firing, and is formed on the insulating layer by a parallel pattern having a predetermined interval so as to be located between the electrode patterns. A method for manufacturing a plasma display panel, which comprises forming a print on a substrate.