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JPH08316002A - Electronic component and composite electronic part - Google Patents

Electronic component and composite electronic part

Info

Publication number
JPH08316002A
JPH08316002A JP7115025A JP11502595A JPH08316002A JP H08316002 A JPH08316002 A JP H08316002A JP 7115025 A JP7115025 A JP 7115025A JP 11502595 A JP11502595 A JP 11502595A JP H08316002 A JPH08316002 A JP H08316002A
Authority
JP
Japan
Prior art keywords
layer
electrode layers
lower electrode
resistor
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7115025A
Other languages
Japanese (ja)
Other versions
JP3665385B2 (en
Inventor
Seiya Ono
誠也 大野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP11502595A priority Critical patent/JP3665385B2/en
Publication of JPH08316002A publication Critical patent/JPH08316002A/en
Application granted granted Critical
Publication of JP3665385B2 publication Critical patent/JP3665385B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Details Of Resistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE: To reduce variation in resistance owing to self-heating and thermal wear for higher reliability by forming an electronic element layer in such a manner that it is superposed on the opposed ends of a pair of lower electrode layers, formed on an insulating substrate, and forming a pair of upper electrode layers in such a manner that they are superposed on either end of the electronic element area and the respective lower electrode layers. CONSTITUTION: A pair of lower electrode layers 3 are formed on the surface of a rectangular alumina substrate 1. A resistor layer 2 is filled in between the lower electrode layers by a thick film forming method in such a manner that it is superposed on the opposed ends of the lower electrode layers 3. Upper electrode layers 4 are formed on the resistor layer 2 and lower electrode layers 3 in such a manner that they covers the overlapped portion of the resistor layer 4 and lower electrode layers 3, and that its length is larger than that M of the overlapped portion. Thus both the ends of the resistor layer 2 is sandwiched between the upper electrode layers 4 and the lower electrode layers 3, and the efficiency of radiating heat produced by energization is thereby improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、チップ抵抗器やRC
(抵抗とコンデンサとの複合電子部品)チップ部品等の
電子部品または複合電子部品に関し、特にその電極構造
の改良にかかわる。
BACKGROUND OF THE INVENTION The present invention relates to a chip resistor and RC
(Composite Electronic Component of Resistor and Capacitor) The present invention relates to an electronic component such as a chip component or a composite electronic component, and particularly to improvement of an electrode structure thereof.

【0002】[0002]

【従来の技術】従来、例えば一般的な厚膜チップ抵抗器
は図4に示すような抵抗体層構造を備えていた。同図に
おいて、アルミナ製基板41表面に一対の電極43を設
け、その両電極43をまたぐように抵抗体層42が印刷
・焼成(厚膜方法)により形成されている。実際のチッ
プ部品としては、図示しないが、抵抗体層42の表面を
ガラスコーティングし、電極43と接続する外部電極が
設けられている。
2. Description of the Related Art Conventionally, for example, a general thick film chip resistor has a resistor layer structure as shown in FIG. In the figure, a pair of electrodes 43 is provided on the surface of an alumina substrate 41, and a resistor layer 42 is formed by printing and firing (thick film method) so as to straddle both electrodes 43. As an actual chip component, although not shown, the surface of the resistor layer 42 is glass-coated and external electrodes for connecting to the electrodes 43 are provided.

【0003】また、本願出願人の特開昭60ー2466
02号で開示したような抵抗体層構造のものもある。こ
の抵抗体構造を、図4の場合と同様に、図5で示す。同
図において、アルミナ製基板51表面に抵抗体層52を
印刷・焼成により形成し、その両端部に重なる一対の電
極53を設けている。
Further, JP-A-60-2466 of the applicant of the present application
There is also a resistor layer structure as disclosed in No. 02. This resistor structure is shown in FIG. 5, as in the case of FIG. In the figure, a resistor layer 52 is formed on the surface of an alumina substrate 51 by printing and firing, and a pair of electrodes 53 overlapping both ends thereof is provided.

【0004】[0004]

【発明が解決しようとする問題点】しかしながら、上述
の図4及び図5の場合、チップサイズの制約上電極形状
の大きさに制限が与えられており、抵抗体層42または
52と電極43または53との接触面積が小さくなるた
め、放熱性が悪く使用時の自己発熱による温度上昇が大
きくなり、抵抗値不安定や熱的損耗が大きいという問題
があった。殊に、図4の場合、抵抗体層42と電極43
との接触面積を大きくして放熱性を改善しようとする
と、両者の重なり長さL(図4参照)が長くなるため、
その重なり部に対応する抵抗体層42の薄肉部分が中央
部に対して占める割合が大きくなり、所望の抵抗値に調
整することが困難になる不具合もあった。
However, in the case of FIG. 4 and FIG. 5 described above, the size of the electrode shape is limited due to the restriction of the chip size, and the resistor layer 42 or 52 and the electrode 43 or Since the contact area with 53 is small, there is a problem that the heat dissipation is poor and the temperature rises due to self-heating during use, resulting in unstable resistance and large thermal wear. In particular, in the case of FIG. 4, the resistor layer 42 and the electrode 43
When an attempt is made to improve the heat dissipation by increasing the contact area with, the overlapping length L (see FIG. 4) of both becomes longer,
There is also a problem that the thin portion of the resistor layer 42 corresponding to the overlapping portion occupies a large proportion with respect to the central portion, making it difficult to adjust to a desired resistance value.

【0005】さらに、絶縁基板上に抵抗体を焼成して得
られる厚膜回路部品等でも(特開昭59ー79563号
及び特開昭59ー18669号公報等参照)、上述同様
のものを使用しており、かかる熱的問題を有していた。
本発明は、上記の問題を解消し、温度特性に優れた電子
部品及び複合電子部品を提供することを目的とする。
Further, even in a thick film circuit component obtained by firing a resistor on an insulating substrate (see JP-A-59-79563 and JP-A-59-18669), the same ones as described above are used. And had such a thermal problem.
An object of the present invention is to solve the above problems and provide an electronic component and a composite electronic component having excellent temperature characteristics.

【0006】[0006]

【課題を解決するための手段】本発明者は、上記技術的
課題を達成するため、本願発明では以下のような技術的
手段を講じている。請求項1記載の発明にかかる電子部
品は、絶縁基板上に形成した一対の下部電極層の対向端
部に重なるように電子素子層を形成し、前記電子素子部
の両端部と前記一対の下部電極層のそれぞれに重なるよ
うに一対の上部電極層を形成したことを特徴とする。
The present inventor has taken the following technical means in the present invention in order to achieve the above technical objects. In the electronic component according to the first aspect of the present invention, an electronic element layer is formed so as to overlap opposite end portions of a pair of lower electrode layers formed on an insulating substrate, and both end portions of the electronic element portion and the pair of lower portions are formed. It is characterized in that a pair of upper electrode layers is formed so as to overlap with each of the electrode layers.

【0007】請求項2記載の発明は、請求項1記載の電
子部品において、前記電子素子層、前記上部電極層及び
前記下部電極層を前記絶縁基板上に厚膜印刷により形成
したことを特徴とする。請求項3記載の発明にかかる複
合電子部品は、印刷配線用絶縁基板上に形成した一対の
下部電極層の対向端部に重なるように電子素子層を形成
し、前記電子素子部の両端部と前記一対の下部電極層の
それぞれに重なるように一対の上部電極層を形成した電
子部品を、他の部品とともに前記印刷配線用絶縁基板に
実装したことを特徴とする。
According to a second aspect of the present invention, in the electronic component according to the first aspect, the electronic element layer, the upper electrode layer and the lower electrode layer are formed on the insulating substrate by thick film printing. To do. In the composite electronic component according to a third aspect of the present invention, an electronic element layer is formed so as to overlap with opposite end portions of a pair of lower electrode layers formed on an insulating substrate for printed wiring, and both end portions of the electronic element portion are formed. It is characterized in that an electronic component in which a pair of upper electrode layers is formed so as to overlap with each of the pair of lower electrode layers is mounted on the printed wiring insulating substrate together with other components.

【0008】請求項4記載の発明は、請求項1ないし3
のいずれかに記載の電子部品または複合電子部品におい
て、前記電子素子層が抵抗体層及び/または誘電体層で
あることを特徴とする。
The invention according to claim 4 is the same as claims 1 to 3.
In the electronic component or the composite electronic component according to any one of items 1 to 3, the electronic element layer is a resistor layer and / or a dielectric layer.

【0009】[0009]

【発明の作用】請求項1ないし4に記載された本発明に
おいては、電子素子層の両端部を下部電極層と上部電極
層とによって挟み込んだ形態を形成する。
According to the present invention described in claims 1 to 4, the electronic element layer is formed such that both ends thereof are sandwiched between the lower electrode layer and the upper electrode layer.

【0010】[0010]

【発明の効果】本発明によれば、電子素子層の両端部を
下部電極層と上部電極層とによって挟み込んだ形態によ
り、電極層1層の従来形態に比較してコンパクトな大き
さで該電子素子層との電極接触面積を大幅に拡大するこ
とができる。従って、自己発熱による抵抗値不安定や熱
的損耗に対しての信頼性が向上し、温度特性に優れた電
子部品及び複合電子部品を得ることができる。また、簡
易に電極接触面積を大きくできるため、電子素子層自体
の設定長さや大きさを変更せず済み、例えばチップ抵抗
器に適用したときには、所望の抵抗値への調整精度に影
響しない利点もある。
According to the present invention, both ends of the electronic element layer are sandwiched between the lower electrode layer and the upper electrode layer, so that the size of the electronic element is smaller than that of the conventional one electrode layer. The electrode contact area with the element layer can be greatly expanded. Therefore, the reliability against resistance value instability and thermal wear due to self-heating is improved, and an electronic component and a composite electronic component having excellent temperature characteristics can be obtained. Further, since the electrode contact area can be easily increased, it is not necessary to change the set length or size of the electronic element layer itself. For example, when applied to a chip resistor, there is an advantage that the adjustment accuracy to a desired resistance value is not affected. is there.

【0011】[0011]

【実施例】本発明を電子素子層としての抵抗体層を厚膜
により形成した電子部品、いわゆる厚膜チップ抵抗器に
適用した場合の一実施例を図1ないし図3に基づいて以
下に説明する。図1は本実施例の厚膜チップ抵抗器を印
刷配線基板表面に実装した状態を示す。図2は同厚膜チ
ップ抵抗器の抵抗体層と電極との積層構造部分を、図3
は図2の平面図を示す。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an electronic component in which a resistor layer as an electronic element layer is formed of a thick film, that is, a so-called thick film chip resistor, will be described below with reference to FIGS. 1 to 3. To do. FIG. 1 shows a state in which the thick film chip resistor of this embodiment is mounted on the surface of a printed wiring board. FIG. 2 shows a laminated structure portion of a resistor layer and electrodes of the same thick film chip resistor as shown in FIG.
Shows a plan view of FIG.

【0012】同図において、矩形状のアルミナ製絶縁基
板1表面に一対の下部電極層3を設け、その両電極層3
をまたぐように抵抗体層2が印刷・焼成(厚膜方法)に
より形成されている。抵抗体層2は一対の下部電極層3
間に埋め込まれるとともにそれらの電極層の対向端部を
覆い重なるように形成されている。上部電極層4は抵抗
体層2と下部電極層3との重なり部分を覆うように抵抗
体層2及び下部電極層3上に積層形成され、抵抗体層2
と下部電極層3との重なり部分の長さMより長く重ねら
れている。このように、上部電極層4によって抵抗体層
2を覆っているため、抵抗体層2と電極層との接触面積
が大きくなるので、抵抗体層2と下部電極層3との重な
り部分の長さMを余分に長くする必要がない。即ち、図
4で示した従来の場合と比べても、電極層全体の接触面
積を大きくしながら下部電極層との接触長を短くできる
ので(M<L)、抵抗値の調整精度に影響を与えずに済
む。しかも上部電極層4によって接触面積の拡大を図る
ため、長さMの部分を最小限に設計することができ、抵
抗体層2の長さも所望の抵抗値に応じた必要最小限の長
さでよく、抵抗器の小型化にも寄与する。上部電極層4
は抵抗体層2を覆うとともに下部電極層3上に積層さ
れ、その終端部を略同じ寸法に、かつ絶縁基板1の端と
略同様に設定しているため、両電極層の重畳部分の長さ
を必要最小限の寸法に設定でき、小型化の妨げにならな
い。
In the figure, a pair of lower electrode layers 3 are provided on the surface of a rectangular alumina insulating substrate 1, and both electrode layers 3 are provided.
The resistor layer 2 is formed by printing and firing (thick film method) so as to straddle the above. The resistor layer 2 is a pair of lower electrode layers 3
It is formed so as to be embedded in the space and cover the opposite ends of the electrode layers. The upper electrode layer 4 is laminated and formed on the resistor layer 2 and the lower electrode layer 3 so as to cover the overlapping portion of the resistor layer 2 and the lower electrode layer 3.
And the lower electrode layer 3 are overlapped with each other longer than the length M. Since the resistor layer 2 is covered with the upper electrode layer 4 in this way, the contact area between the resistor layer 2 and the electrode layer is increased, and therefore the length of the overlapping portion between the resistor layer 2 and the lower electrode layer 3 is increased. There is no need to lengthen M. That is, compared with the conventional case shown in FIG. 4, since the contact length with the lower electrode layer can be shortened while increasing the contact area of the entire electrode layer (M <L), the adjustment accuracy of the resistance value is affected. You don't have to give it. Moreover, since the contact area is increased by the upper electrode layer 4, the length M can be designed to be the minimum, and the length of the resistor layer 2 can be the minimum necessary length according to the desired resistance value. Well, it also contributes to miniaturization of the resistor. Upper electrode layer 4
Is laminated on the lower electrode layer 3 while covering the resistor layer 2, and its end portion is set to have substantially the same size and substantially the same as the end of the insulating substrate 1, so that the length of the overlapping portion of both electrode layers is long. Size can be set to the minimum required size, which does not hinder miniaturization.

【0013】前記上部及び下部の電極層3、4には、銀
とガラスと有機バインダとを含むペーストを使用する。
また、これに限らず焼成温度がガラスを用いたぺースト
より低い導電性の樹脂ぺーストを用いても良いし、導電
材としても銀に限らず他の金属(例えば、金、アルミニ
ュウム)でも良い。特に導電材を銀およびパラジュウム
を主成分としたペーストにより形成すれば、例えば回路
基板に半田によって実装する場合に、いわゆる半田くわ
れによって悪影響が発生する恐れを抑制できるメリット
がある。
A paste containing silver, glass and an organic binder is used for the upper and lower electrode layers 3 and 4.
Further, the present invention is not limited to this, and a conductive resin paste having a firing temperature lower than that of glass may be used, and the conductive material is not limited to silver and may be another metal (for example, gold or aluminum). . In particular, when the conductive material is formed of a paste containing silver and palladium as main components, there is an advantage that it is possible to suppress a possibility that a so-called solder crack will cause an adverse effect when mounting on a circuit board with solder.

【0014】また、前記抵抗体層2は、酸化ルテニウム
(RuO2)等の金属酸化物の微粒子とSiO2等からな
るガラス粉末と有機バインダとからなるペーストを印刷
し焼成する厚膜方法によって形成される。この抵抗体層
にはスパッタリング法等の蒸着により形成した薄膜抵抗
を用いてもよい。被覆層5は抵抗体層2及び両電極層
3、4を覆うとともに、電極層の両端部の一部を露出さ
せた、ガラスや樹脂のオーバコート層からなる。抵抗体
層2に対して抵抗値調整のためにレーザ等でトリミング
調整してもよく、その場合には予めトリミング前に抵抗
体層2を覆うガラス等の保護層と、トリミング後に覆う
ガラス等の保護層とからなる2層構造を用い、さらに、
抵抗値等の標印を施すためのガラスや樹脂等の外被層を
用いてもよい。
The resistor layer 2 is formed by a thick film method in which a paste made of fine particles of a metal oxide such as ruthenium oxide (RuO 2 ) and glass powder made of SiO 2 and an organic binder is printed and baked. To be done. A thin film resistor formed by vapor deposition such as a sputtering method may be used for this resistor layer. The coating layer 5 covers the resistor layer 2 and both electrode layers 3 and 4, and is made of a glass or resin overcoat layer in which a part of both ends of the electrode layer is exposed. Trimming adjustment may be performed on the resistor layer 2 with a laser or the like to adjust the resistance value. In that case, a protective layer such as glass that covers the resistor layer 2 before trimming and a glass that covers after trimming may be used. Using a two-layer structure consisting of a protective layer,
An outer coating layer such as glass or resin for marking the resistance value or the like may be used.

【0015】上部電極層4と下部電極層3との重畳部分
には、絶縁基板1の端面側にて基板裏面側にわたって外
部電極層6が被着されている。外部電極層6は、銀の内
側電極層、Niメッキ下地層及びPb−Snの半田メッ
キ外側電極層からなる3層構造で形成されている。ま
た、外部電極層6にはNiメッキ層と半田メッキの外側
電極層の2層構造で形成してもよい。図1では、本実施
例のチップ抵抗器を印刷配線用絶縁基板9上に実装した
状態を示している。印刷配線用絶縁基板9表面に印刷形
成した一対の導体パターン8上に、一対の外部電極層6
をそれぞれ載置し、半田7によってチップ抵抗器を絶縁
基板9に実装している。
An external electrode layer 6 is applied to the overlapping portion of the upper electrode layer 4 and the lower electrode layer 3 over the end face side of the insulating substrate 1 and the rear face side of the substrate. The outer electrode layer 6 has a three-layer structure including an inner electrode layer of silver, a Ni-plated underlayer, and a solder-plated outer electrode layer of Pb-Sn. Further, the external electrode layer 6 may be formed with a two-layer structure of a Ni-plated layer and a solder-plated outer electrode layer. FIG. 1 shows a state in which the chip resistor of this embodiment is mounted on the printed wiring insulating substrate 9. A pair of external electrode layers 6 are formed on the pair of conductor patterns 8 formed by printing on the surface of the printed wiring insulating substrate 9.
Respectively, and the chip resistors are mounted on the insulating substrate 9 by the solder 7.

【0016】上記構成のチップ抵抗器においては、上部
電極層4と下部電極層3とによって抵抗体層2の両端部
を挟みこむことにより十分な電極接触面積を確保してい
るため、通電時に生じる発熱は上部電極層4と下部電極
層3を通じて被覆層5側に、また外部電極層6を介して
半田7側に十分に逃がすことができ、発熱の放散効率の
向上を図ることができる。
In the chip resistor having the above structure, the upper electrode layer 4 and the lower electrode layer 3 sandwich the both ends of the resistor layer 2 to secure a sufficient electrode contact area. The heat generation can be sufficiently released to the coating layer 5 side through the upper electrode layer 4 and the lower electrode layer 3 and to the solder 7 side through the external electrode layer 6, so that the heat dissipation efficiency can be improved.

【0017】本発明は、上記実施例のような単素子の電
子部品だけでなく、例えば抵抗器とコンデンサのいわゆ
るRCチップ部品等の複数素子内蔵部品にも適用でき
る。その場合、一対の第1と第2の導体層間に挟みこん
だ誘電体層と、一方の第2の導体層と第3の導体層間に
上記実施例と同様の抵抗体層とを形成しておき、該第2
と第3の導体層を上記実施例のように上部電極層及び下
部電極層の2層構造で抵抗層両端部を挟みこむようにす
れば、放熱効果を高めることができる。
The present invention can be applied not only to the single-element electronic component as in the above embodiment, but also to a multi-element embedded component such as a so-called RC chip component such as a resistor and a capacitor. In that case, a dielectric layer sandwiched between a pair of first and second conductor layers, and a resistor layer similar to that of the above-described embodiment is formed between one of the second conductor layer and the third conductor layer. Every second
If both end portions of the resistance layer are sandwiched between the third conductor layer and the third conductor layer by the two-layer structure of the upper electrode layer and the lower electrode layer as in the above embodiment, the heat dissipation effect can be enhanced.

【0018】さらに、本発明は、ガラスエポキシ基板ま
たはセラミック基板に配線を形成するとともに、複数の
電子部品を搭載する複合電子部品において、上記実施例
のような抵抗器を1個の部品として実装する場合、例え
ば厚膜印刷で回路形成した厚膜回路用ハイブリッド集積
回路部品等にも適用するこができる。
Further, according to the present invention, the wiring is formed on the glass epoxy substrate or the ceramic substrate and the resistor as in the above embodiment is mounted as one component in the composite electronic component in which a plurality of electronic components are mounted. In this case, it can be applied to, for example, a hybrid integrated circuit component for thick film circuits formed by thick film printing.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例にかかるチップ抵抗器の実装状態を示す
断面図である。
FIG. 1 is a cross-sectional view showing a mounted state of a chip resistor according to an example.

【図2】図1のチップ抵抗器の抵抗体の電極構造を示す
断面図である。
2 is a sectional view showing an electrode structure of a resistor of the chip resistor of FIG.

【図3】図2の平面図である。FIG. 3 is a plan view of FIG. 2;

【図4】従来のチップ抵抗器の抵抗体の電極構造を示す
断面図である。
FIG. 4 is a sectional view showing an electrode structure of a resistor of a conventional chip resistor.

【図5】他の従来のチップ抵抗器の抵抗体の電極構造を
示す断面図である。
FIG. 5 is a cross-sectional view showing an electrode structure of a resistor of another conventional chip resistor.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 抵抗体層 3 下部電極層 4 上部電極層 1 Insulating Substrate 2 Resistor Layer 3 Lower Electrode Layer 4 Upper Electrode Layer

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板上に形成した一対の下部電極層
の対向端部に重なるように電子素子層を形成し、前記電
子素子部の両端部と前記一対の下部電極層のそれぞれに
重なるように一対の上部電極層を形成した電子部品。
1. An electronic element layer is formed so as to overlap opposite end portions of a pair of lower electrode layers formed on an insulating substrate, and both end portions of the electronic element portion are overlapped with each of the pair of lower electrode layers. An electronic component in which a pair of upper electrode layers is formed on the surface.
【請求項2】 前記電子素子層、前記上部電極層及び前
記下部電極層を前記絶縁基板上に厚膜印刷により形成し
た請求項1記載の電子部品。
2. The electronic component according to claim 1, wherein the electronic element layer, the upper electrode layer, and the lower electrode layer are formed on the insulating substrate by thick film printing.
【請求項3】 印刷配線用絶縁基板上に形成した一対の
下部電極層の対向端部に重なるように電子素子層を形成
し、前記電子素子部の両端部と前記一対の下部電極層の
それぞれに重なるように一対の上部電極層を形成した電
子部品を、他の部品とともに前記印刷配線用絶縁基板に
実装した複合電子部品。
3. An electronic element layer is formed so as to overlap opposite end portions of a pair of lower electrode layers formed on a printed wiring insulating substrate, and both end portions of the electronic element portion and the pair of lower electrode layers are formed. A composite electronic component in which an electronic component in which a pair of upper electrode layers are formed so as to overlap with each other is mounted on the printed wiring insulating substrate together with other components.
【請求項4】 請求項1ないし3のいずれかに記載の電
子部品または複合電子部品において、前記電子素子層が
抵抗体層及び/または誘電体層であることを特徴とす
る。
4. The electronic component or the composite electronic component according to any one of claims 1 to 3, wherein the electronic element layer is a resistor layer and / or a dielectric layer.
JP11502595A 1995-05-15 1995-05-15 Electronic components Expired - Fee Related JP3665385B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11502595A JP3665385B2 (en) 1995-05-15 1995-05-15 Electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11502595A JP3665385B2 (en) 1995-05-15 1995-05-15 Electronic components

Publications (2)

Publication Number Publication Date
JPH08316002A true JPH08316002A (en) 1996-11-29
JP3665385B2 JP3665385B2 (en) 2005-06-29

Family

ID=14652367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11502595A Expired - Fee Related JP3665385B2 (en) 1995-05-15 1995-05-15 Electronic components

Country Status (1)

Country Link
JP (1) JP3665385B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002064002A (en) * 2000-06-05 2002-02-28 Rohm Co Ltd Chip resistor and its manufacturing method
WO2006093107A1 (en) * 2005-03-02 2006-09-08 Rohm Co., Ltd. Chip resistor and manufacturing method thereof
JP2008244343A (en) * 2007-03-28 2008-10-09 Mitsubishi Materials Corp Thin film thermistor and thin film thermistor manufacturing method
JP2012227360A (en) * 2011-04-20 2012-11-15 Panasonic Corp Chip type resistor and manufacturing method therefor
JP2018006726A (en) * 2016-06-27 2018-01-11 サムソン エレクトロ−メカニックス カンパニーリミテッド. Resistive element and mounting substrate of the same
KR20180072489A (en) * 2016-12-21 2018-06-29 내셔널 청쿵 유니버시티 Methods of Fabricating Chip Resistors Using Aluminum Terminal Electrodes
CN112567483A (en) * 2018-09-19 2021-03-26 贺利氏先进传感器技术有限公司 Resistor device for surface mounting on a printed circuit board and printed circuit board provided with at least one resistor device
JPWO2020170750A1 (en) * 2019-02-20 2021-12-16 パナソニックIpマネジメント株式会社 Resistor
WO2023053594A1 (en) * 2021-09-30 2023-04-06 ローム株式会社 Chip resistor

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002064002A (en) * 2000-06-05 2002-02-28 Rohm Co Ltd Chip resistor and its manufacturing method
WO2006093107A1 (en) * 2005-03-02 2006-09-08 Rohm Co., Ltd. Chip resistor and manufacturing method thereof
US7786842B2 (en) 2005-03-02 2010-08-31 Rohm Co., Ltd. Chip resistor and manufacturing method thereof
JP2008244343A (en) * 2007-03-28 2008-10-09 Mitsubishi Materials Corp Thin film thermistor and thin film thermistor manufacturing method
JP2012227360A (en) * 2011-04-20 2012-11-15 Panasonic Corp Chip type resistor and manufacturing method therefor
JP2018006726A (en) * 2016-06-27 2018-01-11 サムソン エレクトロ−メカニックス カンパニーリミテッド. Resistive element and mounting substrate of the same
KR20180072489A (en) * 2016-12-21 2018-06-29 내셔널 청쿵 유니버시티 Methods of Fabricating Chip Resistors Using Aluminum Terminal Electrodes
CN112567483A (en) * 2018-09-19 2021-03-26 贺利氏先进传感器技术有限公司 Resistor device for surface mounting on a printed circuit board and printed circuit board provided with at least one resistor device
JPWO2020170750A1 (en) * 2019-02-20 2021-12-16 パナソニックIpマネジメント株式会社 Resistor
WO2023053594A1 (en) * 2021-09-30 2023-04-06 ローム株式会社 Chip resistor
JPWO2023053594A1 (en) * 2021-09-30 2023-04-06

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