JPH08255813A - Semiconductor device - Google Patents

Abstract

PURPOSE: To enhance a semiconductor device in mounting density. CONSTITUTION: The surface of a semiconductor element 13 where the bonding pad 15 is provided is fixed to the surface of a carrier film 11 opposite to its surface where copper foil lead 12 are formed. The copper foil leads 12 provided to the carrier film 11 are connected to the connecting parts 35 of a circuit board 34. The carrier film 11 is smaller than the semiconductor element 13, and the copper foil leads 12 can be provided to the active plane of the semiconductor element 13. By this setup, a semiconductor device is capable of being enhanced in mounting density.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for fixing a semiconductor element having a bonding pad.

[0002]

2. Description of the Related Art In recent years, in response to the increase in capacity of memory cards, thin and high-density mounting of a large number of semiconductor elements has been required. When mounting a semiconductor element on such a memory card, for example, the semiconductor element is mounted on a circuit board by a semiconductor device (carrier film) in which the semiconductor element is inner lead-connected to a tape-shaped film in which a copper foil is formed by etching in advance. There is a way to implement.

A conventional structure of the semiconductor device (carrier film) will be described with reference to FIG.

In FIG. 6, reference numeral 61 is a carrier film. Copper foil leads 62 are formed in advance on the carrier film 61 except for the semiconductor element 63 mounting portion.
The semiconductor element 63 has a bonding pad 65 located near the ends 64 of the plurality of copper foil leads 62.
It is fixed on the carrier film 61 by means such as adhesion. Then, the ends 64 of the copper foil leads 62 and the bonding pads 65 are connected by wires 66 (inner lead connection). An outer lead cutting hole 67 is formed by piercing the carrier film 61 at a predetermined distance from the end 64 of the copper foil lead 62.

FIG. 7 is an explanatory view for explaining the manufacturing process of the semiconductor device of FIG.

In FIG. 7, (a) shows a carrier film on which copper foil leads are formed, (b) shows a carrier film on which semiconductor elements are bonded, and (c) shows a carrier film as a finished product.

In the carrier film 61 for supplying the semiconductor element 63 as described above, the end portions (inner lead connection portions) 64 of the copper foil leads 62 are located outside the semiconductor element 63 as shown in FIG. 7B. The wire 66 is pulled out from the bonding pad 65 inside the semiconductor element 63 and is connected to the inner lead connecting portion 64 of the copper foil lead 62. Next, the surface of the semiconductor element 63 on which the bonding pad 65 is formed and its peripheral portion (including the inner lead connection portion 64 and the wire (gold wire) 66) are, as shown in FIG. Is applied.

FIG. 8 is an enlarged view of a portion A of FIG. 7 in a state where the above wires are connected.

The wire 66 may be a gold wire, for example. As shown in FIG. 8, a gold ball 71 is formed on the pad surface 65a of the bonding pad 65 ball-bonded with a gold wire, and one end of the gold lead portion 72 is formed on the inner lead connecting portion 64 of the copper foil lead 62. Connected by crimping. However, in the wire bonding method of FIG. 8, since the pad surface 65a faces upward and the gold lead portion 72 and the inner lead connecting portion 64 are located lower than the connecting portion of the bonding pad 65 and the gold ball 71, the wire bonding method is performed once upward. It is necessary to extend the extended wire 66 downward, and at this time, the gold ball 71 and the gold lead portion 7
The neck portion 73 between the two parts is stressed, which may cause a wire breakage. For this reason, the bonding loop (the circular part from the pad surface to the same height as the pad surface)
The height h1 can be reduced to only about 0.2 mm, which increases the height of the semiconductor element after cutting the carrier film.

When the semiconductor element as shown in FIG. 6 is connected to the outer leads, it becomes as shown in FIG.

In FIG. 9, the copper foil lead 62 is cut along the one-dot chain line in FIG. 6, the cut end portion 69 is formed into a predetermined shape and then mounted on a circuit board.
In such outer lead connection, the inner lead connecting portion 64 of the copper foil lead described above is connected to the semiconductor element 63.
The carrier film 61 is located outside the semiconductor element 6
3 must be left on the outer peripheral edge 61 '.

If such an outer peripheral edge 61 ′ remains, it is refused to dispose the semiconductor elements 63 close to each other, resulting in a reduction in mounting density. In FIG. 9, the width D2 of the outer peripheral edge 61 'is required to be small. However, the width D1 for forming and the outer peripheral edge 6 of the semiconductor element of the carrier film
It is difficult in manufacturing to narrow the width D3 including the width D2 of 1 '.

[0013]

As described above, in the above-described conventional semiconductor device, the carrier film is left around the semiconductor element, and the mounting density cannot be reduced when mounting on the circuit board. There was a problem.

An object of the present invention is to provide a semiconductor device capable of reducing the mounting density when mounting on a circuit board.

[0015]

A semiconductor device according to the present invention includes a semiconductor element having a connection pad electrically connected to an internal circuit on a surface thereof, and at least in one direction more than the semiconductor element. A first wiring board having a small first insulating substrate, wherein a first wiring pattern is formed on one surface of the first insulating substrate, and the semiconductor element is fixed to the other surface on the connection pad formation surface side; Coupling means for electrically connecting the first wiring pattern and the connection pad,
A second wiring board is provided in which the first wiring pattern is electrically connected to a second wiring pattern formed on a second insulating substrate.

In the present invention, the base member remains inside the semiconductor element, and the inner lead portion of the copper foil lead is formed on the base member, so that the base member does not remain around the semiconductor element. As a result, the semiconductor elements can be mounted with a narrower space between the semiconductor elements than in the conventional case, so that higher density mounting is possible.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a plan view showing an embodiment of a semiconductor device according to the present invention.

In FIG. 1, 11 is a base member (carrier film) having a thickness of about 0.1 mm, 12 is a copper foil lead,
Reference numeral 13 is a semiconductor element, 14 is an end portion (inner lead connection portion) of the copper foil lead, and 15 is a bonding pad of the semiconductor element 13.

An opening portion 16 is formed in the carrier film 11 at a portion corresponding to the bonding pad 15. Then, the surface of the carrier film 11 opposite to the surface on which the copper foil leads 12 are formed is bonded and fixed to the surface of the semiconductor element 13 on which the bonding pads 15 are formed.

The end portions (inner lead connection portions) 14 and 14 of a predetermined set of gold-plated copper foil leads 12 and 12 formed on the upper surface of the carrier film 11 are the semiconductor elements 1.
3 is provided on the inner side of the bonding pad rows 15 and 15 (on the center side of the semiconductor element 13), and extends from the inner lead connecting portion 14 of the copper foil lead 12 between the adjacent bonding pads 15 to the outer side of the semiconductor element 13. It extends to the outer lead portion 17. The bonding pad 15 of each of these groups is connected to the inner lead connecting portion 14 by a wire 18
Is connected via (inner lead connection). The outer lead portion 17 has a carrier film 1
An outer lead-cutting hole 19 obtained by cutting out 1 is provided. Furthermore, this outer lead cutting hole 19
And the opening portion 16 communicate with each other.

FIG. 2 is an explanatory view for explaining the manufacturing process of the semiconductor device of FIG.

In FIG. 2, (a) shows a carrier film on which copper foil leads are formed, (b) shows a semiconductor element bonded carrier film, and (c) shows a carrier film as a finished product.

In the process of manufacturing a semiconductor device, first, a carrier film 11 is coated with a resist, exposed to light and developed, and then a copper foil lead (pattern) 1 is formed by an etching method.
2 is formed, and then the resist is peeled off to prepare a carrier film 31 having a copper foil lead formed thereon, as shown in FIG.

Next, as shown in FIG. 2 (b), the surface of the carrier film 11 on which the bonding pad 15 of the semiconductor element 13 is formed is silver-based on the mounting portion 11a of the semiconductor element 13 opposite to the surface on which the copper foil lead 12 is formed. The conductive adhesive 32 is used for adhesion. Further, the inner lead portion 14 of the copper foil lead 12 is connected to the bonding pad 15 via the wire 18 (inner lead connection).

Subsequently, as shown in FIG. 2C, a surface of the semiconductor element 13 on which the bonding pad 15 is formed (wire 1
8, including the inner lead connection portion 14) is coated with an epoxy thermosetting resin 33. Thereby, the semiconductor element 13 is mechanically protected and moisture-proofed.

FIG. 3 is an enlarged view of the portion B of FIG. In this figure, 41 is a gold ball and 42 is a gold wire lead portion. A gold ball 41 is formed on the bonding pad 15 of the semiconductor element 13, and a gold wire lead portion 42 extends from the gold ball 41 to form an inner lead connecting portion 1 of a copper foil lead.
Inner leads are connected to 4. In this case, since the joint portion between the gold wire lead portion 42 and the inner lead connecting portion 14 is located at a higher position than the joint portion between the bonding pad 15 and the gold ball 41, the gold wire lead portion 4 which has once gone upwards.
It is not necessary to increase the curvature of the bonding loop 43 formed when extending 2 downward, and therefore,
When the gold wire lead portion 42 is extended downward, stress is not so much applied to the neck portion 44 between the gold ball 41 and the gold wire lead portion 42. Further, the height h11 of the bonding loop protruding above the carrier film 11 can be set to about h11 = 0.1 mm, and the total pressure h14 including the substrate pressure h12 = 0.1 mm and the chip pressure h13 = 0.45 mm is h14 = 0.6
5 mm. As a result, the pressure becomes 0.1 mm smaller than the conventional total pressure shown in FIG. 8, and the semiconductor device can be made thinner.

In the above semiconductor device, the copper foil lead 12 is shown in FIG.
2C, and the carrier film 11 is also cut at the position shown by the one-dot chain line in FIG. The remaining carrier film 11 ′ when cut is barely protruding to the outer periphery of the semiconductor element. afterwards,
Lead forming of the copper foil lead 12 is performed, the carrier film 11 'is reversed, and the carrier film 11' is mounted on the circuit board.

FIG. 4 is a side view showing a state in which the semiconductor device of FIG. 2 is mounted on a circuit board.

As shown in this figure, the lead-formed copper foil lead 12 is soldered to the connecting portion 35 of the circuit board 34 using solder 36 (outer lead connection).
are doing. Here, the dimension D11 of the outer lead portion 17 =
The distance from the tip of the inner lead connecting portion 14 to the side surface of the semiconductor element 13 is D12 = 2.0 mm. Of these, only the outer lead portion 17 projects to the outside of the semiconductor element 13. This enables high-density mounting of semiconductor elements.

As described above, in the present embodiment, the semiconductor element 13 is fixed to the surface of the carrier film 11 ′ that is narrower than the semiconductor element 13 and opposite to the surface on which the copper foil leads 12 are formed. The side is opposed to the circuit board 34, and the copper foil lead 12 is formed and connected to the connection portion 35. Therefore, the inner lead connection portion 14 can be positioned on the active surface on which the circuit component of the semiconductor element 13 is mounted.

Further, the semiconductor element 13 is provided in the space between the copper foil lead 12 of the carrier film 11 'and the circuit board 35.
Since it is not provided, the copper foil lead 12 can be formed in this space. That is, in this case, not only the inner lead connecting portion 14 but also the outer lead portion 17 can be formed in the active surface of the semiconductor element 13, and high-density mounting is possible.

Although the above embodiment has been described with respect to the semiconductor element having the bonding pads formed on the two sides, the same effect can be obtained even when applied to the semiconductor element having the bonding pads formed on the four sides. it is obvious.

FIG. 5 is a plan view of a semiconductor device showing another embodiment according to the present invention.

In FIG. 5, reference numeral 51 is a carrier film. Reference numeral 52 is a copper foil lead, 53 is a semiconductor element, 54 is an inner lead connecting portion at the tip of the copper foil lead 52, and 55 is a bonding pad provided on the semiconductor element 53.

An opening portion 56 is provided in a portion of the carrier film 51 corresponding to the bonding pad 55. The inner lead connecting portions 54, 54 of a predetermined set of gold-plated copper foil leads 52, 52 formed on the upper surface of the carrier film 51 are provided inside the bonding pads 55, 55 of the semiconductor element 53, and the copper foil Lead 5
2, 52 extend from the inner lead connecting portions 54, 54 to the outer lead portion 57 outside the semiconductor element 53 through the side where the bonding pad 55 is not formed. The bonding pads 55 of each set are connected (inner lead connection) via wires 58. An outer lead cutting hole 59 is formed by cutting the carrier film in the upper outer lead portion 57.

Even in such a structure, the inner lead connecting portion 54 can be provided inside the semiconductor element 53. When the inner lead is connected, the gold lead portion and the inner lead are more than the joint portion between the bonding pad 55 and the gold ball. Since the joint portion of the connection portion 54 is located at a higher position, the same effect as the embodiment of FIG. 1 can be obtained. The embodiment of FIG. 5 can also be applied to a semiconductor device having a narrow bonding pad pitch interval.

In the embodiment shown in FIG. 1, the base member 11 may be directly mounted on the circuit board by using another member (for example, a normal circuit board) other than the carrier film. Good.

[0038]

As described above, according to the present invention, it is possible to achieve higher density mounting than the conventional method without complicating the process of the wire bonding method.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of a semiconductor device according to the present invention.

FIG. 2 is an explanatory view explaining a manufacturing process of the semiconductor device of FIG.

FIG. 3 is an enlarged view of a portion B of FIG.

FIG. 4 is a side view showing a state in which the semiconductor device of FIG. 2 is mounted on a circuit board.

FIG. 5 is a plan view of a semiconductor device showing another embodiment according to the present invention.

FIG. 6 is a plan view illustrating a conventional semiconductor device.

FIG. 7 is an explanatory view illustrating a manufacturing process of the semiconductor device of FIG.

FIG. 8 is an enlarged view of a portion A of FIG.

9 is a side view showing a state in which the semiconductor device of FIG. 6 is mounted on a circuit board.

[Explanation of symbols]

11 ... Carrier film, 12 ... Copper foil lead, 13 ... Semiconductor element, 14 ... Inner lead connection part, 15 ... Bonding pad, 16 ... Opening part, 17 ... Outer lead part, 19 ... Wire, 34 ... Circuit board, 35 … Connection

Claims (2)

[Claims] 1. A semiconductor element having a connection pad electrically connected to an internal circuit disposed on a surface thereof, and a first element smaller than the semiconductor element in at least one direction.
A first wiring substrate having an insulating substrate, the first wiring pattern is formed on one surface of the first insulating substrate, and the semiconductor element is fixed to the other surface on the side of the connection pad formation surface; A first wiring pattern and a connection means for electrically connecting the connection pad to each other; and a second wiring pattern formed on a second insulating substrate. A second wiring board, in which a first wiring pattern is electrically connected to the second wiring pattern, is provided. 2. The semiconductor device according to claim 1, wherein the wiring pattern and the connection pad are connected on an active surface of the semiconductor element on which the internal circuit is formed.