JPH08236302A - Structure of chip type resistor - Google Patents
Structure of chip type resistorInfo
- Publication number
- JPH08236302A JPH08236302A JP8012873A JP1287396A JPH08236302A JP H08236302 A JPH08236302 A JP H08236302A JP 8012873 A JP8012873 A JP 8012873A JP 1287396 A JP1287396 A JP 1287396A JP H08236302 A JPH08236302 A JP H08236302A
- Authority
- JP
- Japan
- Prior art keywords
- electrode films
- cover coat
- surface electrode
- film
- face electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 238000013459 approach Methods 0.000 claims 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 239000000463 material Substances 0.000 description 11
- 238000007747 plating Methods 0.000 description 10
- 238000001035 drying Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000001179 sorption measurement Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 238000009966 trimming Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、チップ型の絶縁基
板の上面に抵抗膜を形成して成るチップ型抵抗器の構造
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a chip type resistor formed by forming a resistance film on the upper surface of a chip type insulating substrate.
【０００２】[0002]
【従来の技術】従来、この種のチップ型抵抗器１を製造
するには、 ．先づ、図１０に示すように、チップ型絶縁基板２の
上面における左右両端部に、上面電極膜３を、その材料
ペーストの塗着及び乾燥・焼成にて形成する。 ．前記絶縁基板２の上面に、図１１に示すように、抵
抗膜４を、当該抵抗膜４における両端が前記両上面電極
膜３に一部だけ重なるようにして、その材料ペーストの
塗着及び乾燥・焼成にて形成する。 ．前記絶縁基板２の上面に、図１２に示すように、ガ
ラス等の一次カバーコート５を、前記抵抗膜４の全体を
覆うように、その材料ペーストの塗着及び乾燥・焼成に
て形成する。 ．前記一次カバーコート５及び前記抵抗膜４に、図１
２に二点鎖線で示すように、レーザ等によってトリミン
グ溝６を施すことによって、前記抵抗膜４における全抵
抗値が所定抵抗値の範囲内に入るように調節する。 ．前記一次カバーコート５の上面に、図１３に示すよ
うに、ガラス等の二次カバーコート７を、その材料ペー
ストの塗着及び乾燥・焼成にて形成する。 ．前記絶縁基板２の左右両端における端面２ａに、図
１４に示すように、端面電極膜８を、前記上面電極膜３
に対して電気的に導通するように、その材料ペーストの
塗着及び乾燥・焼成にて形成する。 ．次いで、前記両上面電極膜３及び両端面電極膜８の
表面に、ニッケル等の金属メッキを施して金属メッキ層
を形成する。 と言う製造方法を採用している（例えば、特開昭５６−
１４８８０４号公報等）。2. Description of the Related Art Conventionally, in order to manufacture this type of chip resistor 1, First, as shown in FIG. 10, the upper surface electrode film 3 is formed on the left and right ends of the upper surface of the chip-type insulating substrate 2 by applying the material paste and drying / baking. ． As shown in FIG. 11, a resistance film 4 is formed on the upper surface of the insulating substrate 2 such that both ends of the resistance film 4 partially overlap with the upper surface electrode films 3 and the material paste is applied and dried. -It is formed by firing. ． As shown in FIG. 12, a primary cover coat 5 of glass or the like is formed on the upper surface of the insulating substrate 2 so as to cover the entire resistance film 4 by applying the material paste and drying / baking. ． The primary cover coat 5 and the resistive film 4 have the same structure as shown in FIG.
As indicated by a chain double-dashed line in 2, a trimming groove 6 is formed by a laser or the like so that the total resistance value of the resistance film 4 is adjusted to fall within a predetermined resistance value range. ． As shown in FIG. 13, a secondary cover coat 7 such as glass is formed on the upper surface of the primary cover coat 5 by applying the material paste and drying / baking. ． As shown in FIG. 14, the end face electrode films 8 are provided on the end faces 2a at the left and right ends of the insulating substrate 2, respectively.
It is formed by applying the material paste and drying / baking so as to be electrically conducted to. ． Then, the surfaces of the both upper surface electrode films 3 and both end surface electrode films 8 are plated with a metal such as nickel to form a metal plated layer. This manufacturing method is used (for example, JP-A-56-
148804, etc.).
【０００３】そして、この製造方法によるチップ型抵抗
器１は、チップ型絶縁基板２の上面に左右両端部に形成
された左右一対の上面電極膜３と、両端が前記両上面電
極膜に一部重なるように形成された抵抗膜４と、この抵
抗膜の全体を覆うように形成されたカバーコート７と、
前記絶縁基板２の左右両端面２ａに前記上面電極膜３に
導通するように形成された端面電極膜８とを有する構造
になっている。The chip-type resistor 1 according to this manufacturing method has a pair of left and right upper surface electrode films 3 formed on the upper surface of the chip-type insulating substrate 2 at both left and right ends, and both ends are part of the upper surface electrode films. A resistive film 4 formed so as to overlap, a cover coat 7 formed so as to cover the entire resistive film,
The structure is such that the left and right end surfaces 2a of the insulating substrate 2 have end face electrode films 8 formed so as to be electrically connected to the upper face electrode film 3.
【発明が解決しようとする課題】しかし、この構造のチ
ップ型抵抗器１においては、絶縁基板２の上面における
抵抗膜４を覆うためのカバーコート７の上面が、図１５
に示すように、両上面電極膜３の上面よりも可成り高く
突出し、カバーコート７の上面とその両側における両上
面電極膜３の上面との間に大きい段差が出来た形態にな
っている。However, in the chip resistor 1 having this structure, the upper surface of the cover coat 7 for covering the resistive film 4 on the upper surface of the insulating substrate 2 is as shown in FIG.
As shown in FIG. 3, the protrusions are much higher than the upper surfaces of both upper surface electrode films 3, and a large step is formed between the upper surface of the cover coat 7 and the upper surfaces of both upper surface electrode films 3 on both sides thereof.
【０００４】従って、このチップ型抵抗器１を、プリン
ト配線基板等に対して自動的に搭載すると言う自動マウ
ントに際して、当該チップ型抵抗器１を、図１５に示す
ように、真空吸着式のコレットＡにて吸着するとき、前
記コレットＡが図１５に二点鎖線で示すように横方向に
少しずれただけで、カバーコート７の上面と上面電極膜
３との間における大きい段差のために、大気空気を多量
に吸い込むことになるから、吸着できない吸着ミスが発
生したり、持ち上げの途中で落下したりする事態が発生
すると言う問題があった。Therefore, when the chip resistor 1 is automatically mounted on a printed wiring board or the like, the chip resistor 1 is mounted on a vacuum suction collet as shown in FIG. When adsorbed at A, the collet A is slightly displaced in the lateral direction as shown by the chain double-dashed line in FIG. 15, and due to the large step between the upper surface of the cover coat 7 and the upper electrode film 3, Since a large amount of atmospheric air is sucked in, there is a problem that an adsorption error that cannot be adsorbed or a situation in which it falls during the lifting occurs.
【０００５】また、従来の製造方法による構造のチップ
型抵抗器１では、前記したように、カバーコート７の上
面が両上面電極膜３の上面よりも可成り高く突出した形
態になっていることにより、このチップ型抵抗器１を、
図１６に示すように、プリント基板Ｂに裏返しにして搭
載したのち、その両上面電極膜３及び両端面電極膜８
を、プリント基板Ｂにおける配線パターンＢ１，Ｂ２に
対して半田付けにて実装する場合において、両上面電極
膜３の上面よりも可成り高く突出するカバーコート７
が、プリント基板Ｂに対して先に接当して、両上面電極
膜３と配線パターンＢ１，Ｂ２との間に大きい隙間がで
きることになるから、この大きい隙間のために、チップ
型抵抗器１が、二点鎖線で示すように、その一端部がプ
リント基板Ｂから浮き上がるように傾いて、半田付け実
装できない事態が発生するおそれがあると言う問題もあ
った。Further, in the chip resistor 1 having the structure according to the conventional manufacturing method, as described above, the upper surface of the cover coat 7 is projected to be considerably higher than the upper surfaces of the both upper surface electrode films 3. This chip type resistor 1
As shown in FIG. 16, after being mounted upside down on the printed board B, both upper surface electrode films 3 and both end surface electrode films 8 thereof are mounted.
In the case of mounting the wiring patterns B1 and B2 on the printed circuit board B by soldering, the cover coat 7 protruding considerably higher than the upper surfaces of both upper surface electrode films 3 is mounted.
However, since a large gap is formed between the upper surface electrode film 3 and the wiring patterns B1 and B2 by coming into contact with the printed circuit board B first, the chip resistor 1 has a large gap. However, as indicated by the chain double-dashed line, there is a problem that one end of the printed circuit board B may be tilted so as to be lifted from the printed circuit board B, which may cause a situation in which soldering cannot be performed.
【０００６】本発明は、前記のような問題が発生するこ
とがないようにしたチップ型抵抗器の構造を提供するこ
とを技術的課題とするものである。SUMMARY OF THE INVENTION The present invention has a technical object to provide a structure of a chip-type resistor in which the above problems do not occur.
【課題を解決するための手段】この技術的課題を達成す
るため本発明は、「チップ型絶縁基板の上面における左
右両端部に形成された左右一対の上面電極膜と、両端が
前記両上面電極膜に一部重なるように形成された抵抗膜
と、この抵抗膜の全体を覆うように形成されたカバーコ
ートと、前記絶縁基板の左右両端面に前記上面電極膜に
導通するように形成された端面電極膜とを有するチップ
型抵抗器において、前記両上面電極膜の上面のうち、前
記カバーコートが重ならない部分に、補助上面電極膜
を、この補助上面電極膜が前記カバーコートに密接する
ように形成する。」と言う構成にした。In order to achieve this technical object, the present invention provides "a pair of left and right upper surface electrode films formed at both left and right end portions on the upper surface of a chip-type insulating substrate, and both ends of the upper surface electrodes. A resistance film formed so as to partially overlap the film, a cover coat formed so as to entirely cover the resistance film, and left and right end surfaces of the insulating substrate formed so as to be electrically connected to the upper electrode film. In a chip resistor having an end surface electrode film, an auxiliary upper surface electrode film is provided on a portion of the upper surfaces of the upper surface electrode films that does not overlap with the cover coat so that the auxiliary upper surface electrode film is in close contact with the cover coat. It will be formed into a sheet. ”
【０００７】[0007]
【発明の作用・効果】このように、両上面電極膜の上面
に、補助上面電極膜を形成することにより、この補助上
面電極膜上面を、カバーコートの上面に対して近づける
ことができ、換言すると、補助上面電極膜の上面と、カ
バーコートの上面との間における段差を、小さくするこ
とができるか、或いは殆ど無くすることができる。As described above, by forming the auxiliary upper surface electrode films on the upper surfaces of both upper surface electrode films, the upper surface of the auxiliary upper surface electrode film can be brought closer to the upper surface of the cover coat. Then, the step between the upper surface of the auxiliary upper electrode film and the upper surface of the cover coat can be made small or can be almost eliminated.
【０００８】これに加えて、前記補助上面電極膜をカバ
ーコートに密接したことで、その間に隙間ができていな
いことにより、このチップ型抵抗器の自動マウントに際
して、真空吸着式コレットにて吸着するとき、コレット
が横方向にずれても、大気空気を多量に吸い込むことを
防止できるから、吸着ミスが発生したり、持ち上げの途
中で落下したりすることを確実に防止できるのである。In addition to this, since the auxiliary upper surface electrode film is brought into close contact with the cover coat and no gap is formed between them, when the chip type resistor is automatically mounted, it is adsorbed by the vacuum adsorption type collet. At this time, even if the collet is displaced in the lateral direction, it is possible to prevent a large amount of atmospheric air from being sucked in, so that it is possible to reliably prevent a suction error or a drop during lifting.
【０００９】しかも、補助上面電極膜の上面と、カバー
コートの上面との間における段差を、小さくすることが
できるか、或いは殆ど無くすることができるから、この
チップ型抵抗器をプリント基板に対して裏返しにて半田
付け実装する場合に、その一端部がプリント基板から浮
き上がるように傾くを確実に防止でき、プリント基板等
に対して確実に半田付け実装できるのである。Moreover, since the step between the upper surface of the auxiliary upper electrode film and the upper surface of the cover coat can be made small or can be almost eliminated, this chip type resistor can be applied to the printed circuit board. In the case of soldering by turning it upside down, it is possible to surely prevent one end portion from tilting so as to float up from the printed circuit board, and it is possible to surely perform soldering mounting to the printed circuit board or the like.
【００１０】[0010]
【実施例】以下、本発明の実施例を図面について説明す
るに、本発明の実施例によるチップ型抵抗器１０は、図
１に示すような構造になっている。すなわち、前記チッ
プ型抵抗器１０は、セラミック等によってチップ型に形
成した絶縁基板１１と、この絶縁基板１１における上面
のうち左右両端部に形成された左右一対の上面電極膜１
２と、両端が前記両上面電極膜１２に一部重なるように
形成された抵抗膜１３と、この抵抗膜１３の全体を覆う
ように形成された一次カバーコート１４と、更にこの一
次カバーコート１４を覆うように形成された二次カバー
コート１６と、前記両上面電極膜１２の上面のうち前記
二次カバーコート１６が重ならない部分に二次カバーコ
ート１６に密接するように構成された適宜厚さの補助上
面電極膜１７と、前記絶縁基板１１の左右両端面１１ａ
に前記上面電極膜１２及び補助上面電極膜１７に導通す
るように形成された端面電極膜１８と、更に、この両端
面電極膜１８及び前記両補助上面電極膜１７の表面に形
成されたニッケルメッキ層１９及びニッケルメッキ層１
９等からなる金属メッキ層２１とにより構成されてい
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will now be described with reference to the drawings. A chip type resistor 10 according to the embodiments of the present invention has a structure as shown in FIG. That is, the chip-type resistor 10 includes a chip-shaped insulating substrate 11 made of ceramic or the like, and a pair of left and right upper surface electrode films 1 formed on both left and right ends of the upper surface of the insulating substrate 11.
2, a resistance film 13 formed so that both ends thereof partially overlap the upper surface electrode films 12, a primary cover coat 14 formed so as to cover the entire resistance film 13, and the primary cover coat 14 A secondary cover coat 16 formed so as to cover the upper surface of the both upper surface electrode films 12 and an appropriate thickness configured to be in close contact with the secondary cover coat 16 at a portion of the upper surfaces of the upper surface electrode films 12 where the secondary cover coat 16 does not overlap. Auxiliary auxiliary electrode film 17 and left and right end surfaces 11a of the insulating substrate 11.
An end face electrode film 18 formed so as to be electrically connected to the upper surface electrode film 12 and the auxiliary upper surface electrode film 17, and nickel plating formed on the surfaces of the both end face electrode films 18 and the auxiliary upper surface electrode films 17. Layer 19 and nickel plated layer 1
It is composed of a metal plating layer 21 made of 9 or the like.
【００１１】そして、この構成のチップ型抵抗器１０
は、以下に述べる方法によって製造される。 ．先づ、図２に示すように、絶縁基板１１の上面にお
ける左右両端部に、上面電極膜１２を、その材料ペース
トの塗着及び乾燥・焼成にて形成する。 ．前記絶縁基板１１の上面に、図３に示すように、抵
抗膜１３を、当該抵抗膜１３における両端が前記両上面
電極膜１２に一部が重なるようにして、その材料ペース
トの塗着及び乾燥・焼成にて形成する。 ．前記絶縁基板１１の上面に、図４に示すように、ガ
ラス等の一次カバーコート１４を、前記抵抗膜１３の全
体を覆うように、その材料ペーストの塗着及び乾燥・焼
成にて形成する。 ．前記一次カバーコート１４及び前記抵抗膜１３に、
図４二点鎖線で示すように、レーザ等によってトリミン
グ溝１５を施すことによって、前記抵抗膜１３における
全抵抗値が所定抵抗値の範囲内に入るように調節する。 ．前記一次カバーコート１４の上面に、図５に示すよ
うに、ガラス等の二次カバーコート１６を、その材料ペ
ーストの塗着及び乾燥・焼成にて形成する。 ．前記両上面電極膜１２の上面に、図６に示すよう
に、適宜膜厚さの補助上面電極膜１７を、当該補助上面
電極膜１７が前記二次カバーコート１６に対して一部重
なるように密接して、その材料ペーストの塗着及び乾燥
・焼成にて形成する。なお、この場合において、両補助
上面電極膜１７における膜厚さを、当該補助上面電極膜
１７の上面のうち少なくとも前記二次カバーコート１６
に隣接する部分が二次カバーコート１６の上面に近づく
ようにする。 ．前記絶縁基板１１の左右両端における端面１１ａ
に、図７に示すように、端面電極膜１８を、前記上面電
極膜１２及び補助上面電極膜１７に対して電気的に導通
するように、その材料ペーストの塗着及び乾燥・焼成に
て形成する。 ．次いで、ニッケルのメッキを施したのち、半田のメ
ッキを施すことにより、前記両補助上面電極膜１７及び
両端面電極膜１８の表面に、図１に示すように、ニッケ
ルメッキ層１９及び半田メッキ層２０等から成る金属メ
ッキ層２１を形成する。Then, the chip resistor 10 having this structure is used.
Is manufactured by the method described below. ． First, as shown in FIG. 2, the upper surface electrode films 12 are formed on the left and right ends of the upper surface of the insulating substrate 11 by applying the material paste and drying / baking. ． As shown in FIG. 3, a resistance film 13 is formed on the upper surface of the insulating substrate 11 so that both ends of the resistance film 13 partially overlap the upper surface electrode films 12, and the material paste is applied and dried. -It is formed by firing. ． As shown in FIG. 4, a primary cover coat 14 of glass or the like is formed on the upper surface of the insulating substrate 11 by coating the material paste and drying / baking so as to cover the entire resistance film 13. ． On the primary cover coat 14 and the resistance film 13,
As shown by the chain double-dashed line in FIG. 4, a trimming groove 15 is formed by a laser or the like so that the total resistance value of the resistance film 13 is adjusted to fall within a predetermined resistance value range. ． As shown in FIG. 5, a secondary cover coat 16 such as glass is formed on the upper surface of the primary cover coat 14 by applying the material paste and drying / baking. ． As shown in FIG. 6, an auxiliary upper surface electrode film 17 having an appropriate film thickness is formed on the upper surfaces of the upper surface electrode films 12 so that the auxiliary upper surface electrode film 17 partially overlaps the secondary cover coat 16. It is formed by closely applying the material paste, and drying and firing. In this case, the film thickness of both auxiliary upper surface electrode films 17 is set to at least the secondary cover coat 16 on the upper surface of the auxiliary upper surface electrode films 17.
The portion adjacent to is close to the upper surface of the secondary cover coat 16. ． End surfaces 11a at the left and right ends of the insulating substrate 11
As shown in FIG. 7, the end face electrode film 18 is formed by applying the material paste and drying / baking so as to be electrically conducted to the upper surface electrode film 12 and the auxiliary upper surface electrode film 17. To do. ． Next, nickel plating is performed, and then solder plating is performed to form a nickel plating layer 19 and a solder plating layer on the surfaces of the both auxiliary upper surface electrode films 17 and both end surface electrode films 18 as shown in FIG. A metal plating layer 21 composed of 20 or the like is formed.
【００１２】このように、前記両上面電極膜１２の上面
に、補助上面電極膜１７を、当該補助上面電極膜１７の
上面のうち少なくとも二次カバーコート１６に隣接する
部分が二次カバーコート１６の上面に近づくようにして
形成することにより、補助上面電極膜１７の上面と、二
次カバーコート１６の上面との間における段差を、小さ
くすることができるか、或いは殆ど無くすることができ
る。As described above, the auxiliary upper surface electrode film 17 is formed on the upper surfaces of both the upper surface electrode films 12, and at least a portion of the upper surface of the auxiliary upper surface electrode film 17 adjacent to the secondary cover coat 16 is the secondary cover coat 16. By forming the upper surface of the auxiliary upper surface electrode film 17 and the upper surface of the secondary cover coat 16 so as to be close to the upper surface of the secondary cover coat 16, it is possible to reduce or almost eliminate the step.
【００１３】これに加えて、前記補助上面電極膜１７を
二次カバーコート１６に密接したことで、その間に隙間
ができていないことにより、このチップ型抵抗器１０
を、プリント基板等に対して自動マウントに際して、図
８に示すように、真空吸着式コレットＡにて吸着すると
き、このコレットＡが、図８に二点鎖線で示すように横
方向にずれても、多量の大気空気を吸い込むことがない
から、吸着ミスが発生したり、持ち上げの途中で落下し
たりすることを確実に防止できるのである。In addition to this, since the auxiliary upper surface electrode film 17 is brought into close contact with the secondary cover coat 16 and no gap is formed between them, the chip-type resistor 10 is provided.
8 is automatically mounted on a printed circuit board or the like, when it is adsorbed by a vacuum adsorption type collet A as shown in FIG. 8, the collet A is laterally displaced as shown by a chain double-dashed line in FIG. However, since a large amount of atmospheric air is not sucked in, it is possible to reliably prevent an adsorption error or a fall during the lifting process.
【００１４】しかも、前記補助上面電極膜１７の上面
と、二次カバーコート１６の上面との間における段差
を、小さくすることができるか、或いは殆ど無くするこ
とができることにより、このチップ型抵抗器１０を、図
９に示すように、プリント基板Ｂの上面に裏返しにして
載置したのち、このプリント基板Ｂの上面における配線
パターンＢ１，Ｂ２に対して半田付けにて実装する場合
において、両補助上面電極１７と、プリント基板Ｂにお
ける両配線パターンＢ１，Ｂ２との間に大きな隙間が形
成することを回避できるから、チップ型抵抗器１０が、
一端部がプリント基板Ｂから浮き上がるように傾くを確
実に防止できて、プリント基板等に対して確実に半田付
け実装できるのである。Moreover, the step between the upper surface of the auxiliary upper surface electrode film 17 and the upper surface of the secondary cover coat 16 can be made small or almost eliminated, so that this chip type resistor can be eliminated. As shown in FIG. 9, when 10 is turned upside down on the upper surface of the printed board B and then mounted on the wiring patterns B1 and B2 on the upper surface of the printed board B by soldering, Since it is possible to prevent a large gap from being formed between the upper surface electrode 17 and the two wiring patterns B1 and B2 on the printed circuit board B, the chip resistor 10 is
It is possible to reliably prevent the one end from tilting so as to float from the printed circuit board B, and it is possible to surely solder and mount the printed circuit board or the like.
【図１】本発明の実施例によるチップ型抵抗器の縦断正
面図である。FIG. 1 is a vertical sectional front view of a chip resistor according to an embodiment of the present invention.
【図２】本発明のチップ型抵抗器の製造に際し絶縁基板
に上面電極膜を形成したときの斜視図である。FIG. 2 is a perspective view when an upper surface electrode film is formed on an insulating substrate in manufacturing the chip resistor of the present invention.
【図３】前記絶縁基板に抵抗膜を形成したときの斜視図
である。FIG. 3 is a perspective view when a resistance film is formed on the insulating substrate.
【図４】前記絶縁基板に一次カバーコートを形成したと
きの一部切欠斜視図である。FIG. 4 is a partially cutaway perspective view when a primary cover coat is formed on the insulating substrate.
【図５】前記絶縁基板に二次カバーコートを形成したと
きの斜視図である。FIG. 5 is a perspective view when a secondary cover coat is formed on the insulating substrate.
【図６】前記絶縁基板に補助上面電極膜を形成したとき
の斜視図である。FIG. 6 is a perspective view when an auxiliary upper surface electrode film is formed on the insulating substrate.
【図７】前記絶縁基板に端面電極膜を形成したときの斜
視図である。FIG. 7 is a perspective view when an end face electrode film is formed on the insulating substrate.
【図８】本発明によるチップ型抵抗器を真空吸着式コレ
ットにて吸着している状態を示す図である。FIG. 8 is a diagram showing a state in which the chip resistor according to the present invention is sucked by a vacuum suction type collet.
【図９】本発明によるチップ型抵抗器をプリント基板に
対して裏返しにして実装する場合を示す図である。FIG. 9 is a diagram showing a case where the chip resistor according to the present invention is mounted by turning it over a printed circuit board.
【図１０】従来におけるチップ型抵抗器の製造に際し絶
縁基板に上面電極膜を形成したときの斜視図である。FIG. 10 is a perspective view when an upper surface electrode film is formed on an insulating substrate in manufacturing a conventional chip resistor.
【図１１】前記絶縁基板に抵抗膜を形成したときの斜視
図である。FIG. 11 is a perspective view when a resistance film is formed on the insulating substrate.
【図１２】前記絶縁基板に一次カバーコートを形成した
ときの一部切欠斜視図である。FIG. 12 is a partially cutaway perspective view when a primary cover coat is formed on the insulating substrate.
【図１３】前記絶縁基板に二次カバーコートを形成した
ときの斜視図である。FIG. 13 is a perspective view when a secondary cover coat is formed on the insulating substrate.
【図１４】前記絶縁基板に端面電極膜を形成したときの
斜視図である。FIG. 14 is a perspective view when an end face electrode film is formed on the insulating substrate.
【図１５】従来によるチップ型抵抗器を真空吸着式コレ
ットにて吸着している状態を示す図である。FIG. 15 is a view showing a state in which a conventional chip resistor is attracted by a vacuum attraction collet.
【図１６】従来によるチップ型抵抗器をプリント基板に
対して裏返しにして実装する場合を示す図である。FIG. 16 is a diagram showing a case where a conventional chip resistor is mounted on the printed circuit board by turning it over.
１０ チップ型抵抗器 １１ 絶縁基板 １２ 上面電極膜 １３ 抵抗膜 １４ 一次カバーコート １５ トリミング溝 １６ 二次カバーコート １７ 補助上面電極膜 １８ 端面電極膜 １９ ニッケルメッキ層 ２０ 半田メッキ層 ２１ 金属メッキ層 10 Chip Resistor 11 Insulating Substrate 12 Top Electrode Film 13 Resistive Film 14 Primary Cover Coat 15 Trimming Groove 16 Secondary Cover Coat 17 Auxiliary Top Electrode Film 18 End Face Electrode Film 19 Nickel Plating Layer 20 Solder Plating Layer 21 Metal Plating Layer
Claims (2)
部に形成された左右一対の上面電極膜と、両端が前記両
上面電極膜に一部重なるように形成された抵抗膜と、こ
の抵抗膜の全体を覆うように形成されたカバーコート
と、前記絶縁基板の左右両端面に前記上面電極膜に導通
するように形成された端面電極膜とを有するチップ型抵
抗器において、前記両上面電極膜の上面のうち、前記カ
バーコートが重ならない部分に、補助上面電極膜を、こ
の補助上面電極膜が前記カバーコートに密接するように
形成したことを特徴とするチップ型抵抗器の構造。1. A pair of left and right upper surface electrode films formed on both left and right ends of an upper surface of a chip-type insulating substrate, a resistance film formed so that both ends thereof partially overlap with both upper surface electrode films, and the resistance film. In a chip type resistor having a cover coat formed to cover the entire surface of the insulating substrate and end face electrode films formed on both left and right end faces of the insulating substrate so as to be electrically connected to the upper face electrode film. A structure of a chip resistor, wherein an auxiliary upper surface electrode film is formed on a portion of the upper surface of the substrate where the cover coating does not overlap so that the auxiliary upper surface electrode film is in close contact with the cover coating.
面電極膜の厚さを、当該補助上面電極膜の上面のうち少
なくとも前記カバーコートに隣接する部分がカバーコー
トの上面に近づくようにしたことを特徴とするチップ型
抵抗器の構造。2. The method according to claim 1, wherein the thickness of each of the auxiliary upper surface electrode films is set so that at least a portion of the upper surfaces of the auxiliary upper surface electrode films adjacent to the cover coat approaches the upper surface of the cover coat. The structure of a chip-type resistor characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01287396A JP3177429B2 (en) | 1996-01-29 | 1996-01-29 | Structure of chip type resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01287396A JP3177429B2 (en) | 1996-01-29 | 1996-01-29 | Structure of chip type resistor |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2220568A Division JP2535441B2 (en) | 1990-08-21 | 1990-08-21 | Manufacturing method of chip resistor |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11032940A Division JP3121325B2 (en) | 1999-02-10 | 1999-02-10 | Structure of chip type resistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08236302A true JPH08236302A (en) | 1996-09-13 |
| JP3177429B2 JP3177429B2 (en) | 2001-06-18 |
Family
ID=11817553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP01287396A Expired - Fee Related JP3177429B2 (en) | 1996-01-29 | 1996-01-29 | Structure of chip type resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3177429B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003086402A (en) * | 2001-09-12 | 2003-03-20 | Rohm Co Ltd | Structure of chip resistor and manufacturing method therefor |
| WO2003046934A1 (en) * | 2001-11-28 | 2003-06-05 | Rohm Co.,Ltd. | Chip resistor and method for producing the same |
| US6856234B2 (en) | 2003-02-25 | 2005-02-15 | Rohm Co., Ltd. | Chip resistor |
| US6861941B2 (en) | 2003-02-18 | 2005-03-01 | Rohm Co., Ltd. | Chip resistor |
| JP2007123832A (en) * | 2005-09-27 | 2007-05-17 | Hokuriku Electric Ind Co Ltd | Terminal structure of chip-like electrical components |
| US7786842B2 (en) | 2005-03-02 | 2010-08-31 | Rohm Co., Ltd. | Chip resistor and manufacturing method thereof |
-
1996
- 1996-01-29 JP JP01287396A patent/JP3177429B2/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003086402A (en) * | 2001-09-12 | 2003-03-20 | Rohm Co Ltd | Structure of chip resistor and manufacturing method therefor |
| WO2003046934A1 (en) * | 2001-11-28 | 2003-06-05 | Rohm Co.,Ltd. | Chip resistor and method for producing the same |
| US7098768B2 (en) | 2001-11-28 | 2006-08-29 | Rohm Co., Ltd. | Chip resistor and method for making the same |
| CN100351956C (en) * | 2001-11-28 | 2007-11-28 | 罗姆股份有限公司 | Chip resistor and manufacturing method thereof |
| US6861941B2 (en) | 2003-02-18 | 2005-03-01 | Rohm Co., Ltd. | Chip resistor |
| US6856234B2 (en) | 2003-02-25 | 2005-02-15 | Rohm Co., Ltd. | Chip resistor |
| US7786842B2 (en) | 2005-03-02 | 2010-08-31 | Rohm Co., Ltd. | Chip resistor and manufacturing method thereof |
| JP2007123832A (en) * | 2005-09-27 | 2007-05-17 | Hokuriku Electric Ind Co Ltd | Terminal structure of chip-like electrical components |
| US7825769B2 (en) | 2005-09-27 | 2010-11-02 | Hokuriku Electric Co., Ltd. | Terminal structure of chiplike electric component |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3177429B2 (en) | 2001-06-18 |
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