JPH08223601A - SECAM color signal reproduction processing device - Google Patents

Abstract

(57) [Abstract] [Purpose] SE in SECAM color signal reproduction processor
A stable PLL circuit is obtained by reducing the delay of the CAM color signal. [Structure] SECA for reproducing SECAM color signals
In the M color signal reproduction processing device, a phase comparator for comparing the SECAM color signal with the frequency-divided signal of the voltage controlled oscillator, a voltage controlled oscillator for oscillating 4 times or 8 times the frequency of the input SECAM color signal, 1/4 minute Frequency divider or 1/2 frequency divider and 1
A PLL circuit is configured using a combination of / 4 frequency dividers,
Stable by detecting two carrier frequencies of the SECAM color signal and applying the line discrimination voltage to the voltage controlled oscillator or / and adding the gate output of the gate pulse generator that generates the gate signal by the composite sync signal to the phase comparator. The reproduced SECAM color signal is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a SECAM color signal reproduction processing device. More specifically, the present invention reduces the delay of the color signal at the time of reproduction in the SECAM color signal reproduction processing device and stabilizes the PLL.
The present invention relates to a device forming a circuit.

[0002]

2. Description of the Related Art Simply speaking, SECAM color signal reproduction processing in the VHS system is performed by dividing the frequency by 1/4 at the time of recording to reduce the frequency (about 1 MHz) and writing it on a tape, and conversely multiplying it by 4 when reproducing. It is a process of returning to the signal (4 MHz).

FIG. 22 shows an SE in the conventional VHS system.
It is a figure which shows the recording process of a CAM color signal. In FIG. 22, 12 is about 4 MH for extracting only necessary signal components.
z band-pass filter (hereinafter referred to as BPF). The bandpass filter 12 is mainly used for the purpose of Y / C separation. 8 is an inverse bell filter, 3 is a 1/4 frequency divider, 4 is a BPF of about 1 MHz for extracting only necessary signal components, 1
3 is a bell filter.

FIG. 23 is a diagram showing a process of reproducing a SECAM color signal. In FIG. 23, 6 is a head for picking up a signal from the tape, 7 is a head amplifier for amplifying a weak signal picked up by the head, 8 is an inverse bell filter, and 9 is the first 2
The multiplier 10 is about 2 MH for extracting only necessary signal components.
z BPF, 11 is the second doubler, 12 is about 4 MHz
Is a band pass filter, and 13 is a bell filter. Bandpass filter 1 in the recording and playback process
2 is commonly shared.

The bell filter in the SECAM color signal reproduction processing device will be briefly described below. FIG. 24 is a diagram showing frequency-gain characteristics of the bell filter. The bell filter is defined in the SECAM system, and in order to avoid interference between the color signal and the luminance signal, which are FM signals, the bell signal is added to the color signal before combining them.
The inverse bell filter as shown in (b) is applied to limit the carrier component. Since the signal that has passed through the inverse bell filter has different amplitudes and delays for each color, it is common to perform the signal processing after applying the bell filter as shown in FIG. 24A to restore the signal. Incidentally, in the VHS method, the same processing is performed on the low frequency recording signal (see FIG. 22).

Since the present invention mainly relates to reproduction signal processing of color signals, a conventional reproduction signal processing of SECAM color signals will be described. Conventionally, it has been difficult to multiply the SECAM color signal by 4 at a time, so the 2 multiplication is divided into 2 and multiplied by 4.

FIG. 25 is a diagram showing a conventional doubler circuit. In FIG. 25, 21 is a differential amplifier and 22 is a rectifier. The positive-phase output (b) and the negative-phase output (c) of the differential amplifier 21 are both-wave rectified by the rectifier 22 composed of the common emitter, and the frequency doubled is output. This state is shown in FIG.

FIG. 26 is a diagram showing the waveform of each part of the doubler circuit of FIG. In FIG. 26, (a) is an input signal waveform to the doubler, (b) is a positive phase output, (c) is a negative phase output, and (d) is a double-wave rectified output. The double-wave rectified output in (d) contains many integral harmonic components as well as twice the fundamental component. Therefore, after doubling, the rectified output is sent to the next circuit after removing unnecessary harmonic components by using the BPF corresponding to each frequency.

As described above, since the conventional SECAM color signal processing is configured by using many filters, the delay of the color signal processing based on the delay of the filter is very large. In particular, during reproduction, the delay was larger than that during recording because an extra BPF of 2 MHz was required. Since the delay of the color signal processing is large as compared with the processing of the luminance signal, there is a problem that the luminance signal must be additionally delayed in order to match the delay time. Therefore, in order to perform the multiplication by 4, instead of performing the multiplication twice in two times, if the multiplication is performed at once,
The BPF of MHz is unnecessary and the delay can be reduced.

FIG. 27 is a diagram showing a configuration example of a conventional SECAM color signal reproduction processing circuit for multiplying a color signal by four at once. In FIG. 27, 15 is a phase comparator, 16 is 4 MH
z is a voltage controlled oscillator (VCO). In FIG. 27, blocks denoted by the same reference numerals as those in FIGS. 22 and 23 are the same elements, and thus detailed description thereof will be omitted. The characteristic of the conventional SECAM color signal reproduction processing circuit shown in the figure is that the phase comparator 15 and the 4 MHz voltage controlled oscillator 16 and 1/4
It is in a PLL circuit composed of the frequency divider 3. Since the 1/4 frequency divider can be shared with the recording one, it is designated by the same reference numeral 3.

One input of the phase comparator 15 is a low frequency SECAM input from the head through the inverse bell filter 8.
A color signal (about 1 MHz), and the other input is a signal obtained by dividing the output of the voltage controlled oscillator 16 of 4 MHz by 1/4 by the 1/4 frequency divider 3. That is, the phase comparator 15 compares the phases of the low frequencies and controls the voltage-controlled oscillator 16 of 4 MHz by the error voltage. Therefore, the 4 MHz voltage controlled oscillator 16 is set to oscillate at exactly four times the low frequency color signal. This signal is 4MHz BP
After being input to F12 to remove unnecessary harmonic components, it is output via the bell filter 13.

[0012]

Problems to be Solved by the Invention SEC as shown in FIG.
In the AM color signal reproduction processing device, a 2 MHz BPF
However, since the carrier of FM modulation is different for each horizontal scanning line, that is, the frequency changes at the switching point of the horizontal scanning line, the PLL switches the horizontal scanning line. There was a bad effect that it became unstable at a turning point.

[0013]

SUMMARY OF THE INVENTION It is an object of the present invention to reduce the delay of SECAM color signals during reproduction as much as possible and to construct a stable PLL circuit even if the frequency changes at the switching point of the horizontal scanning line. There is something you can do.

In order to achieve such an object, the present invention has a band-pass filter, an inverse bell filter, and a bell filter for performing SECAM color signal reproduction processing.
In the color signal reproduction processing device: a phase comparator that compares an input SECAM color signal with a signal obtained by dividing the oscillation frequency from a voltage-controlled oscillator having a quadruple frequency described below by 1/4, and an output signal from the phase comparator. , A voltage-controlled oscillator that is controlled to oscillate four times the frequency of the input SECAM color signal, and a quarter that divides the frequency of the voltage-controlled oscillator by ¼
A frequency divider and a SECAM color signal detect two carrier frequencies of different SECAM color signals, and the line discrimination voltage corresponding to the carrier frequency is 4 MHz.
And a line discriminating circuit for outputting the voltage to the voltage controlled oscillator 16, and is configured to output a signal obtained by multiplying the reproduction input SECAM color signal by 4 via the voltage controlled oscillator.

Further, the present invention provides a SECAM color signal reproduction processing apparatus having a bandpass filter, an inverse bell filter and a bell filter for reproducing a SECAM color signal:
A phase comparator that compares the input SECAM color signal with a signal obtained by dividing the oscillation frequency from the voltage-controlled oscillator having a quadruple frequency described below by 1/4, and an output signal from the phase comparator, A voltage controlled oscillator controlled to oscillate a frequency four times, a quarter frequency divider that divides the frequency of the voltage controlled oscillator by a quarter, and a SECAM
And a gate pulse generator that generates a gate pulse by the composite sync signal obtained from the luminance signal,
It is configured to output a signal obtained by multiplying the reproduction input SECAM color signal by 4 via this voltage controlled oscillator.

Further, the present invention provides a SECAM color signal reproduction processing device having a bandpass filter, an inverse bell filter, and a bell filter for reproducing a SECAM color signal: an input SECAM color signal and a voltage of an 8 times frequency described later. A phase comparator that compares a signal obtained by dividing the oscillation frequency from the controlled oscillator by 1/8 and an output signal from this phase comparator are controlled to oscillate a frequency that is eight times the frequency of the input SECAM color signal. A voltage-controlled oscillator, a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2, and
And a 1/4 frequency divider that divides the output frequency of the 1/2 frequency divider by 1/4, and a reproduction input SECA is provided via this 1/2 frequency divider.
It is configured to output a signal obtained by multiplying the M color signal by four.

Further, the present invention provides a SECAM color signal reproduction processing device having a bandpass filter, an inverse bell filter, and a bell filter for reproducing a SECAM color signal: an input SECAM color signal and a voltage of an eightfold frequency described later. A phase comparator that compares a signal obtained by dividing the oscillation frequency from the controlled oscillator by 1/8 and an output signal from this phase comparator are controlled to oscillate a frequency that is eight times the frequency of the input SECAM color signal. A voltage-controlled oscillator, a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2, and
1/4 frequency divider for dividing the output frequency of the 1/2 frequency divider by 1/4, and a gate pulse generator for generating a gate pulse by the composite sync signal obtained from the SECAM luminance signal. / SE for playback input via a frequency divider
It is configured to output a signal obtained by multiplying the CAM color signal by four.

Further, according to the present invention, in a SECAM color signal reproduction processing apparatus having a bandpass filter, an inverse bell filter and a bell filter for reproducing a SECAM color signal: an input SECAM color signal and a voltage of an 8 times frequency described later. A phase comparator that compares a signal obtained by dividing the oscillation frequency from the controlled oscillator by 1/8 and an output signal from this phase comparator are controlled to oscillate a frequency that is eight times the frequency of the input SECAM color signal. A voltage-controlled oscillator, a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2, and
A 1/4 divider that divides the frequency of the 1/2 divider by 1/4,
A line discrimination circuit for detecting two carrier frequencies of the SECAM color signal different from each other by the SECAM color signal and outputting a line discrimination voltage corresponding to the carrier frequency to a voltage controlled oscillator is provided. Is output via the input signal from the reproduction input SECAM color signal.

Further, the present invention provides a SECAM color signal reproduction processing apparatus having a bandpass filter, an inverse bell filter, and a bell filter for reproducing a SECAM color signal: an input SECAM color signal and a voltage of a quadruple frequency described later. A phase comparator that compares a signal obtained by dividing the oscillation frequency from the controlled oscillator by 1/4 and an output signal from this phase comparator are controlled to oscillate a frequency four times as high as the input SECAM color signal. A voltage controlled oscillator, a quarter divider for dividing the frequency of the voltage controlled oscillator by a quarter, and a SEC
The AM carrier color signal detects two carrier frequencies of the SECAM color signal, and the line discriminating voltage corresponding to the carrier frequency is detected by the voltage controlled oscillator 1 of 4 MHz.
It has a line discrimination circuit for outputting to 6 and a gate pulse generator for generating a gate pulse by a composite sync signal obtained from the SECAM luminance signal, and the reproduction input SECAM color signal is multiplied by 4 via this voltage controlled oscillator. It is configured to output a signal.

Further, according to the present invention, in a SECAM color signal reproduction processing device having a bandpass filter, an inverse bell filter, and a bell filter for reproducing a SECAM color signal: an input SECAM color signal and a voltage of an 8 times frequency described later. A phase comparator that compares a signal obtained by dividing the oscillation frequency from the controlled oscillator by 1/8 and an output signal from this phase comparator are controlled to oscillate a frequency that is eight times the frequency of the input SECAM color signal. A voltage-controlled oscillator, a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2, and
The 1/4 frequency divider that divides the output frequency of the 1/2 frequency divider by 1/4, and two carrier frequencies of the SECAM color signal that are different from each other are detected by the SECAM color signal. It has a line discriminating circuit for outputting a voltage to a voltage controlled oscillator and a gate pulse generator for generating a gate pulse by a composite sync signal obtained from a SECAM luminance signal, and a reproduction input is made via this 1/2 frequency divider. It is configured to output a signal obtained by multiplying the SECAM color signal by four.

Further, this line discriminating circuit of the present invention is
M detector, phase discriminator, sampling circuit, integrating circuit,
It is composed of a comparator and a flip-flop, and is configured to control the oscillation frequency of the voltage controlled oscillator by applying different line discrimination outputs to the voltage controlled oscillator depending on two different carrier frequencies in the SECAM color signal.

In the line discriminating circuit of the present invention, the line discriminating output is configured to control the oscillation frequency of the voltage controlled oscillator by changing the constant current value of the voltage controlled oscillator.

Further, the gate pulse generator of the present invention is
The falling part of the input composite sync signal is discharged at high speed using a transistor and a capacitor, and the rising part is charged with a constant current at a constant current,
The trailing edge is configured to produce a delayed signal and generate a wide gate pulse by the trailing edge delay time.

[0024]

In the present invention, the phase comparator, the input SECA
A PLL is constituted by a voltage controlled oscillator that oscillates a frequency four times that of the M color signal and a 1/4 frequency divider, and a reproduction output can be obtained directly from the voltage controlled oscillator. By adding it to the voltage controlled oscillator, a stable reproduced SECAM color signal can be obtained.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates four times the frequency of the input SECAM color signal, and the 1/4 frequency divider constitute a PLL, and the reproduced output is directly output from the voltage controlled oscillator. A stable reproduced SECAM color signal can be obtained by adding the gate output from the gate pulse generator to the phase comparator.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates at a frequency eight times as high as the input SECAM color signal, the 1/2 frequency divider and the 1/4 frequency divider make the PL
It is possible to obtain a reproduction output from the 1/2 divider by configuring L.

Further, in the present invention, the phase comparator, the voltage-controlled oscillator that oscillates at a frequency eight times as high as the input SECAM color signal, the 1/2 frequency divider and the 1/4 frequency divider make the PL
It is possible to obtain a reproduction output from the 1/2 divider by configuring L, and by adding the line discrimination output from the gate pulse generator to the phase comparator, a stable reproduction SEC can be obtained.
An AM color signal is obtained.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates a frequency eight times as high as the input SECAM color signal, the ½ frequency divider and the ¼ frequency divider make the PL
It is possible to obtain a reproduction output from the 1/2 frequency divider by configuring L, and by adding the line discrimination output from the line discrimination circuit to the voltage controlled oscillator, a stable reproduction S
An ECAM color signal is obtained.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates four times the frequency of the input SECAM color signal, and the 1/4 frequency divider constitute a PLL, and the reproduction output is directly output from the voltage controlled oscillator. A stable reproduced SECAM color signal can be obtained by adding the line discrimination output from the line discrimination circuit to the voltage controlled oscillator and further adding the line discrimination output from the gate pulse generator to the phase comparator. can get.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates a frequency eight times as high as the input SECAM color signal, the ½ frequency divider and the ¼ frequency divider make the PL
It is possible to obtain a reproduction output from the 1/2 frequency divider by configuring L, add the line discrimination output from the line discrimination circuit to the voltage controlled oscillator, and further add the line discrimination output from the gate pulse generator. By adding it to the phase comparator, a stable reproduced SECAM color signal can be obtained.

Further, in the present invention, the line discriminating circuit controls the oscillation frequency of the voltage controlled oscillator by applying different line discriminating outputs to the voltage controlled oscillator depending on two different carrier frequencies in the SECAM color signal.

Further, in the present invention, the line discrimination output of the line discrimination circuit changes the constant current value of the voltage controlled oscillator, thereby controlling the oscillation frequency of the voltage controlled oscillator.

Further, in the present invention, the gate pulse generator generates a gate pulse having a width wider than that of the composite sync signal, and by adding it to the phase comparator, stable oscillation can be obtained.

[0034]

【Example】

(Embodiment 1) FIG. 1 is a diagram for explaining a first embodiment of the present invention. FIG. 1 shows a circuit in which a line discrimination circuit 19 is added to the conventional SECAM color signal reproduction processing circuit of FIG.

The operation of the SECAM color signal reproduction processing circuit of the first embodiment will be described below. The actual SECAM color signal is
Since the FM carrier frequency is different for each horizontal period, the error voltage output from the phase comparator 15 for each horizontal period changes greatly. Moreover, since the change is rapid, ringing occurs at the change point of the error voltage. This means that the signal is likely to be disturbed by the time the ringing becomes stable at the starting point of the horizontal section.

FIG. 2 shows the phase comparator 1 in one horizontal period.
5 is a diagram showing an output signal of FIG. FIG. 2A shows SECA.
It is a figure which shows that the error output voltage is high when the carrier frequency of M color signal is 4.40 MHz, and becomes low when the carrier frequency is 4.25 MHz. Furthermore, it is also shown that noise is generated at a change point in one horizontal period. As shown in FIG. 2, since the color signal has a different FM carrier frequency for each horizontal period and the frequency changes abruptly,
At the change point of the horizontal period, the output signal of the phase comparator 15 vibrates. In order to prevent this vibration, in the present invention, the line discriminating circuit 19 is used to perform line discrimination (determining which carrier frequency is in each horizontal period) using the low-frequency color signal to determine the oscillation frequency of the oscillator. When offsetting, the error voltage does not change significantly, so it does not take time for different frequencies to oscillate stably. Therefore, a stable oscillation frequency can be obtained. FIG. 2B is a diagram showing how the oscillation frequency changes depending on the error voltage of the phase comparator 15.

Next, FIG. 3 is a diagram showing a concrete configuration example of the line discriminating circuit in the first embodiment of the present invention shown in FIG. In FIG. 3, reference numeral 8 is a detailed view of the inverse bell filter for suppressing the amplitude of the color subcarrier, which has the frequency characteristic as shown in FIG. Reference numeral 19 is a line discriminating circuit 19. 5
2 is an FM detector, and the FM detector 52 is L ₂ , C ₃ ,
It has a tank circuit 53 composed of a parallel resonant circuit of R ₂ . 54 is a phase discriminator, 55 is a sampling circuit, 56
Is an integrating circuit, 57 is a comparator, and 58 is a flip-flop. The line discriminating circuit 19 includes an FM detector 52, a phase discriminator 54, a sampling circuit 55, an integrating circuit 56, a comparator 57, and a flip-flop 58.

The operation of the line discriminating circuit 19 will be described with reference to FIG. The SECAM color signal (a) is input to the inverse bell filter 8 composed of C ₁ and parallel resonant circuits C ₂ , R ₁ and L ₁ to restore the amplitude of the color subcarrier. The output of the inverse bell filter 8 is output to the FM detector 52 of the line discriminating circuit 19.

FIG. 4 is a diagram showing the frequency-gain characteristics of the tank circuit 53. In FIG. 4, f _OB and f _OR are subcarrier frequencies corresponding to unmodulated SECAM color signals D _B and D _R , respectively. 'When, detection characteristics of the tank circuit 53, the center frequency f _O' center frequency f _O of the average values of f _OB and f _OR has an S-curve characteristic detection polarity is reversed at.

FIG. 5 is a diagram showing the detection characteristics of the FM detector 52. FIG. 6 is a diagram showing a signal waveform of each part of the line discriminating circuit in FIG. 3 when the normal SECAM color signal is received and the phase of the flip-flop is correct.

In FIG. 3, when the SECAM signal of FIG. 6A is applied to the FM detector 52, the detection output of FIG. 6B is obtained at the output of the FM detector 52. That is, the detection output in the period f _OR and F _R V _D is positive, the detection output V _D is the period of f _OB and F _B appears in the negative polarity. This output (b) is input to the phase discriminator 54.

On the other hand, the output (h) of the flip-flop 58 is added to the phase discriminator 54, and the FM detector 52
When the output (h) of the flip-flop is added so that the output of the flip-flop is inverted every 1H and the SECAM line sequential changeover switch (not shown) operates correctly, as shown in FIG. The polarities of the signals in the periods of _OB , F _B and D _B are inverted. The output (c) of the phase discriminator 54 is applied to the sampling circuit 55. The terminal 60 is the receiving end of the gate pulse (d), and this gate pulse (d) is applied to the sampling circuit 55. The gate pulse (d) applied to the terminal 60 includes a vertical blanking period (9H period) and a subcarrier period (f _OR and f _OB) corresponding to non-modulation of the color signal inserted in the back porch of the horizontal periodic signal. Period)
The only signal that becomes a logic "1".

The output of the sampling circuit 55 is shown in FIG.
As shown in, the output of the phase discriminator 54 is extracted only during the gate pulse period applied to the terminal 60. The output FIG. 6 (f) of the sampling circuit 55 is input to the integrating circuit 56 and integrated there to obtain a DC voltage V1 shown in FIG. 6 (g). This output V1 is compared by the comparator 57 with the reference voltage Vi applied to the terminal 61. The reference voltage Vi is a reference voltage for resetting the flip-flop 58 when the integration V1 is lower than this. The terminal 65 is a terminal for taking out the voltage i as a result of comparing the integrated voltage V1 and the reference voltage Vi, and this voltage i is applied to the flip-flop 58. The signal i is compared with the integrated voltage V1 and the reference voltage Vi, and when the integrated voltage V1 is lower than the reference voltage Vi,
This is a signal for stopping the operation of the flip-flop. In FIG. 6, a series of operation waveforms is a normal SECA.
This is the case where the M signal is received and the phase of the flip-flop is correct. In this case, the comparator 57
The output voltage i does not appear, and the flip-flop is not affected by the comparator 57.

FIG. 7 is a diagram showing a signal waveform in each part of the line discriminating circuit in FIG. 3 when the normal SECAM signal is received and the phase of the flip-flop is incorrect. 7, (a) and (b) show the input waveform of the SECAM color signal and the output waveform of the FM detector 52, respectively, as in FIG. FIG. 7 (c ') shows the phase discriminator 5 in which the phase of the flip-flop is incorrect.
4 shows the output waveform, and it can be seen that the phase is inverted from that in FIG. Therefore, as the output of the sampling circuit 55, an output (FIG. 7 (f ′)) having a phase opposite to that of FIG. 6 (f) appears.

When this output f'is applied to the integrating circuit 56, the integrated output becomes a voltage V1 ', and this integrated output V1'
Becomes smaller than the reference voltage Vi applied to the terminal 61. In such a state, the output voltage i appears at the output terminal 65 of the comparator 57 and is applied to the flip-flop 58. The output i stops the operation of the flip-flop 58, so that the output of the FM detector 52 (FIG. 7B).
Appears as is as the output of the phase discriminator 54. Therefore, as shown in FIG. 7 (f "), the output of the sampling circuit 55 appears as sampling outputs having different polarities every 1H. This output f" is integrated by the integrating circuit 56 to generate an integrated voltage V1 ". Since the reference voltage Vi is set so that the integrated voltage becomes Vi <V1 ”, the output voltage i does not appear at the output terminal 65 of the comparator 57. Therefore,
The flip-flop starts operation again, and the phase discriminator 54
The above-mentioned operation is repeated until the output of the above becomes the phase of FIG. 6C, and as a result, the phase of the flip-flop is corrected.

This operation will be described in more detail. If the polarity of the flip-flop is wrong, the flip-flop will stop, and as described above, the output of the FM detector 52 (FIG. 7).
(B)) appears as it is as the output of the phase discriminator 54,
As shown in FIG. 7 (f ″), the output of the sampling circuit 55 appears as sampling outputs having different polarities every 1H, and as a result, the output voltage i does not appear at the output terminal 65 of the comparator 57. Then, again, The flip-flop starts to operate, and when it happens that the polarities are correct, this state is held, but if the polarities are wrong, the flip-flop stops, and such operations are repeated until the polarities are correct.

FIG. 8 shows the 4MH in the first embodiment of the present invention.
It is a figure which shows the specific example of the voltage controlled oscillator 16 of z (and the voltage controlled oscillator 17 of 8 MHz). Next, this 4MH
z voltage controlled oscillator 16 (8 MH in the following description)
The operation of changing the central oscillation frequency of the z voltage-controlled oscillator 17 is also described.

FIG. 9 shows the voltage waveform of the common base of Tr2 and Tr3 in FIG. The operation of the 4 MHz voltage controlled oscillator 16 of the present invention will be described with reference to the waveform diagram of FIG. First, in order to facilitate the operation, it is assumed that the voltage of the common base of Tr2 and Tr3 is in a low voltage (low) state like point A. At this time, since no current flows in Tr2, all the current I2 flows in the Tr4 side and there is no voltage drop due to the resistor R3. As a result, the base voltage of Tr3 becomes smaller than the base voltage of Tr4.

At this time, since the base voltage of Tr2 is lower than the base voltage of Tr1, all the current of 2I ₁ flows to the Tr1 side. Therefore, all the current I _{1 from} the constant current source connected to the collector of Tr2 flows into the capacitor C, and the capacitor C is charged by I ₁ . This charge makes Tr
2, the voltage of the common base of Tr3 gradually rises as shown in FIG. 9, and when the charging voltage reaches point B (= the base voltage of Tr4), Tr3 and Tr4 and Tr1 and Tr
The relationship of the base voltage of 2 is reversed, and the capacitor is 2I ₁ −
I ₁ = I ₁ is discharged with a current, and the voltage of the common base of Tr 2 and Tr 3 gradually goes to point C. At this time, the base voltage of Tr4 becomes a voltage indicated by point C due to the voltage drop of R1 × I ₂ . The 4 MHz voltage controlled oscillator 16 repeats the above operation and continues oscillation.

C is the capacitance value, V is the voltage drop of R3 × I ₂ ,
CV = IT when the oscillation frequency of the 4 MHz voltage controlled oscillator 16 is expressed by the formula, where I is the charge / discharge current and T is the time. From this formula

[Equation 1] Is obtained. Therefore, it can be seen that the oscillation frequency of the voltage controlled oscillator 16 changes by changing I ₁ or I ₂ .

FIG. 10 is a diagram showing a specific example circuit for controlling the oscillation frequency by controlling I ₂ of the voltage controlled oscillator 16 of 4 MHz in FIG. This circuit applies voltage Vs to the bases of Tr5 and Tr6,
Supply current to 5. The output signal of the flip-flop 58 in FIG. 3 (signal h in FIG. 6) is applied to the base of Tr7. When the signal h is high, the base of Tr6 becomes low, and the R5 current of Tr6 does not flow, so the current I ₂ is Tr.
The current flows through only R4 of 5. On the other hand, when the signal h is low, a current flows through R4 of Tr5 and R5 of Tr6, and the total current becomes I ₂ . That is, when the output signal h of the flip-flop 58 is high, the current I ₂ becomes a current flowing through R4, and when the signal h of the flip-flop 58 is low, the current I ₂ becomes the sum of the currents flowing through R4 and R5.
The current I ₂ changes depending on whether the signal h is high or low. That is, by increasing the size of R3 × I ₂ , the oscillation frequency of the voltage controlled oscillator 16 of 4 MHz is lowered, and by decreasing the size of R3 × I ₂ , 4
The oscillation frequency of the voltage controlled oscillator 16 of MHz can be increased.

As described above, in FIG. 8, the line discriminating circuit 19 detects that the carrier of FM modulation changes for each horizontal scanning line and recognizes whether it is the frequency of f _OB or the frequency of f _OR. However, the voltage controlled oscillator 16 is configured to output an appropriate frequency.

(Embodiment 2) FIG. 11 is a block diagram showing a second embodiment of the present invention. Although the actual SECAM color signal is an FM signal, there are sections where no carrier exists in the horizontal sync signal section and the vertical sync signal section.

FIG. 12 is a diagram showing the waveform of the composite video signal. FIG. 12A shows the vicinity of the horizontal sync signal of the composite video signal, and FIG. 12B shows the composite sync signal separated from the composite video signal.
(C) is a diagram showing a gate pulse input from the gate pulse generator 20 to the phase comparator 15. In the horizontal and vertical blanking intervals in FIG. 12B, where there is no carrier, noise is also included, and therefore the phase comparator 15 is disturbed, and a wrong control signal is output to the 4 MHz voltage controlled oscillator 16 to control the 4 MHz voltage. The oscillation frequency of the oscillator 16 will be disturbed. Since the error voltage shifts when there is no carrier,
It takes time for the PLL to stabilize when the carrier reappears. Therefore, the PLL is stabilized by forcibly stopping the phase comparator in the section where there is no carrier and separately supplying a constant voltage close to the correct voltage.

Next, the gate pulse generator 20 will be described. FIG. 13 is a diagram illustrating a specific configuration example of the gate pulse generator 20 in the second embodiment of the present invention shown in FIG. The gate pulse generator 20 is a circuit that generates a gate pulse from a composite sync signal. In this circuit, the trailing edge of the composite sync signal is delayed to generate a wide gate pulse. The falling edge of the composite sink is fast because the capacitor C is discharged by the PNP transistor Tr10. Therefore, the leading edge is little delayed. However, since the rising portion charges the capacitor C with a constant current I, the trailing edge is delayed.

FIG. 14 shows the waveform of each part of the circuit of FIG. 14 (a) is an input signal from the composite sync, FIG. 14 (b) is a + input of the comparator 25, and FIG.
Is the output gate pulse of the comparator 25.

The delay amount T at the trailing edge shown in FIG.
From the relationship of CV = IT

[Equation 2] Can be asked.

FIG. 15 is a diagram showing a concrete configuration example of the phase comparator 15 according to the second embodiment of the present invention. In FIG.
The gate pulse generated in FIG. 12 is applied to Tr9, and the gate pulse voltage is applied to Tr8 as a reference voltage V _Th.
When it is low as compared with, all the current flows to the Tr8 side, and the phase comparator 15 does not operate. At that time, the reference voltage Vreff is _RL
Is sent to the 4 MHz voltage controlled oscillator 16 via
The MHz voltage controlled oscillator 16 keeps stable oscillation. That is, during the period of the gate pulse shown in FIG. 12C, the phase comparator 15 stops operating, and the reference voltage in the phase comparator 15, Vr _eff, is a voltage controlled oscillator 16 of 4 MHz.
The 4 MHz voltage controlled oscillator 16 keeps stable oscillation.

(Third Embodiment) FIG. 16 shows a third embodiment of the present invention.
It is a figure which shows the PLL circuit of. In the third embodiment of the present invention, an 8 MHz voltage controlled oscillator 17 having an oscillation frequency which is eight times the frequency of the input SECAM color signal is used.
A reproduction color signal is obtained by dividing the frequency by 1/2. By doing so, the second-order distortion component of the reproduced color signal can be reduced, and as a result, the band pass filter of 4 MHz can be widened, so that the delay due to the band pass filter is reduced, and further, the SECAM color signal reproduction processing device. Will be cheaper.

In FIG. 16, the voltage controlled oscillator 17 has an oscillation frequency (about 8 MHz) which is eight times as high as the low frequency SECAM color signal. The phase comparator 15, the 8 MHz voltage controlled oscillator 17, the 1/2 frequency divider 18 and the 1/4 frequency divider 3 form a PLL circuit.

FIG. 17 shows a waveform chart of each part of FIG.
FIG. 17A shows the output of the voltage controlled oscillator 17 of 8 MHz, and such a waveform contains second-order distortion. FIG. 17
It can be seen that (b) shows a ½ frequency division output, that is, a quadruple output of a low frequency output, but the secondary distortion is eliminated. That is, the duty of the signal obtained by dividing the frequency of the voltage-controlled oscillator 17 of 8 MHz by 1/2 is 50%. FIG. 17
(C) is an output obtained by dividing the output of the 1/2 frequency divider 18 by 1/4, that is, a frequency of about 1 MHz which is the same as the low frequency frequency.

The PLL circuit of the third embodiment shown in FIG.
The oscillation frequency of the voltage controlled oscillator 17 of MHz is low frequency SE
Since it is 8 times the CAM color frequency, a 1/2 frequency divider is required, but the SEAM color signal divided by 1/2 has less second-order distortion, and as a result, a 4 MHz bandpass filter is used. Since the band can be widened, the delay due to the bandpass filter is reduced, and the SECAM color signal reproduction processing device becomes inexpensive.

(Fourth Embodiment) FIG. 18 shows a fourth embodiment of the present invention.
It is a figure which shows the PLL circuit of. This fourth embodiment is similar to the second embodiment.
This embodiment is a combination of the third embodiment and the above embodiment.
In the fourth embodiment of the present invention, the second-order distortion component of the oscillation frequency can be reduced by setting the oscillation frequency of the voltage controlled oscillator 17 to 8 times the input SECAM color signal as in the case of the third embodiment. The delay due to the bandpass filter is reduced, and the SECAM color signal reproduction processing device becomes inexpensive. Furthermore, in Example 4, Example 2
By forcibly stopping the operation of the phase comparator 15 in the composite sync section (section in which no carrier exists) using the gate pulse generator 20 used in the above,
L can be stabilized. As a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

In FIG. 18, the voltage controlled oscillator 17 has an oscillation frequency which is eight times as high as the low frequency SECAM color signal. Phase comparator 15, 8 MHz voltage controlled oscillator 1
The 7, 1/2 frequency divider 18 and the 1/4 frequency divider 3 form a PLL circuit. In addition, FIG. 18 includes a gate pulse generator 20 controlled by a composite sync.

The operation of the SECAM color signal reproduction processing device shown in FIG. 18 is the same as the operation shown in FIG. The gate pulse generator 20 is configured as shown in FIG. 13, and a signal obtained by expanding the pulse width of the composite sync signal is output to the phase comparator 15 as a gate pulse output. The phase comparator 15 stops its operation while the gate pulse is low, and the reference voltage Veff is sent to the voltage controlled oscillator 17 of 8 MHz, so that the voltage controlled oscillator 17 of 8 MHz can continue stable operation.

The PLL circuit of the fourth embodiment of FIG. 18 requires a 1/2 frequency divider because the oscillation frequency of the voltage controlled oscillator 17 is 8 times the low frequency SECAM color signal frequency.
However, the SECAM color signal divided by 1/2 is 2
The secondary distortion is small, and as a result, the band pass filter of 4 MHz can be used in a wide band, so that the delay due to the band pass filter is reduced, and further, the SECAM color signal reproduction processing device becomes inexpensive.

(Fifth Embodiment) FIG. 19 shows a fifth embodiment of the present invention.
It is a figure which shows the PLL circuit of. This fifth embodiment is the first
This embodiment is a combination of the third embodiment and the above embodiment.
In the fifth embodiment of the present invention, as in the third embodiment, the oscillation frequency of the voltage controlled oscillator 17 is set to 8 SECAM color signals.
By doubling, the second-order distortion component of the oscillation frequency can be reduced, which reduces the delay due to the bandpass filter, and further, the SECAM color signal reproduction processing device becomes inexpensive. Further, in the fifth embodiment, by using the line discrimination circuit 19 used in the first embodiment, 8 MH
The z voltage controlled oscillator 17 can maintain stable oscillation.

In FIG. 19, the voltage controlled oscillator 17 has an oscillation frequency which is eight times as high as the low frequency SECAM color signal. Phase comparator 15, 8 MHz voltage controlled oscillator 1
The 7, 1/2 frequency divider 18 and the 1/4 frequency divider 3 form a PLL circuit. Further, FIG. 19 includes a line discriminating circuit 19 which is signaled by a SECAM color signal.

The operation of the SECAM color signal reproduction processing device of FIG. 19 is the same as the operation of FIG. The line discriminating circuit 19 is configured as shown in FIG. 3, performs line discrimination (determines which carrier frequency is in each horizontal period) using a low frequency color signal, and uses the flip-flop 58 shown in FIG. Generated signal (Fig. 6
(H) signal) is applied to the 8 MHz voltage controlled oscillator 17. As described in the first embodiment, the oscillation frequency is controlled by controlling I ₂ of the 8 MHz voltage controlled oscillator 17 in FIG. 8 by the signal h.

The PLL circuit of the fifth embodiment of FIG. 19 requires a 1/2 frequency divider since the oscillation frequency of the voltage controlled oscillator 17 is 8 times the frequency of the low frequency SECAM color signal. However, since the signal is divided by 1/2 and the signal does not include second-order distortion, the bandpass filter 12 of 4 MHz is directly used.
Can be supplied to. Therefore, the SECAM color signal generated by oscillating at a high frequency of 8 times and dividing the frequency by ½ has less second-order distortion, and as a result, the bandpass filter of 4 MHz can be used in a wide band, and the delay due to the bandpass filter is small. In addition, the SECAM color signal reproduction processing device becomes inexpensive. Further, since the line discriminating circuit 19 is used, when the signal h is low, the oscillation frequency of the oscillator is offset so that different frequencies can be oscillated even with substantially the same error voltage, and as a result, stable oscillation of the voltage controlled oscillator is achieved. The frequency is obtained.

(Sixth Embodiment) FIG. 20 shows a sixth embodiment of the present invention.
It is a figure which shows the PLL circuit of. This sixth embodiment is the first
This embodiment is a combination of the above embodiment and the second embodiment.
In the sixth embodiment of the present invention, as in the third embodiment,
Input the oscillation frequency of the voltage controlled oscillator 16 of MHz SEC
By making the frequency of the AM color signal four times, the output S
The ECAM color signal has less secondary distortion. As a result, 4
In order to make the band pass filter of MHz wide band,
The delay due to the bandpass filter is reduced, and further,
The SECAM color signal reproduction processing device becomes inexpensive. further,
In the sixth embodiment, by using the line discrimination circuit 19 used in the first embodiment, the 4 MHz voltage controlled oscillator 16 can maintain stable oscillation.

In FIG. 20, the voltage controlled oscillator 16 has an oscillation frequency four times as high as that of the low frequency color signal. The phase comparator 15, the 4 MHz voltage controlled oscillator 16, and the 1/4 frequency divider 3 constitute a PLL circuit. Further, FIG.
Line discrimination circuit 19 which is signaled by an ECAM color signal
including.

Since the basic operation of the SECAM color signal reproduction processing device of FIG. 20 is the same as the operation of the third embodiment of FIG. 16, its details are omitted. The line discriminating circuit 19 is configured as shown in FIG. 3, performs line discrimination (determines which carrier frequency is in each horizontal period) using a low frequency color signal, and uses the flip-flop 58 shown in FIG. The generated signal (signal (h) in FIG. 6) is applied to the 4 MHz voltage controlled oscillator 16. As described in the first embodiment, the signal h causes the 4 MHz voltage controlled oscillator 1 in FIG.
By controlling I ₂ of 6, the oscillation frequency is controlled.

On the other hand, the gate pulse generator 20 is constructed as shown in FIG. 13, and a signal in which the pulse width of the composite sync signal is widened is output to the phase comparator 15 as a gate pulse output. The phase comparator 15 stops its operation while the gate pulse is low, and the reference voltage Veff is 4 MH.
to the voltage controlled oscillator 16 of z, thereby
The Hz voltage controlled oscillator 16 can continue stable operation.

Further, since the line discriminating circuit 19 is used, when the signal h is low, the oscillation frequency of the oscillator is offset so that different frequencies can be oscillated even with substantially the same error voltage, resulting in stable voltage control. The oscillation frequency of the oscillator is obtained. Further, in the sixth embodiment, by using the gate pulse generator 20 used in the second embodiment, the operation of the phase comparator 15 is forcibly stopped in the composite sync section (section in which no carrier exists),
It is also possible to stabilize the PLL. As a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

(Seventh Embodiment) FIG. 21 shows a seventh embodiment of the present invention.
It is a figure which shows the PLL circuit of. This seventh embodiment is the first
This embodiment is a combination of the second embodiment and the third embodiment. In a seventh embodiment of the invention,
Similarly to the third embodiment, the oscillation frequency of the voltage controlled oscillator 17 is S
Oscillation is performed at a high frequency that is eight times the frequency of the ECAM color signal.
The SECAM color signal obtained by dividing the frequency by 1/2 has little second-order distortion, and as a result, the bandpass filter of 4 MHz can be used in a wide band, so that the delay due to the bandpass filter is reduced, and further the SECAM color signal reproduction processing is performed. The device becomes cheaper.

Furthermore, in the seventh embodiment, by using the line discrimination circuit 19 used in the first embodiment, 8M
The voltage controlled oscillator 17 of Hz can maintain stable oscillation. Furthermore, in the seventh embodiment, the gate pulse generator 20 used in the second embodiment is used, and the phase comparator 15 is used in the composite sync section (section where no carrier exists).
The PLL can be stabilized by forcibly stopping the operation of. As a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

In FIG. 21, the 8 MHz voltage controlled oscillator 17 has an oscillation frequency which is eight times as high as the low frequency SECAM color signal. The phase comparator 15, the 4 MHz voltage controlled oscillator 16, the 1/2 frequency divider 18 and the 1/4 frequency divider 3 form a PLL circuit. Further, FIG. 21 shows SECAM.
It includes a line discrimination circuit 19 and a gate pulse generator 20 which are signaled by a color signal.

Since the basic operation of FIG. 21 is the same as the operation of the third embodiment of FIG. 16, its details are omitted. The line discriminating circuit 19 is configured as shown in FIG.
The line discrimination (which carrier frequency each horizontal period is discriminated) is performed using the AM color signal, and the signal generated by the flip-flop 58 shown in FIG. 3 ((h) in FIG. 6).
Signal) to the voltage controlled oscillator 17 of 8 MHz. The oscillation frequency is controlled by controlling I2 of the voltage-controlled oscillator 17 of 8 MHz in FIG. 8 by the signal h as described in the first embodiment.

On the other hand, the gate pulse generator 20 is constructed as shown in FIG. 13, and a signal in which the pulse width of the composite sync signal is widened is output to the phase comparator 15 as a gate pulse output. The phase comparator 15 stops its operation while the gate pulse is low, and the reference voltage Veff is 8 MH.
to the voltage controlled oscillator 17 of z, thereby
The Hz voltage controlled oscillator 16 can continue stable operation.

The PLL circuit of the seventh embodiment of FIG. 21 requires a 1/2 frequency divider because the oscillation frequency of the voltage controlled oscillator 17 is 8 times the frequency of the low frequency SECAM color signal. Since the output SECAM chrominance signal divided by ½ does not include the second-order distortion, as a result, the bandpass filter of 4 MHz can be widebanded, the delay due to the bandpass filter is reduced, and the SECA is further reduced.
The M color signal reproduction processing device becomes inexpensive. Further, since the line discriminating circuit 19 is used, when the signal h is low, the oscillation frequency of the oscillator is offset so that different frequencies can be oscillated even with substantially the same error voltage, and as a result, stable oscillation of the voltage controlled oscillator is achieved. The frequency is obtained.

Further, by using the gate pulse generator 20 used in the second embodiment, the operation of the phase comparator 15 is forcibly stopped in the composite sync section (section in which no carrier exists) to stabilize the PLL. You can also As a result, SECAM that is not affected by noise
A color signal reproduction processing device is obtained.

[0083]

According to the present invention, a voltage-controlled oscillator is used to directly oscillate four times the frequency of the input SECAM color signal, so that the output SECAM color signal has less second-order distortion. As a result, since the band pass filter of 4 MHz can be used for a wide band, the delay due to the band pass filter is reduced, and the SECAM color signal reproduction processing device becomes inexpensive. Further, by providing the line discrimination circuit, the error voltage does not change for each horizontal scanning line,
That is, it is possible to obtain a stable PLL circuit in which the frequency does not change at the switching point of the horizontal scanning line.

Further, in the present invention, the phase comparator, the voltage controlled oscillator that oscillates a frequency four times as high as the input SECAM color signal, and the 1/4 frequency divider constitute a PLL, and the reproduced output is directly output from the voltage controlled oscillator. Obtainable. In addition, by adding the gate output from the gate pulse generator to the phase comparator, the phase comparator is forcibly stopped in the section where there is no carrier, and a constant voltage is separately supplied to obtain a stable PLL circuit. To be

Further, in the present invention, the oscillation frequency of the voltage controlled oscillator 17 is oscillated at a high frequency which is eight times the frequency of the SECAM color signal. SE that divides the frequency by 1/2
The CAM color signal has less second-order distortion, resulting in 4 MHz
Since the band pass filter of can be wide band, the delay due to the band pass filter can be reduced, and further, the SEC
The AM color signal reproduction processing device becomes inexpensive. Further, since the line discrimination circuit 19 is used, when the signal h is low,
The oscillation frequency of the oscillator is offset so that different frequencies can be oscillated even with almost the same error voltage, and as a result, a stable oscillation frequency of the voltage controlled oscillator can be obtained.

In the present invention, and in the present invention, the oscillation frequency of the voltage controlled oscillator 17 is set to SECA.
Oscillation is performed at a high frequency that is eight times the frequency of the M color signal. The SECAM color signal obtained by dividing the frequency by 1/2 has little second-order distortion, and as a result, the bandpass filter of 4 MHz can be used in a wide band, so that the delay due to the bandpass filter is reduced, and further the SECAM color signal reproduction processing is performed. The device becomes cheaper. Furthermore, by using the gate pulse generator to forcibly stop the operation of the phase comparator in the composite sync section (section where no carrier exists),
It is possible to stabilize LL. As a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

Further, in the present invention, and in the present invention, the oscillation frequency of the voltage controlled oscillator 17 is set to SECA.
Oscillation is performed at a high frequency that is eight times the frequency of the M color signal. The SECAM color signal obtained by dividing the frequency by 1/2 has little second-order distortion, and as a result, the bandpass filter of 4 MHz can be used in a wide band, so that the delay due to the bandpass filter is reduced, and further the SECAM color signal reproduction processing is performed. The device becomes cheaper. Further, by using the line discriminating circuit, the voltage controlled oscillator can maintain stable oscillation.

Further, in the present invention, the second-order distortion of the output SECAM color signal is reduced by making the oscillation frequency of the voltage controlled oscillator four times the frequency of the input SECAM color signal. As a result, since the band pass filter of 4 MHz can be used for a wide band, the delay due to the band pass filter is reduced, and the SECAM color signal reproduction processing device becomes inexpensive. Further, by using the line discriminating circuit, the voltage controlled oscillator can maintain stable oscillation.

Further, in the present invention, and in the present invention, the oscillation frequency of the voltage controlled oscillator is oscillated at a high frequency that is eight times the frequency of the SECAM color signal. The SECAM color signal obtained by dividing the frequency by 1/2 has little second-order distortion, and as a result, the bandpass filter of 4 MHz can be used in a wide band, so that the delay due to the bandpass filter is reduced, and further the SECAM color signal reproduction processing is performed. The device becomes cheaper. Further, by using the line discriminating circuit, the voltage controlled oscillator can maintain stable oscillation. Further, by using the gate pulse generator to forcibly stop the operation of the phase comparator in the composite sync section (section where no carrier exists), the PLL can be stabilized. As a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

Further, in the present invention, the line discriminating circuit can control the oscillation frequency of the voltage controlled oscillator by applying different line discriminating outputs to the voltage controlled oscillator depending on two different carrier frequencies in the SECAM color signal. it can.

Further, in the present invention, the line discrimination output of the line discriminating circuit changes the current value of the voltage controlled oscillator, and the oscillation frequency of the voltage controlled oscillator can be controlled by which one.

Further, in the present invention, the gate pulse generator can generate a gate pulse wider than the composite sync signal. By this gate pulse, the PLL can be stabilized by forcibly stopping the operation of the phase comparator in the composite sync section (section where no carrier exists). Further, as a result, a SECAM color signal reproduction processing device that is not affected by noise can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a first embodiment of the present invention.

FIG. 2 is a diagram showing an error output signal of the phase comparator 15 in one horizontal period.

FIG. 3 is a diagram showing a line discriminating circuit according to a first embodiment of the present invention.

4 is a diagram showing a gain-frequency characteristic of the tank circuit 53 shown in FIG.

5 is a diagram showing the detection characteristics of the FM detector 52 shown in FIG.

6 is a diagram showing signal waveforms of respective parts of the line discriminating circuit in FIG. 3 when a normal SECAM signal is received and a phase of a flip-flop is correct.

7 is a diagram showing a signal waveform in each part of the line discriminating circuit in FIG. 3 when a normal SECAM color signal is received and a flip-flop has an incorrect phase.

FIG. 8 is a diagram showing specific examples of the 4 MHz voltage controlled oscillator 16 and the 8 MHz voltage controlled oscillator 17 in the first embodiment of the present invention.

9 is a diagram showing a voltage waveform of a common base of Tr2 and Tr3 in FIG.

10 is a diagram showing a specific circuit for controlling I2 of the voltage controlled oscillator shown in FIG.

FIG. 11 is a diagram showing a block diagram of a second exemplary embodiment of the present invention.

FIG. 12 is a diagram showing a waveform of a composite video signal.

FIG. 13 is a diagram illustrating a specific configuration example of the gate pulse generator 20 in the second embodiment of the present invention shown in FIG.

FIG. 14 is a diagram showing waveforms at various parts of the circuit of FIG.

FIG. 15 is a diagram showing a specific configuration example of a phase comparator 15 according to a second embodiment of the present invention.

FIG. 16 is a diagram showing a block diagram of a third exemplary embodiment of the present invention.

FIG. 17 is a diagram showing a waveform chart of each part of FIG. 16;

FIG. 18 is a diagram showing a block diagram of a fourth exemplary embodiment of the present invention.

FIG. 19 is a diagram showing a block diagram of a fifth exemplary embodiment of the present invention.

FIG. 20 is a diagram showing a block diagram of a sixth exemplary embodiment of the present invention.

FIG. 21 is a diagram showing a block diagram of a seventh exemplary embodiment of the present invention.

FIG. 22 is a diagram showing a process of SECAM color signal recording processing in the conventional VHS system.

FIG. 23 is a diagram showing a conventional SECAM color signal reproduction processing process.

FIG. 24 is a diagram showing a gain-frequency characteristic of a conventional bell filter.

FIG. 25 is a diagram showing a conventional doubler circuit.

FIG. 26 is a diagram showing a waveform of each part of FIG. 25.

FIG. 27: Conventional SECA for multiplying color signals by 4 at once
It is a figure which shows the structural example of a M color signal reproduction processing circuit.

[Explanation of symbols]

 3 1/4 divider 4 1MHz · BPF 6 head 7 head amplifier 8 inverse bell filter 9 first doubler 10 2MHz · BPF 11 second doubler 12 4MHz · BPF 13 bell filter 15 phase comparator 16 Voltage controlled oscillator 18 1/2 divider 19 Line discrimination circuit 20 Gate pulse generator 21 Differential amplifier 22 Rectifier 25 Comparator 52 FM detector 53 Tank circuit 54 Phase discriminator 55 Sampling circuit 56 Integrator circuit 57 Comparator 58 Flip-floor 60 Gate terminal 61 Reference terminal 65 Output terminal

Claims (10)

[Claims] 1. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
A phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from a voltage-controlled oscillator having a quadruple frequency described below by 1/4, and an output signal from the phase comparator,
A voltage-controlled oscillator that is controlled to oscillate at a frequency four times that of the M-color signal, a 1/4 divider that divides the frequency of the voltage-controlled oscillator by 1/4, and a SECAM color signal And a line discriminating circuit for outputting a line discriminating voltage corresponding to the carrier frequency to the voltage controlled oscillator according to the detected carrier frequency, and a reproduction input SECAM color signal SECA characterized by outputting a multiplied signal
M color signal reproduction processing device. 2. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
A phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from a voltage-controlled oscillator having a quadruple frequency described below by 1/4, and an output signal from the phase comparator,
A voltage controlled oscillator that is controlled to oscillate at a frequency four times as high as the M color signal, a quarter divider that divides the frequency of the voltage controlled oscillator into quarters, and a composite obtained from the SECAM luminance signal. And a gate pulse generator for generating a gate pulse according to a sync signal, and outputs a signal obtained by multiplying a reproduction input SECAM color signal by 4 via the voltage controlled oscillator.
M color signal reproduction processing device. 3. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
An input SECA is provided by a phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from the voltage-controlled oscillator of 8 times frequency described later by 1/8, and an output signal from the phase comparator.
A voltage-controlled oscillator that is controlled to oscillate a frequency eight times as high as the M color signal; a 1/2 frequency divider that divides the frequency of the voltage controlled oscillator by 1/2; and a 1/2 frequency divider. Output frequency divided by 1/4
And a frequency divider, and outputs a signal obtained by multiplying a reproduction input SECAM color signal by 4 through the 1/2 frequency divider.
Color signal reproduction processing device. 4. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
An input SECA is provided by a phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from the voltage-controlled oscillator of 8 times frequency described later by 1/8, and an output signal from the phase comparator.
A voltage-controlled oscillator that is controlled to oscillate a frequency eight times as high as the M color signal; a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2; and a 1/2 divider. Output frequency divided by 1/4
A frequency divider and a gate pulse generator for generating a gate pulse by a composite sync signal obtained from the SECAM luminance signal, and a signal obtained by multiplying a reproduction input SECAM color signal by 4 via the 1/2 frequency divider. SECAM characterized by outputting
Color signal reproduction processing device. 5. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
An input SECA is provided by a phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from the voltage-controlled oscillator of 8 times frequency described later by 1/8, and an output signal from the phase comparator.
A voltage-controlled oscillator that is controlled to oscillate a frequency eight times as high as the M color signal; a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2; and a 1/2 divider. A 1/4 frequency divider that divides the frequency by 1/4 and two different carrier frequencies of the SECAM color signal are detected by the SECAM color signal, and the line discrimination voltage corresponding to the carrier frequency is output to the voltage controlled oscillator. And a line discriminating circuit for outputting a signal obtained by multiplying a reproduction input SECAM color signal by 4 through the 1/2 frequency divider.
Color signal reproduction processing device. 6. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
A phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from a voltage-controlled oscillator having a quadruple frequency described below by 1/4, and an output signal from the phase comparator,
A voltage-controlled oscillator that is controlled to oscillate at a frequency four times that of the M-color signal, a 1/4 divider that divides the frequency of the voltage-controlled oscillator by 1/4, and a SECAM color signal , A line discriminating circuit which outputs a line discriminating voltage corresponding to the carrier frequency to the voltage controlled oscillator, and a gate which generates a gate pulse by a composite sync signal obtained from the SECAM color signal. And a pulse generator, which outputs a signal obtained by multiplying a reproduction input SECAM color signal by 4 through the voltage controlled oscillator.
M color signal reproduction processing device. 7. A bandpass filter, an inverse bell filter,
In a SECAM color signal reproduction processing device which has a bell filter and reproduces a SECAM color signal: Input SECA
An input SECA is provided by a phase comparator that compares the M color signal with a signal obtained by dividing the oscillation frequency from the voltage-controlled oscillator of 8 times frequency described later by 1/8, and an output signal from the phase comparator.
A voltage-controlled oscillator that is controlled to oscillate a frequency eight times as high as the M color signal; a 1/2 divider that divides the frequency of the voltage-controlled oscillator by 1/2; and a 1/2 divider. Output frequency divided by 1/4
The frequency divider and the SECAM color signal detect two carrier frequencies of the SECAM color signal, and the line discrimination circuit that outputs the line discrimination voltage according to the carrier frequency to the voltage controlled oscillator is obtained from the SECAM luminance signal. And a gate pulse generator that generates a gate pulse according to the composite composite sync signal, and outputs a signal obtained by multiplying the reproduction input SECAM color signal by 4 through the 1/2 frequency divider.
Color signal reproduction processing device. 8. The SE according to claim 1, 5, 6, or 7.
In the CAM color signal reproduction processing device: the line discriminating circuit includes an FM detector, a phase discriminator, a sampling circuit, an integrating circuit, a comparator and a flip-flop.
A SECAM color signal reproduction processing device, characterized in that different line discrimination outputs are added to a voltage controlled oscillator according to two different carrier frequencies in the SECAM color signal to control the oscillation frequency of the voltage controlled oscillator. 9. The SECAM color signal reproduction processing apparatus according to claim 8, wherein the line discrimination output from the line discrimination circuit controls the oscillation frequency of the voltage controlled oscillator by changing the constant current value of the voltage controlled oscillator. A SECAM color signal reproduction processing device characterized by the above. 10. The SE according to claim 1, 4, 6 or 7.
In the CAM color signal reproduction processing device: the gate pulse generator discharges the input composite sync signal at a high speed using a transistor and a capacitor at a falling portion and charges a capacitor at a constant current with a constant current at a rising portion, A SECAM color signal reproduction processing apparatus, characterized in that a signal whose trailing edge is delayed is generated and a gate pulse having a wide width is generated by a delay time of this trailing edge.