JPH08212137A - Access frequency detector - Google Patents

Abstract

PURPOSE: To provide access frequency more exactly reflecting access conditions at a present time point by calculating the access frequency while including not only the number of times of access requests but also data showing how close the first access time is to the present time point within unit time. CONSTITUTION: A data discriminating circuit 12 discriminates data for calculating the number of times of access and the time of first reference within the unit time for each data. A first access time point detecting circuit 13 is composed of time counters 131-133 and holds a clock signal at the time point, when the access request is first generated within the unit time, for each data. An access request number detecting circuit 14 is composed of number counters 141-143, counts a signal showing the generation of access requests by data while using any counter corresponding to the data and gets the number of times of access generated within the unit time. Based on the time count value and the number of times of access provided like this way, an access frequency calculating circuit 15 calculates the access frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an access frequency detecting device for grasping the status of access to data,
In particular, it is suitable for use in a disk cache device of an electronic computer system having a disk device.

[0002]

2. Description of the Related Art A disk cache device uses a memory having a relatively small capacity that can be accessed at a higher speed than the disk device, and retains a copy of the data in the disk device. By accessing the disk cache device before accessing the disk device and fetching or writing the data from the cache device without accessing the disk if the requested data is available, the access speed is effectively increased. To do. The memory of the disk cache is high-speed, but its capacity is limited, so various measures have been taken to efficiently use this high-speed memory. For example, for the data held in the memory of the disk cache, paying attention to the recent access frequency, the frequently used data is left, and the unused data is replaced with the newly accessed data. It is normal to increase the hit rate, which is the probability that the is in the disk cache device, to make the access efficient. An access frequency detection device is required to obtain the access frequency.

Further, for example, in the disk cache device disclosed in Japanese Patent Laid-Open No. 3-63741, access frequency detecting means is provided, and the access frequency detecting means is required to read / write to the disk device for a predetermined time. Each time, the number of times is counted, the number of accesses to the disk device and the read ratio are calculated, and based on the result, the amount used as the disk cache of the cache memory of the disk cache device is automatically adjusted,
By allocating a portion not used as a disk cache as a part of the main memory, the disk cache device can be effectively used.

Further, for example, in the disk cache device disclosed in Japanese Patent Laid-Open No. 2-36446, an access frequency detecting circuit for detecting the number of times access is requested per unit time concentrates accesses to a specific logical volume. Even if it decreases, the cache memory can be used effectively by automatically adjusting it, such as increasing the set of cache memory allocated to the logical volume or stopping the allocation of cache memory. I try not to reduce the hit rate.

[0005]

In the conventional disk cache device that adjusts the amount of disk cache based on the number of references and the read ratio in the unit time, the number of references is low within the predetermined time. However, there is a risk that the cache block that holds the data that is likely to be referenced at the next predetermined time will not be used. Further, in the conventional cache device that increases or decreases the cache memory allocated to the logical volume based on the number of times access is requested per unit time, the access frequency is detected only based on the number of times access requests are made within a certain period of time. Therefore, the cache hit rate may not increase.

In the conventional access frequency detecting apparatus as described above, the access frequency which may change from moment to moment is obtained from the number of accesses in the past (recent) fixed time, and the obtained access frequency is The cache memory is allocated with the expectation that it will be the same even during the following fixed time. However, even though the access situation actually changes momentarily within a certain period of time during which the number of accesses is detected, the detected access frequency does not reflect changes in the access within the certain period of time. Therefore, in the conventional technique, the detected access frequency does not always accurately predict the access frequency actually performed thereafter.

The present invention aims to solve the above-mentioned problems of the conventional techniques. That is, the present invention aims to obtain an access frequency that more accurately reflects the current access situation.

[0008]

According to the present invention, there is provided a first means for counting the number of data access requests for each predetermined unit time, and a time point when an access request is first made within the unit time. Based on the number of access requests obtained by the first means and time information detected by the second means,
An access frequency detecting device including a third means for calculating an access frequency.

[0009]

The number of access requests to the data is calculated for each unit time, and the time when the first access request is made within the unit time is detected. The access frequency is calculated based on the access request and the information at the time of the first access request.

[0010]

FIG. 1 is a diagram showing the configuration of an access frequency detecting apparatus according to an embodiment of the present invention. This access frequency detecting device identifies, for example, the same address signal from the register 11 that holds an address signal sent to the disk cache device as an access request to the disk device, and the address signal input from the register 11 to identify the same address signal. A data identification circuit 12 that outputs a signal indicating that there is a request, an initial access time point detection circuit 13 that detects the time point when the access request data is the first access request within a unit time, and each data Further, it is provided with an access request number detection circuit 14 for detecting the number of access requests, and an access frequency calculation circuit 15 for calculating the access frequency from the output of the first access time point detection circuit 13 and the output of the access request number detection circuit 14. Further, the first access time point detection circuit 13 has a plurality of time counters 131 for each data, which are activated by a signal that arrives first and stopped at the end of the unit time after being reset by a reset signal generated every predetermined unit time, 132, 133. The access request frequency detection circuit 14 counts the number of signals for each data, which counts a signal output from the data identification circuit 12 indicating that an access has occurred for each predetermined unit time.
1, 142, 143.

FIG. 2 is a diagram for explaining the operation of the access frequency detecting device of FIG. In the example of FIG. 2, the points of occurrence of the access-requested data a to g are represented by inverted triangle symbols in a predetermined unit time t0 to t14.
The time of the first occurrence within the unit time is shown in black, and the access frequency of each data within the unit time and the access frequency calculated by the access frequency calculation circuit 15 are also shown.

The data discrimination circuit 12 discriminates the data for each data a to g in order to obtain the number of times of access and the time of the first reference within the unit time. The first access time detection circuit 13 includes a plurality of time counters a,
The data identifying circuit 12 holds the clock signal for each data at the time of the first access request within the unit time. For example, in the example of FIG.
At time t0, data b at time t1, data c at time t11, the first access request is generated, and the respective times are held in the time holding circuits a, b, and c, and then the access frequency calculation circuit 15 Is passed to.

The access request frequency detection circuit 14 comprises a plurality of counters a, b, c, ...
A signal indicating the generation of an access request for each data is counted by a counter corresponding to the data, and the number of accesses generated in a unit time is obtained. That is, the access request for the data a is counted by the counter a, the number of occurrences within the unit time is 4, the access request for the data b is counted by the counter b, the number of occurrences within the unit time is 2, and the data c is obtained. The access request is counted by the counter c, and the number of times of occurrence within the unit time is 1, so that the number of times of access is detected for each data.

The access frequency calculation circuit 15 calculates the access frequency by the following calculation based on the time count value output from the first access time point detection circuit 13 and the access frequency output from the data-specific access frequency detection circuit 14. Access frequency = access count / time count value

In the example of the access status to the data a to g shown in FIG. 2, if the access frequency is obtained only based on the number of accesses as in the conventional case, the data c is considered to have a low access frequency. However, actually, in the next unit time, the probability that the data c is accessed is higher than that of the data f. That is, according to the present embodiment, it is possible to increase the access frequency of data that is likely to be used within the next unit time, and even if the same request count is used, it is possible to use the data b, d, and f recently. It can be quantified, including elements such as whether it is used.

The access frequency detection device of the present invention can be used for a data processing device that refers to the access frequency, and is particularly useful for a data processing device that requires more accurate grasp of the access frequency at the present time. Is. For example, Japanese Patent Application Laid-Open No. 2-3 mentioned above in the section of the prior art.
It is suitable as an access frequency detection circuit for a disk cache device as described in Japanese Patent No. 6446 and Japanese Patent Laid-Open No. 3-63741.

[0017]

As described above in detail, in the prior art,
The number of access requests in a recent unit time is calculated, and this is regarded as the current access frequency. Since this only detects the number of access requests within the unit time,
It is not possible to capture the temporal changes in the access situation that occurred within a unit time. Therefore, if there is a temporal change in the access situation even within the unit time, the obtained access frequency is not accurate. The present invention calculates the access frequency including not only the number of access requests but also the data of how close the time of the first access within the unit time is to the current time, so that the current access status can be grasped more accurately. The access frequency can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram for explaining the operation of the embodiment.

[Explanation of symbols]

11 ... Register, 12 ... Data identification circuit, 13 ... First access time detection circuit, 14 ... Data-specific access frequency detection circuit, 15 ... Access frequency calculation circuit.

Claims (1)

[Claims] 1. A first means for counting, for each data, the number of access requests of data for which access is requested within a unit time; and a time point when the first access request is made within the unit time for each data. The second means for detecting, and the third means for calculating the access frequency based on the number of access requests obtained by the first means and the time information detected by the second means. Access frequency detector