JPH08204001A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] A method of manufacturing a semiconductor device in which a plug is embedded in a contact hole of an interlayer insulating film, and to reduce defects such as plug loss, trenching, or seam when forming the plug. It is possible to provide a method for manufacturing a semiconductor device, which can improve the integration density, reliability, electric resistance, and surface flatness. [Structure] An interlayer insulating film 32 is formed on the surface of the lower conductive layer 30, a contact hole 36 is formed in the interlayer insulating film 32, an embedded plug 40 is formed in the contact hole 36, and the embedded plug 40 is interposed therebetween. And improve the method for manufacturing a semiconductor device, which connects the upper conductive layer and the lower conductive layer 30 formed on the interlayer insulating film. An oxygen permeation blocking layer 38 containing nitrogen is formed on the surface of the interlayer insulating film 32, and thereafter,
The embedded plug 40 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to improvement of a method of manufacturing a semiconductor device of a type in which a plug is embedded in a contact hole of an interlayer insulating film.

[0002]

2. Description of the Related Art Semiconductor devices, especially LSI, VLSI, and U
In the wiring structure of an integrated circuit IC such as an LSI, an interlayer insulating film (including a surface insulating layer) formed on a lower conductive layer (including an element region formed on a semiconductor substrate, a lower layer wiring, an electrode, etc.) A multilayer wiring structure is employed in which a contact hole is formed, and an upper conductive layer (including an upper layer wiring, an electrode, etc.) formed on an interlayer insulating film electrically contacts the lower conductive layer through the contact hole. There is.

In such a multi-layer wiring structure, the design rule of the semiconductor device has been reduced with the increase in speed and integration of semiconductor devices, and the opening diameter of contact holes has been reduced accordingly. On the other hand, the film thickness of the interlayer insulating film needs to be a certain amount or more due to restrictions such as capacitance between wirings.

Therefore, the ratio of the depth of the contact hole to the opening diameter (aspect ratio) increases, and the coverage of the material forming the upper conductive layer decreases accordingly. For example, as shown in FIG. 3, an interlayer insulating film 4 is formed on the surface of the semiconductor substrate 2, a contact hole 6 having a high aspect ratio is formed in the interlayer insulating film 4, and the contact hole 6 is formed.
When the aluminum wiring layer 10 is embedded together with the Ti underlayer 8 in the above, the coverage of the aluminum wiring layer 10 is reduced. As a result, the reliability of the connection at the contact portion is reduced, which in turn reduces the reliability of the semiconductor device.

Therefore, as shown in FIG. 4, a plug 14 made of a metal material such as tungsten is buried in the contact hole 6, and the aluminum wiring layer 18 and the semiconductor substrate 2 are connected via the plug 14. The method is being developed. In this method, the upper wiring (aluminum wiring layer) in the contact hole 6 having a high aspect ratio is used.
It is very useful as an assistive technology for coverage. In FIG. 4, reference numeral 12 indicates an adhesion layer composed of Ti and TiN, and reference numeral 16 indicates a barrier metal layer composed of Ti or the like.

The manufacturing process of the plug 14 shown in FIG.
It will be described with reference to FIG. As shown in FIG. 5A, after a semiconductor element is formed on the surface of a semiconductor substrate 2 made of a single crystal silicon substrate, an interlayer insulating film 4 made of silicon oxide or the like is formed on the surface by CVD or the like. Form a film. Next, contact holes 6 are formed in the interlayer insulating film 4 in a predetermined pattern. Next, as shown in FIG. 5B, an adhesion layer 12 is formed on the surface of the interlayer insulating film 4 by a sputtering method or CVD so as to enter the contact hole 6 of the interlayer insulating film 4. The adhesion layer 12 is made of Ti and T
It is composed of a laminated film with iN.

Next, as shown in FIG. 5C, the adhesion layer 1
A metal layer 14a to be a plug is formed on the surface of 2 by a sputtering method or a CVD method. The metal layer 14a is made of tungsten. After that, the entire surface of the metal layer 14a is etched by dry etching such as RIE. The etching is performed until the surface of the interlayer insulating film 4 is exposed. As a result, the plug 14 remains in the contact hole 6.

[0008]

However, in the conventional manufacturing process, when the metal layer 14a is entirely etched, the metal material in the contact hole is also etched. As shown in FIG. , Trenching 22 and seams 20 occur. The plug loss 24 is a depression of the top of the plug 14 with respect to the surface of the interlayer insulating film 4, the trenching 22 is a depression with respect to the top of the plug formed at the upper edge of the adhesion layer 12, and the seam 20 is of the plug 14. It is a recess formed in the approximate center of the top.

When the plug loss 24 occurs in the plug 14, as shown in FIG. 7, the upper wiring layer 18 composed of an aluminum wiring layer or the like formed on the plug 14 is formed.
A recess 26 is formed in the groove 26, which hinders the flatness of the film formed thereon. Also, trenching 22 or seam 2
There was a possibility that a so-called "nest" (void) was generated in the portion corresponding to 0.

Further, an interlayer insulating film is further laminated on the upper wiring layer 18, and when a pattern such as a contact hole is formed in the interlayer insulating film, for example, the upper wiring layer 1
If the pattern is located directly above the recess 26 of 8,
Halation occurs due to misalignment. As a result, the shape of the contact hole and the like after the upper wiring layer 18 is not stable, and the coverage of the wiring material in this contact hole is reduced. At the same time, this also reduces the reliability of the semiconductor device.

Therefore, when forming a pattern in the interlayer insulating film on and after the upper wiring layer 18, it is necessary to limit the pattern such that it is not directly above the recess 26 formed in the upper wiring layer 18. At the same time, this impairs the degree of freedom of the pattern in the upper wiring layer 18 and subsequent layers, which has been an obstacle to increasing the degree of integration of the semiconductor device.

The present invention has been made in view of the above circumstances, and relates to a method of manufacturing a semiconductor device of a type in which a plug is embedded in a contact hole of an interlayer insulating film, and in forming a plug, plug loss, trenching, or a seam. It is an object of the present invention to provide a method for manufacturing a semiconductor device which can reduce problems such as the above, and can improve the integration density, reliability, electric resistance, surface flatness, and the like.

[0013]

In order to achieve the above object, in a method of manufacturing a semiconductor device according to the present invention, an interlayer insulating film is formed on the surface of a lower conductive layer, and a contact hole is formed in the interlayer insulating film. A method for manufacturing a semiconductor device, comprising forming a buried plug in the contact hole, and connecting the upper conductive layer and the lower conductive layer formed on the interlayer insulating film through the buried plug. An oxygen permeation blocking layer is formed on the surface of the interlayer insulating film, and then the embedded plug is formed.

It is preferable that the oxygen permeation blocking layer is a nitrogen-rich insulating layer, and the nitrogen-rich insulating layer is formed by plasma-treating the surface of the interlayer insulating film with a gas containing nitrogen. The oxygen permeation blocking layer is a nitrogen-rich insulating layer, the nitrogen-rich insulating layer,
It can also be formed by ion-implanting nitrogen into the surface of the interlayer insulating film.

The oxygen permeation blocking layer is preferably composed of a silicon-based insulating film containing at least 10% of nitrogen in the film. The oxygen permeation blocking layer is formed before or after a contact hole is formed in the interlayer insulating film.

It is preferable that the oxygen permeation blocking layer also functions as an antireflection film when performing photolithography on the interlayer insulating film. The plug is composed of, for example, a single layer of tungsten or a laminated film of two or more kinds containing tungsten.

It is preferable that the laminated film of two or more kinds containing tungsten is a two-layer film of titanium nitride and tungsten in order from the bottom, or a three-layer film of titanium, titanium nitride and tungsten in order from the bottom.

[0018]

In the method of manufacturing a semiconductor device according to the present invention, a nitrogen-rich oxygen is formed on the surface of the interlayer insulating film where the contact hole is formed, for example, a silicon-based insulating film containing at least 10% of nitrogen in the film. A transparent element layer is formed. For this reason, a contact hole is formed in this interlayer insulating film, a conductive layer to be a plug is formed so as to enter the contact hole, and the conductive layer is etched back to form a plug. Release of oxygen from the surface of the film can be suppressed.

Conventionally, the surface of the interlayer insulating film is exposed at the time of the etching back process for forming the plug, and oxygen is supplied from this surface. Due to the oxygen, the etching rate of the conductive layer rapidly increases. As a result, plug loss,
Trenching and seams were occurring.

In the present invention, as described above, the supply of oxygen from the surface of the interlayer insulating film is suppressed, the rapid increase in the etching rate due to the presence of oxygen is suppressed, and defects such as plug loss, trenching, and seams occur. Suppressed. As a result, the connection resistance between the upper conductive layer and the lower conductive layer through the plug can be reduced, and the reliability thereof is improved. In addition, since the plug loss is reduced, no depression is formed on the surface of the upper conductive layer formed on the interlayer insulating film and the plug, and the flatness of the surface is improved. If the flatness of the surface is improved, the flatness of the interlayer insulating film formed on the upper conductive layer is also improved, and when forming a pattern such as a contact hole on the upper conductive layer, halation does not occur and it is good. Such a pattern can be formed, which in turn contributes to the improvement of the degree of integration of the semiconductor device.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to the present invention will be described in detail below with reference to the embodiments shown in the drawings. FIG.
FIGS. 2A to 2D are cross-sectional views of essential parts showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2A to 2D show a semiconductor device according to another embodiment of the present invention. It is a principal part sectional view which shows a manufacturing method.

First Embodiment In the embodiment shown in FIG. 1, an impurity diffusion layer (lower conductive layer) formed on the surface of a semiconductor substrate, and an upper conductive layer formed thereon via an interlayer insulating film are provided. Is a method for manufacturing a semiconductor device having a wiring structure for electrically connecting the wiring through a plug in a contact hole formed in an interlayer insulating film. In this embodiment, the metal material forming the plug is Ti (titanium), TiN (titanium nitride),
It has a three-layer film structure of W (tungsten). However, in the following examples, the laminated film of Ti and TiN is referred to as an adhesion layer 38, and W is referred to as a plug. As the metal material forming the plug, a two-layer film structure of TiN and W, or titanium silicide, titanium tungsten, titanium oxynitride, titanium formed by sputtering, or the like can be used instead of TiN.

In the embodiment shown in FIG. 1, as shown in FIG. 1A, after an element such as a MOS transistor is formed on the surface of a semiconductor substrate 30 composed of a single crystal silicon substrate or the like, interlayer insulation is performed. The film 32 is formed. Interlayer insulation film 32
Is made of, for example, silicon oxide and is formed by a CVD method or the like.

Next, in the present embodiment, the surface of the interlayer insulating film 32 is subjected to plasma treatment using ammonia gas to nitride the surface of the insulating film 32, thereby insulating the surface of the insulating film 32 with nitrogen-rich insulation. Oxygen permeation blocking layer 3 composed of a film
4 is formed. The plasma treatment for forming the nitrogen-rich oxygen permeation blocking layer 34 uses a parallel plate type RIE apparatus, for example, the substrate temperature is 650 ° C., NH ₃ and N ₂ are 80 sccm respectively as process gas,
It is supplied at a flow rate of 2000 sccm, and is performed for 30 seconds under the conditions of a radio frequency (RF) power of 500 W and a pressure of 650 Pa.

The interlayer insulating film 3 surface-nitrided in this way
2 is coated with a resist and patterned, and thereafter, as shown in FIG. 1B, a contact hole 36 is formed by anisotropic etching. This contact hole 36
The dry etching for forming the film is performed by using, for example, CF ₄ , CHF ₃ and Ar as etching gas, respectively.
It is supplied at a flow rate of sccm, 25 sccm, and 80 sccm, and reactive ion etching is performed under the conditions of a radio frequency (RF) power of 400 W, a magnetic flux of 6 mT and a pressure of 17 Pa.

Next, as shown in FIG. 1C, the interlayer insulating film 32 is inserted into the contact hole 36.
An adhesion layer 38 for the plug is formed on the surface of the. The adhesion layer 38 is made of, for example, titanium (Ti) and titanium nitride (Ti).
N) and a laminated film (Ti / TiN). To form the adhesion layer 36 of Ti / TiN, first, a Ti film is formed. For the Ti film, for example, the substrate temperature is 200 ° C., Ar is supplied at 100 sccm, and the pressure is 0.5 Pa.
A film having a film thickness of 60 nm is formed by sputtering under the condition that the sputtering power is DC 2 kW. Next, a TiN film is formed on the Ti film by sputtering at a substrate temperature of 200 ° C., N ₂ of 100 sccm, a pressure of 1 Pa, and a sputtering power of DC 6 kW to form a film thickness of 70 nm.

Next, the semiconductor substrate 30 after forming the adhesion layer 38 is subjected to RTA (Rapid Thermal Anneal) processing under the conditions of a substrate temperature of 650 ° C. and a heating time of 30 seconds. Then, on the adhesion layer 38, a conductive layer 40a to be a plug is formed.
To form a film. The conductive layer 40a is made of a metal such as tungsten. Conductive layer 40a made of tungsten
For example, the substrate temperature is set to 420 ° C.
WF ₆ , H ₂ , and Ar are added at 40 sccm and 400, respectively.
Supply at sccm, 2250sccm, pressure 10.66
A 600 nm-thickness film is formed by kPa CVD.

After the conductive layer 40a is formed so as to fill the contact hole 36 in this manner, the entire surface of the conductive layer 40a is etched back by anisotropic etching, as shown in FIG. , Contact hole 3
Leave plug 40 in 6. The plug 40 is formed by continuously performing the first to third etchings with a dry etching device that controls the plasma generation source and the ion energy directed to the semiconductor device.

First, the remaining film thickness is obtained by the first etching.
Up to 200 nm, made of tungsten, for example
The conductive layer 40a thus formed is entirely etched. This tab
The etching for removing the tungsten film is performed, for example,
SF as an etching gas ₆ , Ar is 11
Supply at 0sccm and 90sccm, radio frequency (RF) power
275W, pressure 46.55kPa RIE (reactivity
Ion etching). During this etching
Is He as a cleaning gas, for example, 5 scc
m from the back surface of the semiconductor substrate.

Next, by a second etching, the tungsten film is entirely etched up to the interface of the adhesion layer 38 with the TiN film. This tungsten film etching is
For example, as etching gas, SF ₆ and Ar are supplied at 40 sccm and 20 sccm, respectively, and RIE is performed under the conditions of RF power of 100 W and pressure of 30 kPa.
During this etching, He is used as a cleaning gas.
Is supplied from the back surface of the semiconductor substrate at, for example, 10 sccm.

Next, the adhesion layer 3 is formed by the third etching.
The TiN film and the Ti film forming 8 are entirely etched up to the interface with the interlayer insulating film 32. The etching for removing the adhesion layer 38 is performed, for example, by using Cl ₂ and Ar as an etching gas at 5 sccm and 75 sc, respectively.
cm, RF power 250 W, pressure 7 kPa,
It is performed by dry etching in which sputter etching is dominant. While performing this third etching, FIG.
As shown in (D), the surface of the interlayer insulating film 34 is exposed.

Conventionally, the surface of the interlayer insulating film is exposed, oxygen is supplied from this surface, and the etching rate of the conductive layer rapidly increases under the influence of this oxygen. As a result, plug loss, trenching, seams, etc. occurred. In the present embodiment, the presence of the oxygen permeation blocking layer 34 formed on the surface of the interlayer insulating film 32 suppresses the supply of oxygen from the surface of the interlayer insulating film 32 and etches tungsten, Ti or TiN due to the presence of oxygen. A rapid increase in the rate is suppressed, and defects such as plug loss, trenching, and seams are suppressed. As a result, the connection resistance between the upper conductive layer and the lower conductive layer (impurity diffusion layer in this embodiment) through the plug can be reduced, and the reliability is improved. Further, since the plug loss is reduced, no dent or the like is formed on the surface of the upper conductive layer formed on the interlayer insulating film 34 and the plug 40, and the flatness of the surface is improved. If the flatness of the surface is improved, the flatness of the interlayer insulating film formed on the upper conductive layer is also improved, and when forming a pattern such as a contact hole on the upper conductive layer, halation does not occur and it is good. Such a pattern can be formed, which in turn contributes to the improvement of the degree of integration of the semiconductor device.

FIG. 1A shows a modification of the first embodiment.
The oxygen permeation blocking layer 34 shown in can be formed by the nitrogen ion implantation method on the surface of the interlayer insulating film 32. The ion implantation conditions at that time are not particularly limited, but nitrogen is used as an impurity to be implanted, preferably 10 to ²⁰ KeV, and a dose amount of 1.0 × 10 ^{15 to} 1.0.
The condition is × 10 ¹⁶ / cm ² .

The ion implantation may be performed after the contact hole 36 is formed as shown in FIG. 1B. In that case, it is preferable to perform the nitrogen ion implantation by oblique ion implantation. . This is because by performing the oblique ion implantation, the nitrogen-rich oxygen permeation blocking layer 34 is formed not only on the surface portion but also on the side wall portion 35 of the contact hole 36, and moreover, the surface of the semiconductor substrate 30 is not ion-implanted. The side wall portion 35 also has an oxygen permeation blocking layer 34.
The formation of is also preferable because the supply of oxygen from that portion is suppressed.

Second Embodiment Next, a second embodiment of the present invention will be described. This second
The embodiment is different from the first embodiment only in the step shown in FIG. 2A, and other configurations are the same as those of the first embodiment.
Since this is the same as the embodiment, part of the description of the common part is omitted.

In this embodiment, after an interlayer insulating film 32 made of a silicon oxide film or the like is formed on an element region such as a MOS transistor formed on the surface of the semiconductor substrate 30, a film is formed on the surface. A nitrogen-rich insulating film containing at least 10% or more nitrogen therein, such as silicon oxynitride (S
i _x O _y N _z ) film, etc.
Is formed on the entire surface.

For the silicon oxynitride film forming the oxygen permeation blocking film 42, a parallel plate type plasma CVD apparatus is used.
For example, the substrate temperature is set to 360 ° C., SiH ₄ , N ₂ O
At a flow rate of 50 sccm and 25 sccm, respectively, and a film thickness of about 20 nm is formed under the conditions of a high frequency (RF) power of 190 W and a pressure of 325 Pa. Under these conditions, Si _x O _y containing at least 10% of nitrogen in the film
An N _z film can be formed.

In this way, after the oxygen permeation blocking film 42 is formed on the surface of the interlayer insulating film 32, the contact hole 36 is formed as shown in FIG. 2B, and thereafter, the contact hole 36 is formed. As shown in (C) and (D), the plug 40 is formed by the same process as that of the embodiment shown in FIG.

Also in this embodiment, as in the first embodiment, the oxygen permeation blocking film 42 formed on the surface of the interlayer insulating film 32 prevents the supply of oxygen from the surface of the interlayer insulating film 32. And tungsten due to the presence of oxygen, T
The rapid increase in the etching rate of i or TiN is suppressed,
The occurrence of defects such as plug loss, trenching, and seams is suppressed. As a result, the connection resistance between the upper conductive layer and the lower conductive layer (impurity diffusion layer in this embodiment) through the plug can be reduced, and the reliability is improved. Also, since the plug loss is reduced, the interlayer insulating film 3
4 is not formed on the surface of the upper conductive layer formed on the plug 4 and the plug 40, and the flatness of the surface is improved. If the flatness of the surface is improved, the flatness of the interlayer insulating film formed on the upper conductive layer is also improved, and when forming a pattern such as a contact hole on the upper conductive layer, halation does not occur and it is good. Such a pattern can be formed, which in turn contributes to the improvement of the degree of integration of the semiconductor device.

As a modification of the second embodiment, the oxidation permeation preventive film 42 is also used as an anti-reflection film at the time of photolithography for patterning the interlayer insulating film 32 such as a contact hole Si _x O _y N _z. The film may be made of Si _x N _y , and its film thickness and optical constants may be determined so as to minimize the standing wave effect in the resist film depending on the type of the underlying film. The antireflection film is made of, for example, Si _X O _Y N.
_Z or Si _X N _Y , SiH ₄ , N ₂ O,
A film is formed using N ₂ , NH ₃ or the like by, for example, a CVD method or a reactive sputtering method, or a plasma CVD method such as ECR plasma CVD or bias ECR plasma CVD.

Since these antireflection films contain nitrogen, they can be used as the oxygen permeation prevention film in the present invention. In particular, Si _x O _y N _z has a wavelength of 248 n by changing the film forming conditions (especially the flow rate ratio of SiH ₄ ).
The optical constants n (real part of refractive index) and k (imaginary part of refractive index) at m or other wavelengths can be greatly changed. Therefore, it can be preferably used as an optimum antireflection film by changing the optical constant and the film thickness according to the type of the base film.

The present invention is not limited to the above-mentioned embodiments, but can be variously modified within the scope of the present invention.

[0043]

As described above, according to the present invention, since the oxygen permeation blocking layer is formed on the surface of the interlayer insulating film, when the plug is formed in the contact hole of the interlayer insulating film. The supply of oxygen from the surface of the interlayer insulating film is suppressed, the rapid increase of the etching rate due to the presence of oxygen is suppressed, and the occurrence of defects such as plug loss, trenching, and seam is suppressed. As a result, the connection resistance between the upper conductive layer and the lower conductive layer through the plug can be reduced, and the reliability thereof is improved. In addition, since the plug loss is reduced, no depression is formed on the surface of the upper conductive layer formed on the interlayer insulating film and the plug, and the flatness of the surface is improved. If the flatness of the surface is improved, the flatness of the interlayer insulating film formed on the upper conductive layer is also improved, and when forming a pattern such as a contact hole on the upper conductive layer, halation does not occur and it is good. Such a pattern can be formed, which in turn contributes to the improvement of the degree of integration of the semiconductor device.

[Brief description of drawings]

FIG. 1A to FIG. 1D are cross-sectional views of essential parts showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIGS. 2A to 2D are cross-sectional views of essential parts showing a method of manufacturing a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a sectional view of an essential part of a contact hole showing an example of poor coverage.

FIG. 4 is a cross-sectional view of an essential part showing a contact hole portion using a plug.

5A to 5D are cross-sectional views of a main part showing a process of forming a plug according to a conventional example.

FIG. 6 is a cross-sectional view of essential parts showing a problem of the plug.

FIG. 7 is a cross-sectional view of essential parts showing a problem of the plug.

[Explanation of symbols]

 30 ... Semiconductor substrate 32 ... Interlayer insulating film 34 ... Oxygen permeation blocking layer 36 ... Contact hole 38 ... Adhesion layer 40 ... Plug 40a ... Plug forming conductive layer 42 ... Oxygen permeation blocking film

Claims (8)

[Claims] 1. An interlayer insulating film is formed on the surface of the lower conductive layer,
A contact hole is formed in the interlayer insulating film, an embedded plug is formed in the contact hole, and the upper conductive layer and the lower conductive layer formed on the interlayer insulating film are connected via the embedded plug. A method of manufacturing a semiconductor device, comprising forming an oxygen permeation blocking layer on a surface of the interlayer insulating film, and then forming the embedded plug. 2. The oxygen permeation blocking layer is a nitrogen-rich insulating layer, and the nitrogen-rich insulating layer is formed by subjecting the surface of the interlayer insulating film to plasma treatment using a gas containing nitrogen. The method for manufacturing a semiconductor device according to claim 1. 3. The oxygen-rich permeation blocking layer is a nitrogen-rich insulating layer, and the nitrogen-rich insulating layer is formed by ion-implanting nitrogen into the surface of the interlayer insulating film. A method for manufacturing a semiconductor device as described above. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the oxygen permeation blocking layer is composed of a silicon-based insulating film containing at least 10% of nitrogen in the film. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the oxygen permeation blocking layer is formed before or after a contact hole is formed in the interlayer insulating film. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the oxygen permeation blocking layer also functions as an antireflection film when performing photolithography processing on the interlayer insulating film. 7. The method of manufacturing a semiconductor device according to claim 1, wherein the plug is formed of a single layer of tungsten or a laminated film of two or more kinds containing tungsten. 8. The stacked film of two or more kinds containing tungsten is a two-layer film of titanium nitride and tungsten in order from the bottom, or a three-layer film of titanium, titanium nitride and tungsten in order from bottom. Of manufacturing a semiconductor device of.