JPH08162534A - Semiconductor integrated circuit device, manufacturing method thereof, and manufacturing apparatus used therefor - Google Patents

Abstract

(57) [Summary] [Object] To provide a semiconductor integrated circuit device having a wiring layer having high reliability and excellent electrical characteristics, and a manufacturing method and a manufacturing device capable of easily manufacturing the same. [Structure] Each chamber that can be depressurized, that is, a load lock chamber 2, a pretreatment chamber 3, a sputtering chamber 4, a sputtering chamber 5 and a gas phase reaction chamber 6, is connected to each of them through a gate valve 8. By using the manufacturing apparatus 1 having the transfer chamber 7 which is a mechanism for loading and unloading the wafer 9 into and out of each chamber as needed, a semiconductor integrated circuit device that requires particularly fine processing is used. It is manufactured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, a method of manufacturing the same, and a manufacturing apparatus used therefor, and particularly to a semiconductor integrated circuit device having a multilayer wiring layer having high reliability and excellent electrical characteristics. It is related to effective technology.

[0002]

2. Description of the Related Art Recently, in semiconductor integrated circuit devices,
Along with the improvement of the degree of integration, miniaturization of semiconductor elements and wiring layers and multilayer wiring structure with multilayer wiring layers are being advanced.

Further, with the miniaturization and multi-layering of wiring layers, a connection formed in the interlayer insulating film for electrically connecting a semiconductor element and a wiring layer or a lower wiring layer and an upper wiring layer. It is required to improve the electrical characteristics and reliability of the electrical connection in the region of the hole and suppress the increase in the number of steps for forming the electrical connection.

Here, as a technique for burying a conductive film as a wiring layer in a connection hole formed in an insulating film such as an interlayer insulating film on a wafer such as a semiconductor substrate on which a semiconductor element is formed, for example, a blanket is used. Tungsten CVD
(Chemical Vapor Deposition) method. The outline is as follows.

That is, a connection hole is formed in an insulating film on a wafer, and the contact hole exposes a part of a contact electrode of a semiconductor element in the lower layer of the insulating film or a lead layer or lower wiring layer made of polysilicon or the like. To do.

After that, the wafer is set in a sputtering apparatus, and, for example, a tungsten (W) film is formed on the wafer including the inside of the connection hole by the sputtering method. this is,
Adhesion of the tungsten film formed by the subsequent CVD method on the insulating film is ensured, and the contact electrode or the lower layer film of the semiconductor element exposed at the bottom surface of the connection hole is formed by CVD.
It has a function as a barrier layer for preventing damage due to contact with the reaction gas in the step of forming the tungsten film by the method.

Next, the wafer is introduced into a CVD apparatus, and the wafer is housed in an atmosphere of a mixed gas of, for example, tungsten hexafluoride (WF ₆ ) gas and a predetermined reaction gas, and is placed on the wafer including the inside of the connection hole. The work of growing the tungsten film and filling the contact holes thereby is performed.

Documents describing the technique for forming a wiring layer in a semiconductor integrated circuit device include, for example, Press Journal Co., Ltd., issued November 2, 1989,
"'90 latest semiconductor process technology" p267-p273
Are listed in.

[0009]

However, the present inventor has found that the above-mentioned technique for forming a wiring layer has various problems as described below.

(1) When the barrier layer against the gas during the formation of the CVD film is formed in the connection hole by the sputtering method, there arises a problem due to the low step coverage of the bottom surface of the connection hole.

That is, in the sputtering method, the step coverage in the fine and high aspect ratio contact hole becomes low due to the film formation principle, and the film thickness of the sputtering film at the bottom surface of the contact hole becomes insufficient. The gas during the formation of the gas permeates through the sputtering film and reacts with the wiring material such as silicon (Si) or aluminum (Al) alloy in the lower layer to increase the junction leak current or increase the contact resistance. There is a problem that it does.

(2) In order to improve the problem of the above (1), when a manufacturing apparatus for increasing the directivity of particles sputtered between a target and a wafer is used, fine and high aspect ratio connection is achieved. Although the film thickness of the sputtering film on the bottom surface of the hole increases, the film thickness on the side surface of the connection hole, especially on the lower part thereof, becomes insufficient, and the gas during the formation of the CVD film permeates the inside of the sputtering film from this portion and For example, there is a problem that the wiring material such as silicon or aluminum alloy in the wafer reaches and reacts with it.

(3) When the tungsten film is embedded in the connection hole by the blanket tungsten CVD method, there is a problem that the contact resistance with the lower layer film is largely changed depending on the film forming condition.

That is, since the thickness of the sputtered film inside the connection hole is not sufficient, the gas reaches the lower layer film and reacts with it when the CVD film is formed to increase the contact resistance, but this contact resistance increases. Is largely dependent on the conditions under which the CVD film is formed, and for example, the higher the partial pressure of the tungsten hexafluoride gas during film formation, the greater the increase in contact resistance.

(4) When a cleaning process for removing the tungsten deposited in the reaction chamber of the CVD apparatus is also used by a plasma etching method using, for example, nitrogen fluoride (NF) gas, the film is formed at the initial stage of forming the CVD film. There is a problem that a time delay occurs before the start.

That is, although it is possible to obtain the effect of removing the tungsten film that is deposited in the reaction chamber of the CVD apparatus and becomes a foreign matter source, sufficient consideration has not been given to the initial process of growth of the tungsten film. The surface of the wafer is contaminated by the by-product generated during cleaning, which causes a problem that a time delay occurs before the start of film formation.

(5) For example, since the sputtering is performed by the sputtering apparatus and the CVD film is formed by the CVD apparatus, it is necessary to perform each by a different manufacturing apparatus. Therefore, a single-wafer manufacturing apparatus is used. In this case, it takes a long time to form these films because it is necessary to vacuum the wafer, take out the wafer, and repeat the transfer between the manufacturing apparatuses to form the superposed film of the sputtering film and the CVD film on the wafer. There is a problem that it takes money.

An object of the present invention is to provide a semiconductor integrated circuit device having a wiring layer having high reliability and excellent electric characteristics.

Another object of the present invention is to provide a manufacturing method capable of easily manufacturing a semiconductor integrated circuit device having a wiring layer having high reliability and excellent electric characteristics.

Still another object of the present invention is to provide a manufacturing apparatus capable of efficiently manufacturing a semiconductor integrated circuit device having a multilayer wiring layer having high reliability and excellent electrical characteristics.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0022]

The typical ones of the inventions disclosed in the present invention will be outlined below.

(1) In the semiconductor integrated circuit device of the present invention, the insulating film provided on the semiconductor substrate on which the semiconductor element is provided, and the connection hole and the connection provided in the selective region of the insulating film. A semiconductor integrated circuit device having a wiring layer made of a plurality of conductive films provided on a surface of an insulating film near a hole, wherein at least one conductive film of the plurality of conductive films forming the wiring layer is provided. The film thickness in the connection hole is larger than the film thickness on the surface of the insulating film in the vicinity of the connection hole.

(2) In the method for manufacturing a semiconductor integrated circuit device of the present invention, a step of forming an insulating film on a semiconductor substrate on which a semiconductor element is formed, and a connection hole is formed in a selective region of the insulating film. A step, a step of forming a first conductive film on the surfaces of the insulating film and the contact hole, and a heat treatment step of performing a heat treatment in a gas atmosphere or a plasma treatment on the first conductive film formed on the semiconductor substrate. A step of performing any one of the plasma treatment steps and a step of forming the second conductive film on the semiconductor substrate on which the first conductive film is formed, the step of forming the second conductive film in the connection hole; And a step of forming the second conductive film so as to have a thickness larger than that of the surface of the insulating film in the vicinity of the connection hole. The step of forming the second conductive film includes a reducing agent containing a metal halide and silicon. Gas or Genus halides and the by chemical vapor deposition using hydrogen gas as the reducing gas second
This is a step of forming a conductive film.

(3) In the method of manufacturing a semiconductor integrated circuit device of the present invention, the step of forming the first conductive film in the method of manufacturing a semiconductor integrated circuit device described in (2) above,
A sputtering method with the semiconductor substrate cooled, a sputtering method with the semiconductor substrate kept at a high temperature, and a structure for controlling the directivity of sputtered particles between the semiconductor substrate and the target material This is a step of forming the first conductive film by a sputtering method using a manufacturing apparatus or a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas.

(4) A semiconductor integrated circuit device manufacturing apparatus according to the present invention comprises a load lock chamber, a pretreatment chamber for pretreating a wafer, a sputtering chamber for performing a sputtering process on a wafer, and a vapor phase growth for a wafer. A manufacturing apparatus of a semiconductor integrated circuit device having a gas phase reaction chamber for performing a process, which is a mechanism unit connected to each of the chambers through a gate valve to load or unload a wafer as needed. A load chamber, which is a mechanism for introducing the wafer into a manufacturing apparatus and carrying out the wafer after a series of processes is carried out to the outside of the manufacturing apparatus. A vacuum pump capable of reducing the pressure is connected, and a vacuum pump capable of reducing the pressure inside is connected to the transfer chamber.

(5) In the semiconductor integrated circuit device manufacturing apparatus of the present invention, the gas phase reaction chamber can perform at least one of heat treatment or plasma treatment under a reduced pressure atmosphere of gas as necessary. It can have a structure.

(6) In the apparatus for manufacturing a semiconductor integrated circuit device of the present invention, the gas phase reaction chamber has a peep window for observing the inside of the chamber on a side surface inside the chamber, and the peek window has a view window facing the chamber. The side to be covered may be covered with a transparent film made of a material having a high corrosion resistance to a halogen-based gas.

[0029]

[Action]

(1) According to the semiconductor integrated circuit device of the present invention described above,
A semiconductor integrated circuit device having a connection hole provided in an insulating film and a wiring layer made of a plurality of conductive films provided on the surface of the insulating film in the vicinity of the connection hole, which constitutes the wiring layer. Since the film thickness of at least one conductive film of the plurality of conductive films in the connection hole is larger than the film thickness of the surface of the insulating film in the vicinity of the connection hole, the wiring layer can be completely embedded in the connection hole. Therefore, the reliability of the electrical connection of the wiring layer in the region of the connection hole is enhanced and the electrical characteristics are excellent.

The film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in the connection hole is
Since the insulating film is thicker than the surface of the insulating film near the connection hole, the semiconductor exposed on the bottom surface of the connection hole when the conductive film is formed by, for example, the CVD method after the manufacturing process of the conductive film. Since the contact electrode of the element or the conductive film in the lower layer can have a function as a barrier film for preventing damage from being exposed to the reaction gas used in the CVD method, the wiring layer in the region of the connection hole and the wiring layer The reliability of the electrical connection with the contact electrode of the lower semiconductor element or the lower conductive film is improved and the electrical characteristics are excellent.

Further, the film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in the connection hole is larger than the film thickness of the surface of the insulating film in the vicinity of the connection hole. As a result, even if the resistance value of the conductive film is relatively high, the film thickness of the conductive film provided on the surface of the insulating film can be reduced, so that the conductive film in the connection hole and as the wiring layer is formed. Even in the case of simultaneously forming and, it is possible to suppress an increase in combined resistance value in a state where a plurality of conductive films are laminated in the wiring layer.

(2) According to the method of manufacturing a semiconductor integrated circuit device of the present invention described above, the step of forming the first conductive film on the surfaces of the insulating film and the contact hole, and the step of forming the first conductive film on the semiconductor substrate. By having one of the heat treatment step of performing heat treatment on the conductive film of 1 in a gas atmosphere or the plasma treatment step of performing plasma treatment,
Impurity atoms and molecules adsorbed on the surface of the first conductive film as a base adhesion film can be removed from the second conductive film to expose the clean surface.

Further, it is possible to remove the impurity atoms and molecules adsorbed on the surface of the first conductive film and form dangling bonds to activate the surface of the first conductive film.

Further, the surface-altered layer formed by reacting the surface of the first conductive film with the substance in the atmosphere can be removed, or the first state in the original state where the surface-altered layer is not formed can be removed. It can be returned to the conductive film.

Further, the first conductive film is reacted with the underlying material of a conductor such as a semiconductor element or an underlayer film,
For example, if tungsten on silicon, a new reaction layer such as tungsten silicide can be formed at the interface.

(3) According to the method of manufacturing a semiconductor integrated circuit device of the present invention described above, the step of forming the first conductive film includes a sputtering method in a state in which the semiconductor substrate is cooled,
Sputtering method in a state where the semiconductor substrate is kept at a high temperature, sputtering method by a manufacturing apparatus provided with a structure for controlling the directivity of sputtered particles between the semiconductor substrate and the target material, metal halide or organic By using the step of forming the first conductive film by the chemical vapor deposition method using a metal and a reducing gas, the gas used for the CVD film for forming the second conductive film after that is the first conductive film. As a result, it can be prevented from penetrating through the sputtered film and reacting with the underlying wiring material such as silicon or aluminum alloy.

That is, by performing sputtering in a state in which the semiconductor substrate is cooled, the crystal growth of target particles incident on the semiconductor substrate on the semiconductor substrate is prevented, and the agglomeration of crystal grains accompanying the crystal growth of the particles is prevented. Prevent,
It is possible to prevent a gap from being opened between the crystal grains.

Further, by performing sputtering in a state where the semiconductor substrate is kept at a high temperature, the target particles incident on the semiconductor substrate are reacted with the semiconductor element or the lower layer film below the target particle on the semiconductor substrate, for example, With tungsten on silicon, a new reaction layer such as tungsten silicide can be formed at the interface.

Further, in addition to the above-mentioned cooled state of the semiconductor substrate, a sputtering method by a manufacturing apparatus is provided in which a structure for controlling the directivity of sputtered particles is provided between the target material and the semiconductor substrate. It is possible to deposit the first conductive film having a necessary and sufficient thickness in the entire inside of the connection hole.

In addition, a step of forming a first conductive film such as a titanium nitride film by a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas is adopted to obtain a fine high aspect ratio. It becomes possible to deposit the first conductive film having a sufficient thickness in the connection hole.

(4) According to the above-described manufacturing apparatus of the present invention, the transfer chamber is connected to each chamber through the gate valve, and the transfer chamber is a mechanism for loading and unloading the wafer as needed. The transfer chamber is connected to a vacuum pump capable of reducing the pressure inside the load chamber, and the load lock chamber is connected to a vacuum pump capable of reducing the pressure inside the load chamber. Process of forming the second conductive film on the surface of the first conductive film in the vapor phase reaction chamber after forming the conductive film of the above, and in a depressurized state when loading or unloading the wafer into or from each chamber. Since it can be performed without exposing to the atmosphere, impurities can be prevented from being adsorbed on the surface of the first conductive film before the formation of the second conductive film.

Further, the interfaces between different kinds of conductive films such as the first conductive film and the second conductive film can be prevented from reacting nonuniformly under the influence of oxygen or nitrogen contained in the atmosphere.

(5) According to the above-described manufacturing apparatus of the present invention, in the manufacturing apparatus described in (4) above, the vapor phase reaction chamber is required for heat treatment or plasma treatment under a reduced pressure atmosphere of gas. Depending on the structure, it is possible to perform at least one treatment depending on the conditions, for example, 1 torr to 500 torr containing 10% or more of hydrogen.
By performing the heat treatment in a reduced pressure atmosphere of 1, the impurity atoms and molecules adsorbed on the surface of the first conductive film as the base adhesion film are removed by the thermal motion of the gas molecules under reduced pressure to expose a clean surface. be able to.

Further, for example, when the first conductive film as the underlying adhesion film is tungsten, it becomes possible to dissociate and adsorb hydrogen on the surface and grain boundaries, and the tungsten oxide formed on the bottom surface of the connection hole is replaced with hydrogen. By doing so, it becomes possible to reduce and return it to tungsten, and thus it becomes possible to reduce the oxidation-altered layer on the surface of the first conductive film.

Further, by heat-treating a rare gas such as helium or argon in a reduced pressure atmosphere of 1 torr to 500 torr, heat of gas molecules under reduced pressure is not newly accompanied by surface modification by chemical reaction. By the movement, the impurity atoms and molecules adsorbed on the surface of the first conductive film as the base adhesion film can be efficiently removed, and the clean surface can be exposed.

Also, for example, 1 torr to 5 of nitrogen or oxygen
By performing the heat treatment under a reduced pressure atmosphere of 00 torr, the impurity atoms and molecules adsorbed on the surface of the first conductive film as the underlying adhesion film can be efficiently removed by the thermal motion of the gas molecules under a reduced pressure, and a clean surface can be obtained. Can be exposed.

Further, for example, when a titanium nitride film is used as the first conductive film as a base adhesion film, the free titanium of the first conductive film is nitrided by the introduced nitrogen or oxygen to obtain a more complete titanium nitride film. Alternatively, the entire surface thereof may be oxidized to form a surface layer of a titanium compound called TiNO.

(6) According to the above-described manufacturing apparatus of the present invention, the side facing the chamber in the side surface of the chamber in the gas phase reaction chamber for observing the inside of the chamber is exposed to the halogen-based gas on the side facing the chamber. By covering with a transparent film made of a material with high corrosion resistance, quartz in the viewing window is prevented from being etched when plasma cleaning is performed using a halogen-based gas to clean the gas phase reaction chamber. You can That is, it becomes possible to prevent the generation of reaction by-products due to the etching of the viewing window.

[0049]

Embodiments of the present invention will now be described in detail with reference to the drawings. In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and a duplicate description will be omitted.

FIG. 1 is a schematic plan view showing a structure in which the upper portion of a manufacturing apparatus according to an embodiment of the present invention is removed. Figure 2
FIG. 3 is a cross-sectional view showing a sputtering chamber in a manufacturing apparatus that is an embodiment of the present invention.

A manufacturing apparatus according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2.

The manufacturing apparatus 1 of the present embodiment is particularly applicable to a manufacturing process of a semiconductor integrated circuit device which requires fine processing, so that a semiconductor integrated circuit device having high reliability and excellent electrical characteristics can be easily manufactured. It can be manufactured by a process.

The manufacturing apparatus 1 has a load lock chamber 2, a pretreatment chamber 3, a sputtering chamber 4, a sputtering chamber 5 and a gas phase reaction chamber 6, and is connected to each of these chambers via a gate valve 8. Each chamber has a transfer chamber 7 which is a mechanism for loading and unloading the wafer 9 as needed.

The wafer 9 is a semiconductor substrate made of, for example, a silicon single crystal material or an SOI (Silicon on Insulat).
or) type substrates and the like are shown in a comprehensive manner.

The load lock chamber 2 is a mechanism portion for loading the wafer 9 into the manufacturing apparatus 1, and includes a plurality of wafers 9.
It has a structure in which a wafer cassette accommodating the wafers can be loaded.

The load lock chamber 2 is a mechanism portion for introducing the unprocessed wafer 9 into the manufacturing apparatus 1 and carrying out the wafer 9 which has been subjected to a series of processing to the outside of the manufacturing apparatus 1. The load lock chamber 2 is connected to a vacuum pump, which is omitted, so that the pressure inside the load lock chamber 2 can be reduced. With this vacuum pump, the pressure in the transfer chamber 7, which will be described later, can be maintained at a good degree of vacuum even when the gate valve 8 between the two chambers is opened.

The pretreatment chamber 3 is a processing portion for performing pretreatment of the wafer 9 such as heat treatment or sputter etching treatment. For example, the pretreatment chamber 3 has an insulating film on the wafer 9 and is formed on the insulating film. This is a processing unit that can perform a heating process or a sputter etching process on the wafer 9 having the connecting holes, if necessary, before the sputtering process.

The sputtering chamber 4 is a processing unit capable of performing a sputtering process. For example, it is a processing unit that can grow a tungsten film as a conductive film on the wafer 9 by the CVD method as a base adhesion film of the conductive film grown by the CVD method in the vapor phase reaction chamber 6.
As another aspect, an aspect in which other metal such as titanium nitride or titanium tungsten is used instead of tungsten can be adopted.

Further, as shown in FIG. 2, the wafer 9 in the sputtering chamber 4 is placed on the wafer stage 4a. A temperature adjusting mechanism (not shown) capable of adjusting the temperature of the wafer 9 is installed on the wafer stage 4a.

On the wafer stage 4a, a gas introducing pipe 4b connected to a temperature adjusting mechanism is installed. Therefore, the argon gas for cooling the wafer 9 is supplied from the back surface of the wafer stage 4a by using the temperature adjusting mechanism to the gas introduction pipe 4b.
The argon plasma can be generated and the sputtering can be performed while being supplied through.

Wafer stage 4a using a temperature adjusting mechanism
By lowering the temperature of 1, the wafer 9 during the sputtering film formation process can be cooled, so that the crystal growth of sputtered particles is prevented, and the crystal grains are curled by the surface tension and the formation of voids at the grain boundaries is suppressed. There is an effect that can be done.

Further, as shown in FIG. 2, in the sputtering chamber 4, a structure 4d having a through hole in a direction substantially perpendicular to the wafer 9 is arranged between the wafer 9 and the target 4c as required. You can

The shape of the through hole opened in the structure 4d is
Maximum opening length is 3 cm or less, depth / maximum opening length ratio is 0.9
It is the following. By providing the structure 4d, it is possible to secure step coverage of 10% or more on both the side wall and the bottom surface of the connection hole having a high aspect ratio as compared with the flat portion.

The sputtering chamber 5 is a processing section capable of performing a sputtering process, and has a structure similar to that of the above-described sputtering chamber 4. By making the target different from the target 4c installed in the sputtering chamber 5 and the conditions of the sputtering process different, it is possible to perform different sputtering processes on the wafer 9.

The gas phase reaction chamber 6 is a processing section for carrying out a gas phase reaction. The vapor phase reaction chamber 6 is a processing unit capable of mainly blanket-growing a metal such as tungsten on the wafer 9.

Further, the gas phase reaction chamber 6 has a structure capable of performing at least one of the following two treatments as required.

The first is a heat treatment under a reduced pressure atmosphere of a gas such as hydrogen. As will be described later, for example, it is possible to remove atoms or molecules adsorbed on the surface of the conductive film as a base adhesion film in a wiring film or the like, and perform a treatment for dissociating and adsorbing hydrogen atoms in advance on the surface of the conductive film. it can.

The second is plasma processing such as hydrogen plasma processing. This is a blanket CV as described later.
A process for cleaning the inside of the gas phase reaction chamber 6 after forming the D film can be performed.

Further, in the gas phase reaction chamber 6, a viewing window 6a is installed on the side surface inside the chamber 6d. Peep window 6
“A” is a window for observing the inside of the chamber 6d when the blanket CVD film is formed, for example.

The viewing window 6a is mainly made of a transparent film 6b such as quartz, but in this embodiment, the viewing window 6a is formed.
In, the side facing the chamber 6d is covered with the transparent film 6c. The transparent film 6c is a transparent film made of a material such as sapphire (Al ₂ O ₃ ) which is not etched by a fluorine (F) gas. As another mode of the transparent film 6c, a transparent film made of a material that is not etched by a halogen-based gas can be applied.

By providing this transparent film 6c,
As will be described later, when the plasma cleaning process is performed on the chamber 6d using a fluorine-based gas, the quartz in the transparent film 6b forming the viewing window 6a is etched. It has the effect of suppressing the phenomenon that reaction products such as NO) and silicon fluoride (SiF ₄ ) are generated.

When the viewing window 6a is not covered with the transparent film 6c such as sapphire, the chamber 6
FIG. 11 shows the relationship between the gas concentration of nitrogen oxide remaining in the chamber 6d and the film formation delay time (lag time) of the tungsten film when the plasma cleaning process was performed on d using a fluorine-based gas. Show.

As shown in FIG. 11, the delay in the tungsten film formation time tends to increase when the residual nitrogen oxide gas concentration is high.

That is, in this embodiment, since the transparent film 6c prevents the observation window 6a from being etched during the plasma cleaning process using the fluorine-based plasma cleaning process, the plasma cleaning process using the fluorine-based system is performed. In this case, it is possible to prevent the phenomenon that a reaction product that inhibits the growth of tungsten is generated due to the etching of the viewing window 6a at the time, so that the phenomenon of delaying the film forming time due to the reaction product is prevented. Can be prevented.

The transfer chamber 7 is a mechanism for transferring the wafer 9. The transfer chamber 7 is equipped with a transfer arm 7a for the wafer 9 which transfers the wafer 9 in each chamber in about 30 seconds.

The transfer chamber 7 is connected to a vacuum pump (not shown) so that the transfer chamber 7 can be depressurized, and a gate valve 8 between the load lock chamber 2 and the transfer chamber 7 is provided.
Except for a short time immediately after opening, the pressure is always kept at 5 × 10 ⁻⁸ torr or less, that is, the degree of vacuum.

The necessity of keeping the transfer chamber 7 in a depressurized state is as follows. The surface atomic density when the wafer 9 is silicon is, for example, 1 × 10 ¹⁵ atoms / cm ²
It is a degree. The incident molecular flow γ in the case of oxygen at 20 ° C. and 1 × 10 ⁻⁶ torr is, for example, 4.15 × 10 ¹⁴ mole.
cules / cm ² · s, converted to atoms 8.30 × 10 ¹⁴ mo
lecules / cm ² · s, and most of the surface atom density of the wafer 9 becomes a value close to 1 × 10 ¹⁵ atoms / cm ² , for example.

Here, the degree of vacuum in the transfer chamber 7 is 5 × 1.
At 0 ⁻⁸ torr, the contaminant molecules are present in the wafer 9 in, for example, about 30 seconds.
It is formed as a monolayer on top. In reality, all the contaminant molecules that have reached the wafer 9 do not stay on the surface, but it is necessary to prevent the surface oxidation due to oxygen or the formation of the interface impurity layer due to the physically adsorbed contaminant molecules. Therefore, it is necessary to maintain the cleanliness of the surface of the wafer 9, and it is necessary to maintain the degree of vacuum.

Although the load lock chamber 2 and the transfer chamber 7 are kept in a depressurized state, as another mode in which the same effect can be obtained, a mode in which they are filled with a high purity inert gas is used. You can also

Next, a method of manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention will be described with reference to the drawings.

3 to 9 are sectional views showing the manufacturing steps of a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 10 is a process diagram showing a manufacturing process for forming a wiring layer in a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

First, as shown in FIG. 3, a wafer 9 such as a semiconductor substrate made of p-type silicon single crystal is prepared, and a p-type well region 10 and an n-type well region 11 are prepared.
After forming the film, a field insulating film 12 to be an insulating film for element isolation is formed in a selective region on the (100) plane of the surface.
After the formation of n, the n surrounded by the field insulating film 12 is formed.
For example, MOSFETs are formed in the element formation regions in the p-type well region 10 and the p-type well region 11. This MOSFET is, for example, a DRAM (Dynamic Random Access).
It can be applied as a semiconductor element in various types of semiconductor integrated circuit devices such as a memory cell of a memory).

The field insulating film 12 is made of, for example, silicon dioxide (SiO ₂ ) and has a thickness of 400 to 60, for example.
It is about 0 nm.

The MOSFET can be formed by using the prior art, and has a gate insulating film 13, a gate electrode 14 formed on the surface thereof, and a diffusion layer 15 serving as a source and a drain.

The diffusion layer 15 is made of n such as arsenic (As).
Type impurities are ion-implanted into the p-type well region 10. The gate insulating film 13 is made of, for example, a silicon oxide film and has a thickness of, for example, about 6 to 15 nm.

The gate electrode 14 is made of, for example, a polycrystalline silicon film, and its thickness is, for example, about 200 to 300 nm.

The gate electrode 14 is formed, for example, by the manufacturing process described below.

First, a polycrystalline silicon film is deposited on the wafer 9 by, for example, the low pressure CVD method, and then a predetermined impurity is introduced into the polycrystalline silicon film to reduce the resistance. Next, after heat treatment, the polycrystalline silicon film is patterned by a photolithography technique, a dry etching technique or the like to form the gate electrode 14.

The side wall 16 formed around the gate electrode 14 is, for example, an HLD (High Temperat).
A silicon oxide film formed by the ure low pressure deposition method is used.

Next, as shown in FIG. 4, an insulating film 17 is formed on the wafer 9. The insulating film 17 has a thickness of 1.2 μ, for example.
After depositing an insulating film 17 of a BPSG (Boro Phospho Silicate Glass) film of about m 2 by a CVD method or the like, a heat treatment at about 800 ° C. is applied to the wafer 9 as a flattening process of the upper surface of the insulating film 17. Insulating film 17
Is formed by flattening the upper surface of.

Next, a connection hole 18 is formed in the insulating film 17 so that the surface of the diffusion layer 15 is exposed. The connection hole 18 is formed by forming a selective region of the insulating film 17 by using a photolithography technique, a dry etching technique, or the like. The diameter of the connection hole 18 is, for example, about 0.5 μm.

Next, as shown in FIGS. 5 and 9, a conductive film 19 as a first conductive film made of, for example, tungsten or tungsten silicide and having a thickness of about 200 nm is deposited on the wafer 9 by a sputtering method or the like. .

Next, for example, a thickness of 20 is formed on the conductive film 19.
A conductive film 20 as a second conductive film made of tungsten or the like having a thickness of about 0 to 300 nm is used as a blanket C using, for example, a reaction gas of tungsten hexafluoride (WF ₆ ) and hydrogen.
It is deposited by the VD method or the like.

FIG. 9 is an enlarged sectional view showing the vicinity of the connection hole 18 in FIG. As shown in FIG.
For the reasons described below, the film thickness of the conductive film 20 formed in the connection hole 18 in the conductive film 20 as the second conductive film is
It may be thicker than the film thickness of the conductive film 20 formed on the flat portion on the insulating film 17.

Next, the wafer 9 in which the connection holes 18 are formed is processed with, for example, a mixture ratio of HF and HNO ₃ of HF: HNO.
By performing a wet etching process using an etching solution or the like in which ₃ = 1: 100, a nonconductor such as a natural oxide film randomly formed at the bottom of the connection hole 18 is removed.

The manufacturing process of the conductive film 19 as the first conductive film and the conductive film 20 as the second conductive film in the wiring layer in this embodiment is performed using the manufacturing apparatus 1 shown in FIG. The specifics are as follows.

First, a wafer cassette containing a plurality of wafers 9 after the wet etching process is loaded into the load lock chamber 2 of the manufacturing apparatus 1, and then the load lock chamber 2 is evacuated by a vacuum pump to reduce the pressure. To a desired pressure (step 100 shown in FIG. 10).

Next, the gate valve 8 of the load lock chamber 2
Is opened, one wafer 9 in the load lock chamber 2 is taken out by the wafer transfer arm 7a of the transfer chamber 7, and the wafer 9 is housed in the transfer chamber 7.

After that, the wafer 9 in the transfer chamber 7 is transferred to the pretreatment chamber 3. In the pretreatment chamber 3, the temperature reached to the wafer 9 is set to, for example, 150 by using, for example, a halogen lamp.
The lamp heat treatment is performed under the treatment conditions of, for example, about 1 minute at a heating temperature of about 400 ° C. to 400 ° C. (Step 10 shown in FIG. 10).
1).

By the pretreatment in the pretreatment chamber 3, the adsorbed atoms and molecules such as atmospheric components and water adhering to the wafer 9 can be desorbed.

Therefore, when depositing, for example, tungsten as the conductive film 19, not only the adhesion on the upper surface of the insulating film 17 can be improved but also the connection hole 18 can be formed.
A good Si-W interface can be obtained by removing unnecessary impurities existing on the bottom surface of the.

Next, after performing the pretreatment, the wafer 9 is transferred from the pretreatment section 3 to the sputtering chamber 4 via the transfer chamber 7. In this case, the time required for the wafer 9 to pass through the transfer chamber 7 is, for example, 30 seconds, and the vacuum degree in the transfer chamber 7 is, for example, 1 × 10 ⁻⁸ torr.

Next, in the sputtering chamber 4, a tungsten film having a thickness of, for example, about 200 nm as the conductive film 19 is deposited and formed on the wafer 9 by the sputtering method (step 102 shown in FIG. 10).

In the process in the sputtering chamber 4, an argon plasma is generated from the back surface of the wafer stage 4a holding the wafer 9 while supplying the argon gas for cooling the wafer 9 through the gas introduction pipe 4b using a temperature adjusting mechanism. Sputtering is performed in this state.

As a result, the heating of the wafer 9 by the plasma is suppressed, and the temperature rise of the wafer 9 is suppressed, so that the crystal grain growth of the tungsten film on the wafer 9 is suppressed and the crystal grains are rounded by the surface tension. Does not occur, no gap is generated between crystal grains.

Therefore, in the subsequent blanket CVD process, it is possible to prevent the reaction gas tungsten fluoride from penetrating through the gap and reaching the silicon in the underlying diffusion layer 15.

After performing the sputtering process of tungsten to form the conductive film 19, the wafer 9 is transferred from the sputtering chamber 4 to the vapor phase reaction chamber 6 via the transfer chamber 7. In this case, the time required for the wafer 9 to pass through the transfer chamber 7 is, for example, 30 seconds, and the vacuum degree in the transfer chamber 7 is, for example, 1 × 1.
It is 0 ^-8 torr.

By thus reducing the pressure, a good degree of vacuum can be maintained between the sputtering chamber 4 and the gas phase reaction chamber 6. That is, in order to prevent the formation of an impurity layer at the interface between the conductive film 19 and the conductive film 20 due to the adsorbed impurities, it is necessary to maintain the above-mentioned degree of vacuum.

In the gas phase reaction chamber 6, processing is performed according to steps 103 to 105 shown in FIG. The process surrounded by the broken line in FIG. 10 indicates that it is performed in the same gas phase reaction chamber 6.

First, the chamber 6d in the gas phase reaction chamber 6
The wafer 9 is heat-treated while supplying a gas such as hydrogen therein. Thereby, the impurities adsorbed on the surface of the conductive film 19 deposited by sputtering are removed, the oxide film (not shown) such as WO _x formed on the side wall and the bottom of the connection hole 18 is reduced, and the hydrogen to the conductive film 19 is reduced. Is dissociated and adsorbed (step 103 shown in FIG. 10).

As the processing conditions in this case, the flow rate of hydrogen gas is, for example, about 1000 sccm, and the total pressure at that time is, for example, 20 torr. Moreover, the heat treatment temperature is, for example, 400 ° C.
It is a degree. The heat treatment time is, for example, 2 minutes.

FIG. 12 is a graph showing the relationship between the aspect ratio of the contact holes 18 and the conduction yield of the contact chains with and without the heat treatment under the above-mentioned heat treatment conditions. In this case, the conductive film 20 is embedded in the connection hole 18 by using a manufacturing process described later.

As is clear from FIG. 12, when the heat treatment with hydrogen is not performed, the conduction yield of the contact chain in the connecting hole 18 having an aspect ratio of 2.0 or more sharply decreases, resulting in 0%. Will end up.
However, when subjected to heat treatment with hydrogen, the aspect ratio is 2.
It can be seen that in the connection holes 18 up to 3, the conduction yield of the contact chain does not decrease and 100% is achieved.

By this heat treatment, the vapor phase reaction film is preferentially formed on the surface of the conductive film 19 by sputtering mainly along the grain boundaries of the conductive film 19 at the initial stage of the deposition process of the tungsten film by the vapor phase reaction described later. It was found to grow unevenly. From this, the mechanism for improving the conduction yield of the contact chains during this heat treatment is as described below.

That is, since the surface area is large at the grain boundary, a large amount of hydrogen is dissociated and adsorbed as compared with the portion other than the grain boundary, and during the subsequent gas phase reaction process, this reaction is controlled by the supply rate of tungsten fluoride as the reaction gas. As a result, a large amount of hydrogen in the grain boundary portion consumes tungsten fluoride, and the vapor-phase reaction film preferentially grows nonuniformly along the grain boundary of the conductive film 19. This preferential reaction
The grain boundary of the conductive film 19 that serves as a passage through which tungsten fluoride permeates is reinforced, and permeation of tungsten fluoride is suppressed, so that the conduction yield of the contact chain improves.

Next, a conductive film 20 such as tungsten is formed on the surface of the wafer 9 including the connection holes 18 by using, for example, a reaction gas of hydrogen and tungsten fluoride in the gas phase reaction chamber 6.
Deposit. Here, hydrogen is used as the reducing gas instead of silane (SiH ₄ ), because the conductive film 20 is embedded in the inside of the connection hole 18 with good step coverage (step 104 shown in FIG. 10).

The film thickness of the tungsten film as the conductive film 20 formed under the above conditions is, for example, 10 nm inside the connection hole 18.

As the processing conditions in this case, the flow rate of hydrogen is, for example, about 1000 sccm, and the flow rate of tungsten fluoride is, for example, about 10 sccm. The total pressure at this time is 1
is torr. The temperature in the gas phase reaction chamber 6 is, for example, 400 ° C.

As a result, the excess tungsten fluoride reaches the silicon in the diffusion layer 15 along the grain boundaries of the conductive film 19 during the processing under the above-mentioned film forming conditions.
It is possible to prevent the conduction yield of the contact chain in the connection hole 18 from being lowered, and preferentially grow the conductive film 20 which is a vapor phase reaction film along the grain boundaries of the conductive film 19 at the initial stage of this process.

Therefore, the grain size of the crystal grains forming the conductive film 19 which is the sputtering film is smaller than that in the flat portion, and the tungsten film as the conductive film 20 due to the vapor phase reaction is formed on the insulating film 17 inside the connection hole 18. The flat portion can be preferentially grown, and the conductive film 20 formed as the vapor-phase reaction film inside the connection hole 18 has a thicker film than the flat portion on the insulating film 17. can do.

Next, a conductive film (not shown) such as tungsten is formed on the surface of the wafer 9 including the connection holes 18 by using, for example, a reaction gas of hydrogen and tungsten fluoride in the gas phase reaction chamber 6. Deposit (Step 10 shown in FIG. 10)
5).

As the processing conditions in this case, the flow rate of hydrogen is, for example, about 1000 sccm, and the flow rate of tungsten fluoride is, for example, about 30 sccm. The total pressure at this time is 8
It is 0 torr. The temperature in the gas phase reaction chamber 6 is 400 ° C., for example.
Is. As a result, a conductive film such as a tungsten film can be formed at a growth rate sufficiently higher than that of the tungsten film grown in the processing step 104. However, when the growth rate does not matter or when the thick film thickness is not required, the step 105 shown in FIG. 10 can be omitted if necessary.

Next, after performing the gas phase reaction process, the wafer 9
Is transferred from the gas phase reaction chamber 6 to the sputtering chamber 5 via the transfer chamber 7. In this case, the time required for the wafer 9 to pass through the transfer chamber 7 is, for example, 30 seconds, and the vacuum degree in the transfer chamber 7 is, for example, 1 × 10 ⁻⁸ torr.

The reason why the inside of the transfer chamber 7 is depressurized and the degree of vacuum thereof is set to, for example, 1 × 10 ^-8 torr is basically to maintain a good degree of vacuum between the pretreatment chamber 3 and the sputtering chamber 4. For the same reason. That is, it is necessary to maintain the above-mentioned degree of vacuum in order to prevent the formation of an impurity layer at the interface between the conductive film 20 due to the adsorbed impurities and the conductive film 21 such as an aluminum alloy conductive film due to the subsequent sputtering. Become.

Here, the impurity layer at the interface is the conductive film 20 in the high temperature atmosphere to which the wafer 9 is exposed in the subsequent manufacturing process.
And promotes a non-uniform reaction at the interface between the conductive film 21 and the conductive film 21.

FIG. 13 is a graph showing the relationship between the heat treatment time and the rate of increase of the wiring layer resistance when the laminated film of tungsten and aluminum alloy is heat treated. As is clear from FIG. 13, when impurities are adsorbed on the interface, the resistance value of the wiring layer rises sharply. In contrast,
If there is no impurity layer at the interface, the reaction between tungsten and aluminum alloy occurs uniformly, and the alloy of tungsten and aluminum is formed uniformly at the interface, so that it itself becomes a barrier film for the reaction between tungsten and aluminum, and the reaction layer By suppressing the growth of the, the increase in the resistance of the wiring layer can be suppressed.

On the other hand, after the wafer 9 is transferred from the gas phase reaction chamber 6 to the transfer section 7, the inside of the gas phase reaction chamber 6 is cleaned, for example, by a plasma cleaning process using a fluorine-based gas. Do. As a result, it is possible to reduce residual tungsten and the like in the gas phase reaction chamber 6.

Further, hydrogen gas was supplied to the gas phase reaction chamber 6 following the plasma cleaning treatment using a fluorine-based gas, and then, for example, 13.56 M was applied to an electrode (not shown) in the chamber.
A high frequency of Hz is applied. As a result, hydrogen plasma is formed in the gas phase reaction chamber 6.

The processing conditions in this case are that the flow rate of hydrogen gas is, for example, about 100 sccm, and the total pressure at that time is, for example, 300 mt.
orr. The temperature in the gas phase reaction chamber 6 is, for example, 40
It is about 0 ° C.

By this treatment, the SiF remaining in the vapor-phase reaction chamber 6 after the vapor-phase reaction treatment, which occurs when the transparent film 6c which has not been etched by the fluorine-based gas covering the observation window 6a is partially peeled off, is generated. _x , SiH _x F _y and NO _x
It is possible to reduce reaction byproducts such as.

Therefore, after that, the wafer 9 is transferred to the gas phase reaction chamber 6
The reaction by-product remaining when the wafer 9 was loaded into the wafer adheres to the surface of the wafer 9, which causes a time delay until the start of film formation when the wafer 9 is subjected to the gas phase reaction process. It can be suppressed.

FIG. 14 is a graph showing the relationship between the film deposition delay time up to the film deposition start due to the gas phase reaction in the case where the hydrogen plasma treatment is performed and the case where the hydrogen plasma treatment is not performed.

As is clear from FIG. 14, when the hydrogen plasma treatment is not applied, a longer time delay occurs as compared with the case where the hydrogen plasma treatment is applied.

As described above, in the gas phase reaction chamber 6 in the manufacturing apparatus 1 of this embodiment, since the observation window 6a is covered with the transparent film 6c, it is possible to perform the plasma cleaning process using the fluorine-based gas. It is possible to prevent a phenomenon in which a reaction byproduct that inhibits the growth of tungsten is generated due to the etching of the viewing window 6a.

In the sputtering chamber 5, a conductive film 21 made of, for example, an aluminum alloy film is deposited on the surface of the wafer 9 by the sputtering method. The conductive film 21 has a thickness of, for example, about 600 nm (step 106 shown in FIG. 10).

After that, the wafer 9 is transferred from the sputtering chamber 5 to the sputtering chamber 4 via the transfer chamber 7.

In the sputtering chamber 4, a conductive film 22 such as a tungsten film is deposited on the wafer 9 by the sputtering method. The thickness of the conductive film 22 is, for example, about 100 nm (step 107 shown in FIG. 10). For example, the purpose of forming the conductive film 22 made of a tungsten film is
This is to prevent pattern resolution defects due to halation in the subsequent photolithography process.

After that, the wafer 9 is transferred from the sputtering chamber 4 to the load lock chamber 2 via the transfer chamber 7, and then the load lock chamber 2 is opened and the wafer 9 is taken out under normal pressure (step 108 shown in FIG. 10). ).

Next, as shown in FIG. 6, conductive films 19 and 2 are formed.
0, 21 and the conductive film 22 are patterned by a photolithography technique, a dry etching technique, or the like to form the conductive films 19, 20, 21.
Then, the first wiring layer 23 including the conductive film 22 is formed.

The first wiring layer 23 can be used as a signal line of a DRAM, for example.

Next, as shown in FIG. 7, an insulating film 24 having a thickness of, for example, about 500 nm is deposited on the wafer 9 by a plasma CVD method or the like. After that, an SOG film 25 having a thickness of, for example, about 500 nm is deposited on the insulating film 24, and then the main surface of the wafer 9 is dry-etched to, for example, 70
The insulating film 24 and the insulating film 25 on the main surface of the wafer 9 are flattened by etching back about 0 nm.

Next, an insulating film 26 having a thickness of, for example, about 700 nm is deposited on the wafer 9 by a plasma CVD method or the like to form an interlayer insulating film composed of the insulating films 24 and 25 and the insulating film 26, for example, having a thickness of about 1000 nm. 27 is formed.

Next, the first wiring layer 23 is formed on the interlayer insulating film 27.
A connection hole 28 and a connection hole 29 having a diameter of about 0.5 μm are formed by photolithography and dry etching so as to partially expose the surface thereof. The SOG film 2 is formed on the side surfaces of the connection holes 28 and 29.
5 is formed so as not to be exposed, so that the SOG film 25 does not come into contact with the connection hole 28 or a wiring layer formed in the connection hole 29, which will be described later, and an unfavorable chemical reaction occurs between them. .

Thereafter, the wafer 9 is placed in the manufacturing apparatus 1,
Similarly to the first wiring layer 23, the following four conductive films, which will be the second wiring layer, are successively deposited on the wafer 9 in order from the lower layer by the sputtering method and the blanket CVD method.

In this case, by using the manufacturing apparatus 1, various effects in the manufacturing process of the first wiring layer 23 described with reference to FIGS. 3 to 6 can be obtained.

That is, as shown in FIG. 8, the first conductive film 30 in the second wiring layer is made of, for example, tungsten deposited by sputtering, and its thickness is, for example, about 50 nm. The second conductive film 31 is made of, for example, tungsten deposited by the blanket CVD method and has a thickness of, for example, about 250 nm. Third conductive film 32
Is made of, for example, an aluminum alloy deposited by sputtering, and its thickness is, for example, about 600 nm. The fourth conductive film 33 is made of, for example, tungsten deposited by the blanket CVD method and has a thickness of, for example, 100.
It is about nm.

Next, the second wiring layer 34, which is a laminated film made of these conductive films, is patterned by a photolithography technique, a dry etching technique, or the like to form the second wiring layer 34.

The second wiring layer 34 can be used as a word line of a DRAM, for example.

After that, a surface protection film 35 is formed on the wafer 9 by laminating, for example, a silicon oxide layer and a silicon nitride layer in order from the lower layer.

In a semiconductor integrated circuit device and a method of manufacturing the same according to another embodiment of the present invention, the conductive film 20 as the second conductive film is formed of a metal halide such as tungsten hexafluoride and silane or difluorosilane. , A disilane, dichlorosilane, or other reducing gas containing silicon or a metal halide and a reducing gas can be formed by a CVD method using hydrogen.

In this case, when tungsten hexafluoride is used as the metal halide, the degree of vacuum is set to 5 torr or less, and the flow rate ratio between the tungsten hexafluoride and the reducing gas is silane as the reducing gas. 1 to 0.4-1.
5, 1 to 0.1 to 10 for difluorosilane and 1 to 10 to 300 for hydrogen.

Further, the conductive film 20 as the second conductive film is made of titanium or titanium silicide, and organic metal such as tetradiethoxytitanium (TDET) or tetradimethyltitanium (TDMAT) and ammonia, hydrogen, etc. are used. It can be formed by the CVD method using the reducing gas.

The semiconductor integrated circuit device manufactured by using the manufacturing apparatus of this embodiment and the manufacturing method thereof have various features and effects as described below.

(1) According to the semiconductor integrated circuit device of the present embodiment, the wiring layer formed of the conductive film provided on the surface of the insulating film near the connection hole and the connection hole formed in the insulating film. And a film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in a connection hole is larger than a film thickness of a surface of the insulating film near the connection hole. Since the wiring layer is also thick, the wiring layer can be completely embedded in the connection hole, so that the reliability of the electrical connection of the wiring layer in the region of the connection hole becomes high and the electrical characteristics become excellent.

The film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in the connection hole is larger than the film thickness of the surface of the insulating film in the vicinity of the connection hole. As a result, when the conductive film is formed by, for example, the CVD method after the manufacturing process of the conductive film, the contact electrode of the semiconductor element or the lower conductive film exposed on the bottom surface of the connection hole becomes a reaction gas used in the CVD method. Since it can have a function as a barrier film for preventing damage from being touched, reliability of electrical connection between the wiring layer in the region of the contact hole and the contact electrode of the semiconductor element thereunder or the conductive film in the lower layer. The higher the degree, the better the electrical characteristics.

Further, the film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in the connection hole is larger than the film thickness of the surface of the insulating film in the vicinity of the connection hole. As a result, even if the resistance value of the conductive film is relatively high, the film thickness of the conductive film provided on the surface of the insulating film can be reduced, so that the conductive film in the connection hole and as the wiring layer is formed. Even in the case of simultaneously forming and, it is possible to suppress an increase in combined resistance value in a state where a plurality of conductive films are laminated in the wiring layer.

(2) According to the method of manufacturing the semiconductor integrated circuit device of this embodiment, the step of forming the first conductive film on the surfaces of the insulating film and the contact hole and the first step formed on the semiconductor substrate. A heat treatment step of performing a heat treatment on the conductive film in a gas atmosphere or a plasma treatment step of performing a plasma treatment on the second conductive film. Impurity atoms and molecules adsorbed on the surface of the conductive film can be removed to expose the clean surface.

Further, impurity atoms and molecules adsorbed on the surface of the first conductive film are removed and the dangling bond (du
ng ring bond), and the surface of the first conductive film can be activated.

Further, the surface-altered layer formed by the reaction of the surface of the first conductive film with the substance in the atmosphere can be removed, or the first state in the original state where the surface-altered layer is not formed can be removed. It can be returned to the conductive film.

Further, if the first conductive film is made to react with the material of the conductor thereunder, for example, a semiconductor substrate on which a semiconductor element is formed or an underlayer film, tungsten on silicon in the semiconductor substrate is used. A novel reaction layer such as tungsten silicide can be formed at the interface.

Further, it is possible to prevent the aggregation of crystal grains accompanying the crystal growth when forming the first conductive film as the base adhesion film. Further, a new reaction layer can be formed by causing a reaction with an underlying substance such as a semiconductor substrate when forming the first conductive film as the underlying adhesion film.

Further, a film suitable for suppressing excessive reaction gas from reaching the entire inside of the connection hole during the subsequent gas phase reaction, for example, reaching the lower layer of the connection hole, such as the semiconductor substrate or the wiring layer as the lower layer film. The seed can form the first conductive film as a base adhesion film having a necessary and sufficient thickness.

Therefore, it is possible to prevent an excessive reaction gas from reaching the lower layer of the connection hole, for example, the semiconductor substrate or the wiring layer at the time of the vapor phase reaction when the conductive film is formed by the CVD method, thereby reducing the contact resistance or the contact resistance. It is possible to prevent an increase in resistance in the wiring layer in the connection hole.

Further, by using hydrogen in the heat treatment step or the plasma treatment step, hydrogen can be dissociated and adsorbed on the surface and the grain boundary portion of the first conductive film as the underlying adhesion film. As a result, it is possible to prevent excess reaction gas from reaching the lower semiconductor substrate or the wiring layer during the subsequent gas phase reaction, and to prevent the contact resistance and the resistance of the wiring layer in the connection hole from increasing.

(3) According to the method for manufacturing a semiconductor integrated circuit device of this embodiment, the step of forming the first conductive film includes, for example, a sputtering method in which the wafer 9 such as a semiconductor substrate is cooled, or the wafer 9 is cooled. Sputtering method in a state of being kept at a high temperature, the sputtering method by the manufacturing apparatus 1 in which a structure for controlling the directivity of sputtered particles is provided between the wafer 9 and the target material, the semiconductor substrate and the target material. A sputtering method by a manufacturing apparatus having a structure in which the distance between the
Alternatively, by using a step of forming the first conductive film by a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas, a gas used for a CVD film which later forms the second conductive film. Can be prevented from penetrating through the sputtered film serving as the first conductive film and reacting with the underlying wiring material such as silicon or aluminum alloy.

That is, by performing sputtering while the wafer 9 such as a semiconductor substrate is cooled, crystal growth of the target particles incident on the wafer 9 on the wafer 9 is prevented, and crystals accompanying the crystal growth of the particles are prevented. Agglomeration of grains can be prevented, and a gap can be prevented from opening between crystal grains.

Further, by performing the sputtering while the wafer 9 is kept at a high temperature, the target particles incident on the wafer 9 react with the semiconductor substrate or the lower layer film underlying the wafer 9 so that, for example, silicon. If tungsten is used, a new reaction layer such as tungsten silicide can be formed at the interface.

In addition to the above-described cooled state of the wafer 9, the sputtering method by the manufacturing apparatus 1 in which a structure for controlling the directivity of sputtered particles is provided between the target material and the wafer 9 or A sputtering method in which a semiconductor substrate and a target material are spaced apart from each other by a radius of a wafer or more, and sputtering can be performed while maintaining an average free path of sputtered particles at 1/3 or more of a distance between the semiconductor substrate and a target. As a result, the first conductive film having a necessary and sufficient thickness can be deposited in the entire connection hole.

Further, by adopting a step of forming the first conductive film such as a titanium nitride film by a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas, a fine and high aspect ratio is obtained. Even with a contact hole having a specific ratio, the first conductive film having a sufficient thickness can be deposited in the contact hole.

(4) According to the method of manufacturing a semiconductor integrated circuit device of the present embodiment, the film thickness at the flat portion of the conductive film such as the metal film having a relatively high resistance used for forming the connection hole is compared with the prior art. It is possible to reduce the thickness, and it is possible to suppress an increase in the combined resistance value of the laminated film in the wiring layer portion having the conductive film when the connection hole and the conductive film are simultaneously formed.

Further, the surface of the first conductive film as the underlayer adhesion film can be cleaned by the heat treatment process or the plasma treatment process prior to the chemical vapor deposition method, and the dense film can be formed in the subsequent vapor phase reaction. Can grow.

Further, even when the first conductive film as the underlayer adhesion film does not have a sufficient film thickness, the underlayer is not damaged in the connection hole without damaging the lower layer of the connection hole, such as the semiconductor substrate or the wiring layer. Since a conductive film having a sufficient thickness can be formed on the first conductive film as an adhesion film by the CVD method, an excessive reaction gas is generated in a subsequent gas phase reaction, for example, a semiconductor substrate under the connection hole, for example, a semiconductor substrate. Alternatively, it is possible to suppress reaching the wiring layer and prevent an increase in contact resistance or resistance of the wiring layer in the connection hole.

(5) According to the manufacturing apparatus 1 of the present embodiment, a mechanism that is connected to each chamber through the gate valve 8 and that loads and unloads a wafer 9 such as a semiconductor substrate into each chamber as needed. The transfer chamber is connected to a vacuum pump capable of reducing the pressure inside the load chamber, and the load lock chamber is connected to a vacuum pump capable of reducing the pressure inside the load chamber. , The vapor phase reaction chamber 6 after forming the first conductive film in the sputtering chamber
In the step of forming the second conductive film on the surface of the first conductive film, and when the wafer 9 is loaded into or unloaded from each chamber, the wafer 9 is loaded in a reduced pressure state and is not exposed to the atmosphere. Therefore, it is possible to prevent impurities from being adsorbed on the surface of the first conductive film before the formation of the second conductive film.

Further, the interface between different kinds of conductive films such as the first conductive film and the second conductive film can be prevented from reacting nonuniformly under the influence of oxygen or nitrogen contained in the atmosphere.

Further, when the semiconductor integrated circuit device or the like is manufactured by applying the manufacturing apparatus 1 of the present embodiment, the connection hole and the wiring layer can be formed at the same time, and the unstable elements are reduced by the simplification of the process. You can In addition, TAT (Turn Aroun
The semiconductor integrated circuit device of various aspects can be manufactured by using a simple manufacturing process that is effective for shortening d Time).

(6) According to the manufacturing apparatus 1 of this embodiment, the transfer chamber is in a depressurized state or in an atmosphere of an inert gas without exposing the step of forming the wiring layer forming the laminated wiring structure of the conductive film to the atmosphere. Since it is performed by each chamber connected by, it is possible to prevent the conductive films of a plurality of conductive films from reacting non-uniformly. Can be suppressed.

Further, according to the manufacturing apparatus 1 of the present embodiment, the manufacturing apparatus equipped with the sputtering chamber and the vapor phase reaction chamber 6 when the conductive film is formed by the vapor phase reaction method such as the sputtering method and the blanket CVD method. 1, the load lock chamber 2 and the transfer chamber 7 are kept in a depressurized state to prevent surface oxidation by oxygen or formation of an interface impurity layer by physically adsorbed contaminant molecules, and the surface of the wafer 9 after formation of the sputtering film. The cleanliness of can be maintained.

Further, according to the manufacturing apparatus 1 of the present embodiment, when the wafer 9 is transferred from the gas phase reaction chamber 6 to the sputtering chamber via the transfer chamber after the gas phase reaction process, the transfer chamber has a good vacuum degree. By holding it, it is possible to prevent the formation of an impurity layer at the interface between the conductive film due to the adsorbed impurities and the conductive film such as an aluminum alloy conductive film due to the subsequent sputtering.

Further, according to the manufacturing apparatus 1 of this embodiment, at least one of the heat treatment or the plasma treatment under the reduced pressure atmosphere of the gas is used as the gas phase reaction chamber 6.
By having a structure capable of performing one treatment, for example, 1 torr to 50 containing 10% or more of hydrogen.
By performing heat treatment in a reduced pressure atmosphere of 0 torr, the impurity atoms and molecules adsorbed on the surface of the first conductive film as a base adhesion film are removed by the thermal motion of gas molecules under a reduced pressure to expose a clean surface. can do.

Further, for example, when the first conductive film as the base adhesion film is tungsten, it becomes possible to dissociate and adsorb hydrogen on the surface and grain boundaries, and the tungsten oxide formed on the bottom surface of the connection hole is replaced with hydrogen. By doing so, it becomes possible to reduce and return it to tungsten, and thus it becomes possible to reduce the oxidation-altered layer on the surface of the first conductive film.

Further, heat treatment of a rare gas such as helium or argon is performed under a reduced pressure atmosphere of 1 torr to 500 torr, whereby the heat of gas molecules under reduced pressure is not newly accompanied by surface modification by chemical reaction. By the movement, the impurity atoms and molecules adsorbed on the surface of the first conductive film as the base adhesion film can be efficiently removed, and the clean surface can be exposed.

Also, for example, 1 torr to 5 of nitrogen or oxygen
By performing the heat treatment under a reduced pressure atmosphere of 00 torr, the impurity atoms and molecules adsorbed on the surface of the first conductive film as the base adhesion film are efficiently removed by the thermal motion of the gas molecules under the reduced pressure, and the clean surface is obtained. Can be exposed.

Further, for example, when a titanium nitride film is used as the first conductive film as the underlayer adhesion film, the free titanium of the first conductive film is nitrided by the introduced nitrogen or oxygen to obtain a more complete titanium nitride film. Alternatively, the entire surface thereof may be oxidized to form a surface layer of a titanium compound called TiNO.

(7) According to the manufacturing apparatus 1 of the present embodiment, the side of the gas phase reaction chamber 6 inside the chamber is a halogen-based gas on the side facing the chamber in the observation window for observing the inside of the chamber. Since it is covered with a transparent film made of a material having a high corrosion resistance against quartz, the quartz of the sight window is etched when the plasma cleaning process is performed using a halogen-based gas to clean the gas phase reaction chamber 6. Can be prevented. That is, it becomes possible to prevent the generation of reaction by-products due to the etching of the viewing window.

Further, in the case where a film-forming inhibitor which is generated during cleaning of the gas-phase reaction chamber 6 and remains in the gas-phase reaction chamber 6, the concentration of the film-forming inhibitor is reduced. As a result, it is possible to suppress the lag time until the start of film formation during the gas phase reaction, prevent the film thickness from varying, and improve the throughput (through put).

(8) According to the manufacturing apparatus 1 of the present embodiment, by arranging the structure between the wafer 9 and the target when, for example, sputtering tungsten in the sputtering chamber, the side wall of the fine connection hole is formed. It is possible to secure step coverage of 10% or more on both the bottom and the bottom as compared with the flat portion.

Therefore, it is possible to secure the film formation amount necessary for making the sputtered film thickness inside the connection hole a continuous film while keeping the film thickness of the sputtered film in the flat portion to the necessary minimum. it can. Therefore, when a tungsten film formed by the blanket CVD method is deposited on the wafer 9, tungsten fluoride, which is the material gas, is prevented from reaching the underlying wiring material such as silicon or aluminum alloy through the gap of the discontinuous film. be able to.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. Specifically, the present invention can be applied to a semiconductor integrated circuit device having various types of wiring structures, a method for manufacturing the same, and a manufacturing apparatus used for the same. Further, the manufacturing apparatus 1 of the present invention can be used for, for example, microfabricated products such as liquid crystal, and can be a manufacturing apparatus 1 in which various modes of processing chambers are connected to the transfer chamber as needed.

[0190]

The effects obtained by the typical ones of the inventions disclosed in this application will be briefly described as follows.
It is as follows.

(1) According to the semiconductor integrated circuit device of the present invention, a wiring layer including a connection hole formed in the insulating film and a plurality of conductive films provided on the surface of the insulating film near the connection hole is provided. In a semiconductor integrated circuit device having: a film thickness of at least one conductive film of a plurality of conductive films forming a wiring layer in a connection hole is larger than a film thickness of a surface of an insulating film near the connection hole. When the wiring layer is thick, the wiring layer can be completely embedded in the connection hole, so that the reliability of the electrical connection of the wiring layer in the region of the connection hole can be increased and the electrical characteristics can be excellent.

In addition, the film thickness of at least one conductive film of the plurality of conductive films forming the wiring layer in the connection hole is
A film of the conductive film provided on the surface of the insulating film even if the resistance value of the conductive film is relatively high because it is thicker than the film thickness on the surface of the insulating film near the connection hole. Since the thickness can be reduced, even when the conductive film as the wiring layer is formed simultaneously in the connection hole, the increase in the combined resistance value of the plurality of conductive films in the wiring layer is suppressed. be able to.

(2) According to the method of manufacturing a semiconductor integrated circuit device of the present invention, the step of forming the first conductive film on the surfaces of the insulating film and the connection hole, and the first step formed on the semiconductor substrate. By including one of a heat treatment step of performing heat treatment on the conductive film in a gas atmosphere and a plasma treatment step of performing plasma treatment, the first conductive film as a base adhesion film is formed on the second conductive film. Impurity atoms and molecules adsorbed on the surface of the conductive film can be removed to expose the clean surface.

Further, it is possible to remove the impurity atoms and molecules adsorbed on the surface of the first conductive film and generate dangling bonds to activate the surface of the first conductive film.

Further, the surface-altered layer formed by the reaction of the surface of the first conductive film with the substance in the atmosphere can be removed, or the first state in the original state in which the surface-altered layer is not formed can be removed. It can be returned to the conductive film.

If the first conductive film is made to react with a conductive material such as a semiconductor substrate on which a semiconductor element is formed or a lower layer film under the first conductive film, tungsten on silicon in the semiconductor substrate may be used. A novel reaction layer such as tungsten silicide can be formed at the interface.

Further, it is possible to prevent the crystal grains from agglomerating due to the crystal growth when the first conductive film as the base adhesion film is formed. Further, a new reaction layer can be formed by causing a reaction with an underlying substance such as a semiconductor substrate when forming the first conductive film as the underlying adhesion film.

Further, a film suitable for suppressing an excessive reaction gas from reaching the entire inside of the connection hole during the subsequent gas phase reaction, for example, reaching the lower layer of the connection hole, for example, the semiconductor substrate or the wiring layer as the lower layer film. The seed can form the first conductive film as a base adhesion film having a necessary and sufficient thickness.

Therefore, it is possible to suppress an excessive reaction gas from reaching the lower layer of the connection hole, for example, the semiconductor substrate or the wiring layer at the time of the vapor phase reaction when the conductive film is formed by the CVD method after that, and the contact resistance and It is possible to prevent an increase in resistance in the wiring layer in the connection hole.

Further, by using hydrogen in the heat treatment step or the plasma treatment step, hydrogen can be dissociated and adsorbed on the surface and the grain boundary portion of the first conductive film as the underlying adhesion film. As a result, it is possible to prevent excess reaction gas from reaching the lower semiconductor substrate or the wiring layer during the subsequent gas phase reaction, and to prevent the contact resistance and the resistance of the wiring layer in the connection hole from increasing.

(3) According to the method of manufacturing a semiconductor integrated circuit device of the present invention, the steps of forming the first conductive film include:
For example, a sputtering method in which a wafer such as a semiconductor substrate is cooled, a sputtering method in which the wafer is kept at a high temperature, and a structure for controlling the directivity of sputtered particles between the wafer and a target material are provided. A second conductive film is formed thereafter by a step of forming the first conductive film by a sputtering method using a provided manufacturing apparatus or a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas. The gas used for the CVD film passes through the sputtered film as the first conductive film,
It is possible to prevent reaction with the wiring material such as silicon or aluminum alloy in the lower layer.

That is, for example, by performing sputtering in a state in which a wafer such as a semiconductor substrate is cooled, crystal growth of target particles incident on the wafer on the wafer is prevented, and agglomeration of crystal particles accompanying the crystal growth of the particles. Can be prevented, and a gap can be prevented from opening between the crystal grains.

Further, by performing sputtering in a state where the wafer is kept at a high temperature, the target particles incident on the wafer react with the semiconductor substrate or the lower layer film underlying the target particles in the wafer, for example, tungsten on silicon. Then, a new reaction layer such as tungsten silicide can be formed at the interface.

Further, in addition to the above-mentioned cooled state of the wafer, the sputtering method by the manufacturing apparatus in which the structure for controlling the directivity of the sputtered particles is provided between the target material and the wafer, the connection hole is formed. The first conductive film having a necessary and sufficient thickness can be deposited on the entire inside.

In addition, a fine and high aspect ratio can be obtained by forming a first conductive film such as a titanium nitride film by a chemical vapor deposition method using a metal halide or an organic metal and a reducing gas. Even with a contact hole having a specific ratio, the first conductive film having a sufficient thickness can be deposited in the contact hole.

(4) According to the method for manufacturing a semiconductor integrated circuit device of the present invention, the film thickness at the flat portion of a conductive film such as a metal film having a relatively high resistance used for forming a connection hole is smaller than that in the prior art. It is possible to reduce the thickness, and it is possible to suppress an increase in the combined resistance value of the laminated film in the wiring layer portion having the conductive film when the connection hole and the conductive film are simultaneously formed.

(5) According to the semiconductor integrated circuit device manufacturing apparatus of the present invention, each chamber is connected through a gate valve, and a wafer such as a semiconductor substrate is loaded into and unloaded from each chamber as needed. It has a transfer chamber that is a mechanical part, and the transfer chamber is connected to a vacuum pump capable of reducing the pressure inside the load lock chamber, and the load lock chamber is connected to a vacuum pump capable of reducing the pressure inside the load lock chamber. The step of forming the second conductive film on the surface of the first conductive film in the vapor phase reaction chamber after forming the first conductive film in the sputtering chamber, and loading or unloading the wafer into or from each chamber. Since it can be performed in a reduced pressure state before being carried out and without being exposed to the atmosphere, impurities can be prevented from being adsorbed on the surface of the first conductive film before the formation of the second conductive film.

Further, the interfaces between different kinds of conductive films such as the first conductive film and the second conductive film can be prevented from reacting nonuniformly under the influence of oxygen or nitrogen contained in the atmosphere.

When a semiconductor integrated circuit device or the like is manufactured by applying the manufacturing apparatus of the present invention, connection holes and wiring layers can be formed at the same time, and unstable elements can be reduced by simplifying the process. . Also, semiconductor integrated circuit devices of various aspects can be manufactured by using a simple manufacturing process which is effective for shortening TAT.

(6) According to the apparatus for manufacturing a semiconductor integrated circuit device of the present invention, the process of forming the wiring layer forming the laminated wiring structure of the conductive film is under a depressurized state or an inert gas atmosphere without opening to the atmosphere. Since it is performed by each chamber connected by the transfer chamber, it is possible to prevent the conductive films of the plurality of conductive films from reacting non-uniformly. Can be suppressed.

Further, according to the manufacturing apparatus of the present invention, in the manufacturing apparatus 1 equipped with the sputtering chamber and the gas phase reaction chamber when the conductive film is formed by the gas phase reaction method such as the sputtering method and the blanket CVD method, Load lock room 2
By keeping the transfer chamber 7 and the transfer chamber 7 in a depressurized state, it is possible to prevent the surface from being oxidized by oxygen or to form an interface impurity layer due to physically adsorbed contaminant molecules, and to maintain the cleanliness of the wafer surface after the sputtering film is formed. .

(7) According to the semiconductor integrated circuit device manufacturing apparatus of the present invention, the side facing the chamber in the side surface of the chamber in the gas phase reaction chamber is a halogen-based side facing the chamber in the observation window for observing the inside of the chamber. Since it is covered with a transparent film made of a material having a high corrosion resistance to the gas, the quartz of the viewing window is etched when plasma cleaning is performed using a halogen-based gas to clean the gas phase reaction chamber. Can be prevented. That is, it becomes possible to prevent the generation of reaction by-products due to the etching of the viewing window.

Further, when there is a film-forming inhibitor that is generated during cleaning of the gas-phase reaction chamber and remains in the gas-phase reaction chamber, it is possible to reduce the concentration of the film-forming inhibitor. It is possible to suppress the lag time until the start of film formation during the gas phase reaction, prevent variations in film thickness, and improve throughput.

(8) According to the manufacturing apparatus of the present invention, when sputtering tungsten, for example, in the sputtering chamber, by arranging a structure between the wafer and the target, the side wall and the bottom surface of the fine connection hole can be formed. It is possible to secure step coverage of 10% or more as compared with the flat portion.

Therefore, it is possible to secure a film formation amount necessary for making the sputtered film thickness inside the connection hole a continuous film while keeping the film thickness of the sputtered film in the flat portion to a necessary minimum. it can. Therefore, when depositing a tungsten film formed by the blanket CVD method on a wafer, it is possible to prevent tungsten fluoride, which is a material gas, from reaching the underlying wiring material such as silicon or aluminum alloy through the gap of the discontinuous film. You can

[Brief description of drawings]

FIG. 1 is a schematic plan view showing a structure in which an upper portion of a manufacturing apparatus according to an embodiment of the present invention is removed.

FIG. 2 is a cross-sectional view showing a sputtering chamber in a manufacturing apparatus that is an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 9 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 10 is a process diagram showing a manufacturing process of forming a wiring layer in a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 11 is a graph showing the relationship between the gas concentration of nitrogen oxide remaining in the gas phase reaction chamber and the film formation delay time of the tungsten film.

FIG. 12 is a graph showing a relationship between an aspect ratio of a connection hole and a conduction yield of a contact chain with or without hydrogen heat treatment before a gas phase reaction treatment as a parameter.

FIG. 13 is a graph showing the relationship between the heat treatment time and the rate of increase in wiring layer resistance when a laminated film of tungsten and an aluminum alloy is heat treated.

FIG. 14 is a graph showing the relationship between the film formation delay time up to the start of film formation due to a gas phase reaction when hydrogen plasma treatment is performed and when hydrogen plasma treatment is not performed.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Manufacturing equipment 2 Load lock chamber 3 Pretreatment chamber 4 Sputtering chamber 4a Wafer stage 4b Gas introduction pipe 4c Target 4d Structure 5 Sputtering chamber 6 Gas phase reaction chamber 6a Viewing window 6b Transparent film 6c Transparent film 6d Chamber 7 Transfer chamber 7a Transfer Arm 8 Gate valve 9 Wafer 10 Well region 11 Well region 12 Field insulating film 13 Gate insulating film 14 Gate electrode 15 Diffusion layer 16 Sidewall 17 Insulating film 18 Connection hole 19 Conductive film 20 Conductive film 21 Conductive film 22 Conductive film 23 First Wiring layer 24 insulating film 25 SOG film 26 insulating film 27 interlayer insulating film 28 connection hole 29 connection hole 30 conductive film 31 conductive film 32 conductive film 33 conductive film 34 second wiring layer 35 surface protective film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 21/285 C (72) Inventor Shinro Owada 2326 Imai, Ome City, Tokyo Hitachi, Ltd. Device Development In the center (72) Inventor Naoki Fukuda 2326 Imai, Ome-shi, Tokyo Hitachi, Ltd. Device Development Center

Claims (9)

[Claims] 1. A semiconductor substrate provided with a semiconductor element, an insulating film provided on the semiconductor substrate, a connection hole provided in a selective region of the insulating film, the connection hole, and A semiconductor integrated circuit device having a wiring layer made of a plurality of conductive films provided on the surface of the insulating film in the vicinity of the connection hole, wherein at least one of the conductive films constituting the wiring layer is formed. The semiconductor integrated circuit device according to claim 1, wherein a film thickness of one conductive film in the connection hole is thicker than a film thickness of a surface of the insulating film near the connection hole. 2. A step of forming a semiconductor element on a semiconductor substrate, a step of forming an insulating film on the semiconductor substrate, a step of forming a connection hole in a selective region of the insulating film, the insulating film and Forming a first conductive film on the surface of the connection hole; and forming the first conductive film on the semiconductor substrate.
Performing either one of a heat treatment process of performing heat treatment on the conductive film in a gas atmosphere or a plasma treatment process of performing plasma treatment; and a second process on the semiconductor substrate on which the first conductive film is formed. Forming a conductive film, wherein the film thickness of the second conductive film inside the connection hole is thicker than the film thickness on the surface of the insulating film in the vicinity of the connection hole. A method of manufacturing a semiconductor integrated circuit device, comprising: 3. The method for manufacturing a semiconductor integrated circuit device according to claim 2, wherein the step of forming the second conductive film comprises:
A semiconductor integrated circuit characterized by a step of forming the second conductive film by a chemical vapor deposition method using a reducing gas containing a metal halide and silicon or a hydrogen gas as the metal halide and a reducing gas. Device manufacturing method. 4. The method of manufacturing a semiconductor integrated circuit device according to claim 2, wherein the step of forming the first conductive film is a sputtering method in a state in which the semiconductor substrate is cooled, and the semiconductor substrate is heated to a high temperature. In the state of being held in the state of, the sputtering method by a manufacturing apparatus provided with a structure for controlling the directivity of sputtered particles between the semiconductor substrate and the target material or metal halide or organic metal and reduction A method of manufacturing a semiconductor integrated circuit device, comprising the step of forming the first conductive film by a chemical vapor deposition method using a gas. 5. A semiconductor integrated circuit device having a load lock chamber, a pretreatment chamber for pretreating a wafer, a sputtering chamber for performing a sputtering process on a wafer, and a vapor phase reaction chamber for performing a vapor phase growth process on a wafer. The manufacturing apparatus of, wherein the chamber is provided with a transfer chamber which is connected to each of the chambers through a gate valve and is a mechanism unit for loading or unloading the wafer as needed, and the load lock chamber stores the wafer. A mechanism portion for introducing the wafer into the manufacturing apparatus and carrying out the series of processes to the outside of the manufacturing apparatus, and is connected to a vacuum pump capable of reducing the pressure inside the load lock chamber, A vacuum pump capable of reducing the pressure inside the transfer chamber is connected to the transfer chamber. 6. The apparatus for manufacturing a semiconductor integrated circuit device according to claim 5, wherein the sputtering chamber has a wafer stage on which the wafer can be set, and the wafer stage has a temperature adjusting mechanism capable of adjusting the temperature of the wafer. And a semiconductor integrated circuit device manufacturing apparatus. 7. The semiconductor integrated circuit device manufacturing apparatus according to claim 5, wherein the sputtering chamber has a structure having a through hole between the wafer and a target in a direction substantially perpendicular to the wafer. An apparatus for manufacturing a semiconductor integrated circuit device, which can be arranged as needed. 8. The apparatus for manufacturing a semiconductor integrated circuit device according to claim 5, 6 or 7, wherein the gas-phase reaction chamber is at least one of a heat treatment or a plasma treatment under a reduced pressure atmosphere of gas as necessary. An apparatus for manufacturing a semiconductor integrated circuit device having a structure capable of performing processing. 9. The manufacturing apparatus of a semiconductor integrated circuit device according to claim 5, 6, 7 or 8, wherein the vapor phase reaction chamber is
A side surface in the chamber has a peep window for observing the inside of the chamber, and the side of the peep window facing the chamber is covered with a transparent film made of a material having high corrosion resistance to halogen-based gas. A manufacturing apparatus for a characteristic semiconductor integrated circuit device.