JPH08111472A - Pin grid array type package - Google Patents

Abstract

(57) [Abstract] [Purpose] Providing improved electrical characteristics such as reduction of conduction resistance and inductance of PGA package and effective transfer of heat to printed circuit board to improve heat dissipation while maintaining reliability. To do. [Structure] A semiconductor chip (12) is mounted on a ceramic PGA package (11), connected by a wire (13), and sealed by a cap (14). And in a pin grid array type package having a plurality of such external pins on one side of the PGA package (11),
Among the external pins (15) arranged in a lattice, the thick external pins (15a) are arranged inside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pin grid array type package, and more particularly, to a pin grid array type package (hereinafter referred to as "PGA package") in which external pins are arranged in a grid in a semiconductor device package. Is.

[0002]

2. Description of the Related Art Pin grid array type packages (PG
In the A package), many external pins are formed by arranging the external pins on one surface of the package in a grid pattern. With the conventional PGA package, the actual development number is 59-237.
As shown in Japanese Patent Publication No. 47, a plurality of external pins having the same pin diameter are arranged in the package. As an example,
Figure 2 shows the schematic features of the conventional surface mount PGA package.
Shown in The PGA package (1) houses the semiconductor chip (2) inside and is electrically connected by the wire (3). Further, the semiconductor chip (2) is mechanically and environmentally protected by being sealed by the cap (4). Surface mount PGA package (1)
Is mounted by connecting external pins (5) arranged on one side of the package to a printed circuit board (6) with solder (7).

The external pin in FIG. 2 has a diameter of 0.2 mm.
Made of gold-plated Kovar alloy in the shape of an elongated cylinder with a length of 2.0 mm, and a ceramic PGA package (1)
Is joined to the bottom surface of the board by brazing and is connected to the printed circuit board by solder (7). The external pin (5 which is a typical external pin of the PGA package of FIG.
The conduction resistance of a) is 120 mΩ and the inductance is 4 nH.
And the thermal resistance of the package in the windless state is 30 ° C.
/ W was not satisfactory. On the other hand, conventionally, it is difficult to thicken all the external pins of the surface mount PGA package because of the stress relaxation due to the difference in thermal expansion between the package and the printed circuit board and the freedom of wiring formation on the surface of the printed circuit board. Met.

[0004]

In recent years, as semiconductor chips have become faster and more powerful, PGA packages have been required to have reduced conduction resistance and inductance and improved heat dissipation. However, the conventional surface mount PGA package has thin and long external pins having the same diameter on the entire surface, which is one of the factors that hinder the reduction of conduction resistance and inductance. Conventionally, the diameter of the outer pin is generally 0.2 mm. On the other hand, making all the external pins thicker increases the rigidity of the pins,
It was difficult to thicken the outer external pins because stress destruction of the solder joints occurs due to the difference in thermal expansion between the ceramic PGA and the printed circuit board. In addition, it is difficult to make all the external pins thick in order to form wiring on the surface of the printed wiring board.

[0005]

The present invention is characterized in that, in a pin grid array type package in which external pins are arranged in a grid on one side surface of the package, thick pins are arranged inside the package near the center thereof. It is a pin grid array type package. Further, the present invention is a pin grid array type package characterized in that the thick pins arranged on the inner side close to the center of the package are applied to external pins of a power supply system which require low conduction resistance and inductance.

[0006]

In the present invention, a PG having a plurality of external pins
Among the external pins arranged in a grid in the A package, a thick external pin is arranged inside the package close to the center of the package. The thick external pin on the inside of the package makes it possible to reduce electrical resistance and inductance. It can be improved. Further, in the present invention, it is effective to apply the thick inner external pin to the external pin of the power supply system that requires particularly low conduction resistance and inductance.

Further, in the present invention, the thick external pins arranged inside can effectively transfer the heat generated from the semiconductor chip to the printed circuit board including the copper wiring having high thermal conductivity, as compared with the conventional PGA package. The heat dissipation is also improved. The pin grid array type package can be either insert type or surface mount type,
This is particularly effective for surface mount PGA packages.
The thick external pin is characterized by being thicker than the conventional thin external pin. The printed circuit board may have a single-layer or multi-layer structure in which copper wiring having high thermal conductivity is formed on the surface or inside.

[0008]

Next, the present invention will be described with reference to the drawings. 1A and 1B are views showing an embodiment of a pin grid array type package of the present invention, which is a sectional view of a surface mount type PGA. The semiconductor chip (12) is a ceramic PG
After mounting on the A package (11), the wire (1
3) and the cap (14) is sealed in the same manner as in FIG. 2 of the conventional example. PGA package (1
External pin (15) of 1) is printed circuit board (16)
It is connected with the solder (17). The diameter of the thick external pin (15a), which is a feature of the present invention, is 0.4 mm, which is doubled from the conventional diameter of 0.2 mm, and the cross-sectional area is also increased four times.

As a result, the typical external pin (5a) of FIG.
The conduction resistance of the thick external pin (15a) at the same position as in FIG. 1 was 90 mΩ, and the inductance was 3 nH, which were significantly reduced from the conventional values. Furthermore, the thermal resistance of the package in the windless state is 25 ° C / W, which is 30 ° C / W in the case of the conventional Fig. 2.
It was reduced more. On the other hand, the diameter of the outer external pin is 0.2 mm, which is the same as in FIG. 2, and the reliability of the connection portion between the external pin and the printed circuit board is kept the same.

[0010]

As described above, according to the present invention,
By arranging the thick pins inside the PGA package external pins arranged in a grid pattern, there is an effect of improving electrical characteristics such as reduction of conduction resistance and inductance of the package. Furthermore, the thick external pins arranged inside also have an effect of efficiently transmitting the heat generated from the semiconductor to the printed circuit board. Since the electric characteristics and the heat dissipation characteristics can be improved only by making the inner external pins thick, the performance improvement of the surface mount PGA package can be provided at a low cost.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of a pin grid array type package of the present invention.

FIG. 2 is a diagram showing a conventional pin grid array type package.

[Explanation of symbols]

 1. PGA package 2. Semiconductor chip 3. Wire 4. Cap 5. External pin 5a. External pin 6. Printed circuit board 7. Solder 11. Ceramic PGA package 12. Semiconductor chip 13. Wire 14. Cap 15. External pin 16. Printed circuit board 17. Solder

Claims (2)

[Claims] 1. A pin grid array type package in which external pins are arranged in a grid pattern on one side surface of the package, wherein a thick pin is arranged on the inner side near the center of the package. 2. The pin grid array type package according to claim 1, wherein the thick pins arranged on the inner side close to the center of the package are applied to the external pins of the power supply system which require low conduction resistance and inductance. .