JPH0795225B2 - Matrix display panel drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a drive circuit for a matrix display panel,
A push-pull driver having at least two types of power supply terminals was connected to each scanning electrode, and one of the power supply terminals was superposed on the reference voltage and the other power supply terminal was superposed on the reference voltage during the write drive section of the display cell. It is configured to apply a scanning signal voltage, and the voltage difference applied between the power supply terminals is reduced to reduce the breakdown voltage of the push-pull driver to achieve cost reduction and a selective scanning voltage panel for each frame. It is possible to stabilize the panel characteristics by driving to reverse the polarity of.

In addition, an element or a circuit that suppresses application of a voltage equal to or higher than a predetermined value is connected between the power supply terminals of the push-pull driver, and the relationship between the predetermined value, the data signal voltage, and the scan signal voltage is defined to reduce power consumption We are trying to reduce.

[Industrial application field]

The present invention relates to a driving circuit for a matrix display panel, particularly a thin film electroluminescence panel.

Matrix display panels, especially thin-film electroluminescence panels (hereinafter referred to as EL panels), are expected to be applied to the display parts of OA equipment terminals, personal computers, etc. Long-term reliability including longevity is required.

[Conventional technology]

FIG. 6 is a block diagram of a conventional drive circuit, and FIG. 7 is a conventional drive waveform diagram.

In FIG. 6, the EL panel 1 includes a plurality of data electrodes D1 ...
Dm and scan electrodes S1 to Sn are arranged in a grid pattern, and a display cell (not shown) is formed at each intersection.

The driving circuit for driving these display cells is the data electrode D1.
~ Data signal generation circuit 2 for supplying data pulse to Dm
And a scan signal generating circuit 3 for supplying a scan pulse and a refresh pulse to the scan electrodes S1 to Sn.

The data signal generating circuit 2 is composed of N-channel and P-channel FET push-pull drivers 4-1 to 4-m and a DC power supply 5 of the push-pull drivers 4-1 to 4-m.

Further, the scanning signal generating circuit 3 includes switches 3-2, 3-3 for turning on / off the negative high voltage (-165V) power source 3-1 and its distribution.
And a switch 3-5 for turning on / off the positive high voltage (+ 215V) power supply 3-4 and its supply and pull-on driver for outputting the negative and positive high voltages to the respective scan electrodes S1 to Sn
It consists of 6-1 to 6-n.

The operation of the circuit configured as described above will be described with reference to the drive waveform diagram of FIG.

First, in the writing drive period, the switches 3-3 and 3- of FIG.
5 off, switch 3-2 on, negative high voltage power supply
Since -165V is input to the sources of pull-only drivers 6-1 to 6-n from 3-1, scanning is performed by the scan control signal externally input to the control electrodes E of the drivers 6-1 to 6-n. A scanning pulse Vs of −165 V as shown in the seventh part (b) to (d) is sequentially applied to the electrodes S1, S2 ... Sn.

When the switches 3-2 and 3-3 are turned off and the switch 3-5 is turned on in the next refresh period, + 215V from the positive high voltage power source 3-4 becomes the source of the pull-on drivers 6-1 to 6-n. Since they are input, a refresh control signal externally input to the control electrodes E of the drivers causes the scan electrodes S1, S2, ... Sn to have the types shown in FIGS. 7 (b) to 7 (d). , 215V refresh pulses b1, c1, d1 are applied all at once.

The switches 3-2, 3-3, 3-5 are turned on and off in accordance with a predetermined timing of a switch switching signal input from the outside, and the refresh pulse (+ 215V), scan pulse (-165V), ground level. Is getting

On the other hand, the data signal generation circuit 2 receives the data pulse VD (+50) shown in FIG.
Scan pulse Vs to the selected electrode Di on the data electrode side
And output in synchronization with.

7 (e) to (g) show data electrodes Di and scan electrodes S1, S.
2 ... Sn shows a cell drive waveform applied to the selected display cell, and the combined voltage of the scan pulse Vs and the data pulse VD is applied to the selected display cell as the write pulse e1, f1, g1. The selected display cell thus emits light.

After this address driving is completed, a refresh pulse (b1, c1, d1 in FIGS. 7 (b) to (d) of FIG. 7) having a positive high voltage (+ 215V) having a polarity opposite to that of the address pulse is applied to all scan electrodes. By doing so, the selected display cell emits light again.

With both of the above driving, the AC driving of one frame is completed,
By repeating this operation, the selected display cell emits light with a predetermined brightness.

[Problems to be solved by the invention]

The above-mentioned conventional drive circuit has a driver configuration in which a push-pull driver is connected to the data electrode side and a pull-only driver is connected to the scan electrode side, which requires two types of drivers. In addition, the scan pulse VS (-is applied between the source and drain of the pull-only drivers 6-1 to 6-n on the scan electrode side.
165V) and the data voltage VD (+ 50V) applied via the capacitance between the scan electrode and the data electrode, a voltage of 215V is applied, so that the pull-on drivers 6-1 to 6-n have 215V or more. Withstand voltage is required, it is necessary to use high withstand voltage IC,
It contributes to the cost increase.

In addition, VM in FIGS. 7 (e) to 7 (g) is a positive half-select voltage generated by the data pulse VD applied to the i-th data electrode during the write drive period of the drive waveform. Is always applied to each display cell of the panel with the same polarity for each frame, and becomes a steady DC bias component, so that there is a problem that the characteristics of the panel are changed to shorten the life.

The present invention has been made in view of the above circumstances, and makes it possible to operate a drive circuit for scan electrodes with a low breakdown voltage, and further to provide a drive circuit that does not generate a half-select voltage with a biased polarity. Has an aim.

[Means for solving problems]

FIG. 1 is a principle block diagram of a drive circuit of the present invention. A push-pull driver 7 having at least two kinds of power supply terminals 15 and 16 is connected to a scan electrode S of a display panel. Of the drive voltage generation circuits A and B to the power supply terminal 15 and the second power supply terminal 16, respectively, one of the drive voltage generation circuits is at least the reference voltage, and the other drive voltage generation circuit is superposed on at least the reference voltage. The push-pull driver applies a composite voltage of the reference voltage and the scan signal voltage to the scan electrode as a drive voltage.

[Action]

In the write drive section, the push-pull driver 7 is driven by driving the first and second drive voltage generating circuits A and B, respectively.
Drive voltages are supplied to the first power supply terminal 15 and the second power supply terminal 16, and these drive voltages are used as scanning pulses synthesized from the output end of the push-pull driver 7 that is selectively driven. The voltage is applied to the selective scan electrode S.

This reduces the voltage difference between the first power supply terminal 15 and the second power supply terminal 16 of the push-pull driver 7,
The withstand voltage of the push-pull driver 7 is reduced.

〔Example〕

FIG. 2 is a block diagram of a drive circuit according to an embodiment of the present invention, and FIG. 3 is a drive waveform diagram thereof.

In FIG. 2, the drive circuit of this embodiment is the display panel 1
Push-pull driver for each scan electrode S1 to Sn
7-1 to 7-n are connected, and the first power supply terminal 15 of the drivers 7-1 to 7-n is connected to the first reference voltage generating circuit 8 which constitutes the first drive voltage generating circuit A. A first refresh panel generating circuit 13 and a first scanning signal generating circuit 10, and a second power supply terminal 16 which constitutes the second drive voltage generating circuit B and a second reference voltage generating circuit 9 and The second refresh pulse generating circuit 14 and the second scanning signal generating circuit 11 are connected to each other.

The first reference voltage generating circuit 8 has a positive power source 8-1 (+ 190V) and a switch 8-2, and the second reference voltage generating circuit 9 has a negative power source 9-1 (-165V) and a switch. 9-2 is provided.

The first refresh pulse generation circuit 13 has a positive power supply 13-1.
(+ 190V) and a switch 13-2 are provided, and the second refresh pulse generation circuit 14 includes a negative power source 14-1 (-190V).
V) and switch 14-2 are provided.

The first and second scanning signal generation circuits 10 and 11 are power supplies for obtaining a predetermined scanning pulse, for example, the first scanning signal generation circuit 10 has -190V power supply 10-1 and -165V power supply 10-2. And a switch 10-3 for switching between both power supplies, and the second scanning signal generating circuit 11 is provided with a + 215V power supply 11-1 and a + 190V power supply 11-2, and a switch 11-3 for switching between both power supplies. .

Further, a Zener diode for protecting the driver by suppressing application of a voltage of a predetermined value or more between the first power supply terminal 15 and the second power supply terminal 16 of the push-pull drivers 7-1 to 7-n. 12 connected.

The operation of the drive circuit having the above configuration will be described with reference to the drive waveform diagram of FIG.

As shown in FIGS. 3B to 3D, in the write drive section of the first frame, first, when the switch 9-2 of the second reference voltage generating circuit 9 in FIG. A voltage of -165V is supplied to the second power supply terminal 16 of 7-1 to 7-n, and this is the push side P- of each driver.
The reference voltage VP (−1 is applied simultaneously to each scan electrode S1, S2, ... Sn through the forward diode built in the ch element.
65V) is formed.

After applying this reference voltage VP, turn off the switch 9-2,
The power supply terminal 16 of is set to a floating state. By this setting, it becomes possible to reduce the power consumption at the time of writing drive by the optimum setting of the operating voltage VZ of the Zener diode 12, as described later.

Following this, by a scan control signal input from the outside,
The switch 10-3 of the first scanning signal generation circuit 10 is set to -190V power supply.
When switched to the 10-1 side, the voltage of -190V is supplied to the first power supply terminal 15 of the push-pull drivers 7-1 to 7-n. At this time, the pull-side N-ch element of the first push-pull driver 7-1 is turned on by the scan control signal input from the outside at the same time.
By setting to N, the scanning signal voltage pulse VY is applied to the first scanning electrode S1 so as to be superimposed on the reference voltage Vp (-165V). The composite waveform of the reference voltage and the scanning signal voltage pulse corresponds to the scanning pulse.

After applying this scanning signal voltage pulse VY to the scanning electrode S1,
By switching the switch 10-3 to the −165V power source 10-2 side, the potential of the scan electrode S1 is restored to the original reference voltage Vp (−165V).

Similarly, by switching the switch 10-3 and sequentially turning on the pull-side N-ch elements of the push-pull drivers 7-2 to 7-n, the scanning signals S2 to Sn are applied to the scanning signals at the reference voltage. The scanning pulses in the form of superimposed voltage pulses are sequentially applied.

On the other hand, the data signal generating circuit 2 generates a data pulse VX (25V) having a polarity opposite to that of the scan pulse shown in FIG. 3A in response to the data control signal, and synchronizes the selected data electrode with the scan pulse. And apply.

FIGS. 3 (e) to 3 (g) show combined drive waveforms between the selected data electrode Di and each scan electrode S1, S2 ... Sn, in which the scan signal voltage pulse VY and the data are added to the reference voltage VP. The write pulses e1, f1, g1 in which the pulse VX is superimposed are sequentially applied to the selected display cells and sequentially emit the selected display cells.

After this write drive is completed, in the next refresh drive period, the switch 13-2 of FIG. 2 is alternately connected to the + 190V power supply 13-1 and the switch 14-2 is connected to the -190V power supply 14-1. + 190V and -19 as shown in Figures (a) to (d)
Alternating refresh pulse VR of 0V is applied to all scan electrodes S1 to Sn.
Are applied at the same timing and refresh driving is performed. This refresh driving causes the selected display cell to emit light again.

As described above, the driving of the first frame in which the negative reference voltage is applied, which is AC-driven, is completed. The AC driving is performed in the second frame after the positive reference voltage is applied.
Using the reference voltage generating circuit 8 and the second driving voltage generating circuit 11 and the push-side P-ch elements of the push-pull drivers 7-1 to 7-n, the same polarity as that of the first frame, that is, the positive polarity Create a sex signal and drive writing,
Further, the second and first refresh pulse generation circuits 14,1
The selected display cell is caused to emit light by performing refresh driving using 3.

With the above configuration, in the write drive section of each frame, the reference voltage and the scan signal of the same polarity are supplied to the first power supply terminal 15 and the second power supply terminal 16 of the push-pull drivers 7-1 to 7-n. The voltage pulse can be applied individually, and as a result, it is possible to reduce the voltage difference between both terminals and reduce the withstand voltage required for the push-pull driver.

Further, as described above, during the write drive period, each scan electrode is in a potential state corresponding to the reference voltage, and the polarity of the potential is reversed for each frame. Preventing fluctuations in panel characteristics To further explain the power consumption of the drive circuit, the operating voltage of the Zener diode is VZ, the breakdown voltage of the push-pull driver is Vcc, the scan pulse voltage is VY, and the data pulse voltage is VX.
In this case, in order to prevent the driver from being destroyed by being applied with a voltage higher than Vcc, VZ ≧ Vcc ··· (1) In consideration of power consumption, VY ≦ VZ ≦ VY + VX… (2) should be set. When VZ is set within the range shown in equation (2), the following difference occurs in power consumption during driving depending on the value of VZ.

When VZ = VY ... (3) It is the minimum value of VZ. At this time, as shown in FIG. 4A, the scanning electrode potential cannot follow the potential variation ΔVXm of the average value VXm of all the data electrodes due to the change of the data pulse application state (the number of applied lines) to all the data electrodes (clamp state. Therefore, the power consumption increases as the number of data pulses applied increases.

In the case of VY <VZ <VY + VX (4) As shown in FIG. 4 (b), since the scanning electrode potential can follow the potential variation ΔVXm of the data electrode by the value of VZ−VY, the power consumption is reduced accordingly. Can be lowered.

When VZ = VY + VX: (5) It is the maximum value of VZ. At this time, as shown in FIG. 4 (c),
Since the scanning electrode potential can completely follow the data electrode potential variation ΔVXm, the power consumption has a maximum at 50% lighting, and decreases in other cases.

From the above equations (3) to (5), it is desirable to set VZ as high as possible so as to approach the equation (5) from the viewpoint of reducing power consumption.

On the other hand, VZ needs to be set to be equal to or lower than the withstand voltage of the scan driver according to the above equation (3), and thus is set to be as high as possible within the withstand voltage of the scan side driver.

In the following embodiments, the VZ is realized by the Zener diode 12, but other than this, a varistor or a constant voltage power supply may be used, and further, FIG.
As shown in (c), a capacitor may be connected in parallel to the constant voltage element or a resistor may be connected in series, or the constant voltage element may be mixed with a constant voltage power source.

In the present invention, the switch 8-of the reference voltage generating circuit
Although 2 and 9-2 have been described to be turned on only when the reference voltage waveform VP rises, the present invention is not limited to this, and the ON operation may be continued during the application of the operation pulse. However, in this case, the power consumption is as shown in FIG. Further, the case where the refresh pulse train for improving the brightness is applied at the end of the frame has been described in detail, but if the low cost of the drive circuit and the long life of the panel, which are the original purpose of the present invention, can be achieved, the refresh is performed. It is also possible to eliminate the application of pulse trains.

〔The invention's effect〕

As described above, according to the present invention, it is possible to reduce the cost of the driving circuit and prolong the life of the panel, and set the power consumption during panel driving as low as possible by the scan-side push-pull driver having a limited withstand voltage. It becomes possible to do.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the drive circuit of the present invention, FIG. 2 is a block diagram of the drive circuit of an embodiment, FIG. 3 is a drive waveform diagram of the embodiment, and FIGS. 4 (a) to 4 (c). Is a power consumption diagram of the drive circuit, FIGS. 5A to 5C are modified configuration diagrams of the constant voltage circuit, FIG. 6 is a block diagram of a conventional drive circuit, and FIG. 7 is a conventional drive waveform diagram. . In the figure, 1 is an EL panel, 2 is a data signal generation circuit,
3 is a scanning signal generating circuit, 3-1 is -165V power supply, 3-2,3-3,3-
5,8-1,9-2,10-3,11-3,13-2,14-2 are switches, 3-4 is +21
5V power supply, 4-1 to 4-m, 7-1 to 7-n are push-pull drivers,
5 are 50V and 25V power supplies, 6-1 to 6-n are pull-only drivers, 8 and 9 are reference voltage generation circuits, 8-1, 13-111-2 are + 190V power supplies, 9-1 and 10-2 are- 165V power supply, 10-1, 14-1 is -190V power supply, 1
1-1 is + 215V power supply, 10 and 11 are scanning signal generation circuits, 12 is a Zener diode, 13 and 14 are refresh pulse generation circuits, 1
5 is the first power supply terminal, 16 is the second power supply terminal, A, B
Indicates a drive voltage generating circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuo Aoki 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, Fujitsu Limited (72) Inventor Hisa Yamaguchi 1015 Kamedotachu, Nakahara-ku, Kawasaki, Kanagawa, Fujitsu Limited

Claims (3)

[Claims] 1. A display cell is formed at an intersection of a scan electrode and a data electrode arranged in a direction intersecting with each other, and when a driving voltage is applied to each of the scan electrode and the data electrode, the display cell at the intersection of the electrode is displayed. In a drive circuit of a matrix display panel to be in a state, a push-pull driver having at least two types of power supply terminals is connected to the scan electrodes, and a drive voltage generation circuit is connected to two power supply terminals of the push-pull driver, One drive voltage generation circuit outputs at least a reference voltage, and the other drive voltage generation circuit outputs a scanning signal voltage at least superposed on the reference voltage, and the push-pull driver outputs a combined voltage of the reference voltage and the scanning signal voltage. A drive circuit for a matrix display panel, which is applied as a drive voltage to scan electrodes. 2. Each of the two drive voltage generating circuits has a reference voltage generating circuit for outputting at least a reference voltage and a scan signal generating circuit for outputting a scan signal voltage superimposed on the reference voltage, and each drive voltage generating circuit. The reference voltage generating circuit and the scanning signal generating circuit in the circuit are driven so that the output relationship between the reference voltage and the scanning signal voltage individually output to the two power supply terminals of the push-pull driver is reversed for each frame, 2. The drive circuit for a matrix display panel according to claim 1, wherein the pull driver applies a composite voltage of the reference voltage and the scan signal voltage whose polarities are inverted for each frame as a drive voltage to the scan electrodes. 3. A matrix display panel according to claim 1, further comprising an element or a circuit connected between the two power supply terminals for suppressing a voltage application of a predetermined value or more. Drive circuit.