JPH076982A - Method for dividing thin-layer semiconductor substrate - Google Patents

Abstract

(57) [Summary] [Object] To provide a method for dividing a thin-layer semiconductor substrate, which can surely divide the substrate with a high yield. A method for dividing a thin-layer semiconductor substrate 11a in which a single-crystal silicon substrate 11 adhered to a transparent glass substrate 20 is thinned and divided into chips. A step of previously forming a groove 18 having the same depth as the depth of the through hole 17 in the region to be formed, and then the single crystal silicon substrate 1
1. A step of adhering a transparent glass substrate 20 to 1 and polishing the back surface of the single crystal silicon substrate 11, and a step of dicing the transparent glass substrate 20 at a position overlapping the groove 18 formed in the thinned single crystal silicon substrate 11a. A method for dividing a thinned semiconductor substrate, comprising:

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for dividing a thin semiconductor substrate, and more particularly to a method for dividing a thin semiconductor substrate for thinning and stacking the semiconductor substrates.

[0002]

2. Description of the Related Art In recent years, the degree of integration of semiconductor integrated circuits has increased fourfold over three years.
In M, the design rule is expected to be 1G integration degree of about 0.15 μm. However, these highly integrated circuits pose technical difficulties in all aspects of design, manufacturing, and inspection. For example, ROM, RAM, ALU, CPU, I
There is a 1-chip microcomputer including an I / O controller, etc., but as the number of integrated elements on 1 chip increases, the time required for designing increases, the manufacturing yield decreases, and the inspection time increases. Has become difficult.

Therefore, research and development for three-dimensionally bonding and laminating chips and wafers, rather than planar miniaturization, are being actively pursued.

When three-dimensionally adhering and laminating semiconductor substrates, the semiconductor substrates to be laminated are thinned in terms of miniaturization,
It is necessary to form a through hole through which a wiring for exchanging signals between the upper and lower semiconductor substrates is passed. To form a through hole, a hole to be a through hole is formed on the surface of the semiconductor substrate before thinning, a transparent glass substrate is adhered to the surface of the semiconductor substrate with an adhesive, and the back surface of the semiconductor is removed. A through hole is formed by polishing the bottom of the through hole.

Before stacking the thinned semiconductor substrate, the thinned semiconductor substrate must be divided into a desired size. In order to divide the thinned semiconductor substrate, , A method of dividing by dicing has been proposed.

FIG. 3A is a plan view showing a conventional single crystal silicon substrate, and FIG. 3B is a plan view showing a conventional single crystal silicon substrate having scribe lines formed by a dicing saw. 4 (a) to 4 (e) are schematic cross-sectional views showing the dividing step of the conventional single crystal silicon substrate, and show the cross section between BB 'shown in FIG.

First, a gate oxide film 102 is formed on a single crystal silicon substrate 101, a gate electrode 103 is formed on the gate oxide film 102, and further, on the gate electrode 103 and single crystal silicon on which the gate electrode 103 is not formed. The interlayer insulating film 104 is formed on the substrate 101, and the interlayer insulating film 1 is formed.
Electrode wiring 105 is selectively formed between the regions 04 to form the transistor 100. In addition, a through hole 107 having a thickness of 100 μm or more is formed for vertical electrode wiring, and a surface protective film 106 is selectively formed on the single crystal silicon substrate 101 (FIGS. 3A and 4A). .

On the entire front surface of the single crystal silicon substrate 101 thus formed, the hot melt wax 108 is used as an adhesive.
Is applied, and the transparent glass substrate 109 is bonded onto the single crystal silicon substrate 101 by the hot-melt wax 108 (FIG. 4).
(B)).

Next, the back surface of the single crystal silicon substrate 101 is polished to form a through hole 107a penetrating therethrough to form a thinned single crystal silicon substrate 101a (FIG. 4).
(C)).

In order to divide the thin-layered single crystal silicon substrate 101a into chips, a dicing saw 110 is used from the back surface of the thinned single-crystal silicon substrate 101a as shown in FIG.
As shown in (b), the scribe lines 110 are arranged in a grid pattern.
a is formed, and only the thinned semiconductor substrate 101a is cut (FIG. 4D).

After cutting the thin-layered single crystal silicon substrate 101a, the thinned single-crystal silicon substrate 1 is heated by melting the hot-melt wax 108 and further immersed in an organic solvent or the like.
01a is separated from the transparent glass substrate 109 to obtain a thin layer single crystal silicon substrate 101a as a chip (FIG. 4).
(E)).

[0012]

However, the above-mentioned method has the following problems.

(1) Thin layered single crystal silicon substrate 101a and transparent glass substrate 109 using hot melt wax 108
, The heat-melting wax 108 is softened or melted by frictional heat due to grinding (grinding) or polishing (lapping, polishing), and the adhesion is lowered, so that the thin single-crystal silicon substrate 101a becomes a transparent glass substrate. It comes off from 109.

(2) Thinned single crystal silicon substrate 101a
When the back surface is cut into chips by using the dicing saw 110, chips, cracks, and the like are generated around the dicing portion of the thinned single crystal silicon substrate 101a.

If the element portion of the single crystal silicon substrate 101 is chipped or cracked, it is difficult to align it with the lower layer semiconductor substrate at the chip edge when stacking, or the transistor 100 portion is destroyed. However, not only the yield is remarkably reduced, but also dust is generated, which makes it impossible to manufacture a normal device.

(3) Thinned single crystal silicon substrate 101a
Since the hardness of the transparent glass plate 109 is different from that of the transparent glass plate 109, the same dicing saw 110 is used, and the thinned single crystal silicon substrate 10 is used.
It is difficult to cut not only 1a but also the transparent glass substrate 109 continuously.

In the dicing saw 110, it is usually necessary to change the type of blade depending on the material to be cut, and if the blade is replaced, extra time is required, which causes an increase in cost.

Further, when the viscous hot-melt wax 108 is cut by the dicing saw 110, the blade is clogged and it becomes impossible to cut.

The present invention is a method invented in view of the above-mentioned problems, and an object thereof is to provide a method for dividing a thin-layer semiconductor substrate which can surely divide the substrate with a high yield.

[0020]

To achieve the above object, a method for dividing a thin layer semiconductor substrate according to the present invention is a thin layer semiconductor in which a semiconductor substrate adhered to a transparent glass substrate is made into a thin layer and divided into chips. In the method of dividing a substrate, in the step of forming a through hole, a step of previously forming a groove having the same depth as the depth of the through hole in a region that will be a dicing line of the semiconductor substrate, and then bonding the transparent glass substrate to the semiconductor substrate. And a step of polishing the back surface of the semiconductor substrate by dicing the transparent glass substrate at a position overlapping with a groove formed in the semiconductor substrate, and the thin semiconductor substrate described above. In the dividing method, a transparent ultraviolet curable resin is used as an adhesive agent for adhering the transparent glass substrate and the semiconductor substrate. And, in yet a method of dividing the thin layer semiconductor substrate described above, the through hole and said groove is characterized by formed by etching.

[0021]

According to the above method, a groove is formed at the same depth as the through hole in the step of forming the through hole, and the back surface of the semiconductor substrate is polished or ground to the bottom of the through hole and the groove. When the semiconductor substrate is divided, only the transparent glass substrate to which the thin-layer semiconductor substrate is bonded is aligned with the groove and the groove becomes a crack by dicing with a dicing saw, and the thin-layer semiconductor substrate is directly attached. It becomes possible to divide into chips in a stable state without dicing.

Further, in the above method, when a transparent UV-curable resin is used as an adhesive for adhering the transparent glass substrate and the thin-layer semiconductor substrate, a dicing saw is used to dice the transparent glass substrate. It becomes easy to align with the groove of the layer semiconductor substrate, and the thin layer semiconductor substrate can be accurately divided.

Further, in the above method, when the through hole and the groove are formed by etching, when dividing the thinned semiconductor substrate, the divided surface of the thinned semiconductor substrate has a smooth linear cross section. Therefore, alignment is facilitated and the semiconductor substrate is not damaged.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for dividing a thin layer semiconductor substrate according to the present invention will be described below with reference to the drawings.

FIGS. 1A to 1G are sectional views for explaining a dividing process of a thin semiconductor substrate according to an embodiment, and FIG. 2A is a semiconductor in which a scribe line is formed by a dicing saw. It is a top view of a board | substrate, (b) is a top view which showed the thin layer semiconductor substrate mounted and divided on the expander sheet | seat.

First, a MOS transistor is formed on the single crystal silicon substrate 11 according to a semiconductor manufacturing process. That is, a gate oxide film 12 is formed on a single crystal silicon substrate 11 having a diameter of 4 inches and a thickness of 525 μm, a gate electrode 13 is formed on the gate oxide film 12, and the gate electrode 1
3 and the single crystal silicon substrate 11 on which the gate electrode 13 is not formed, the interlayer insulating film 14 is formed, and the electrode wiring 15 is selectively formed between the interlayer insulating films 14. Further, a through hole 17 of 5 to 50 μm square for vertical electrode wiring and a groove 18 which is a scribe line of 50 to 100 μm width for chip separation are formed by a RIE (Reactive Ion Etching) method with a taper angle of 60 to 85 °. It is formed to a depth of ˜105 μm. At this time, the grooves 18 which are formed as scribe lines for chip separation are formed in a grid pattern at a certain fixed interval, as shown in FIG. Then the groove 18
A surface protective film 16 of SiN or the like is selectively formed on the other portions. (FIG. 1 (a)).

Next, a transparent ultraviolet curable resin 19 is applied on the entire surface, a transparent glass substrate 20 which is a supporting substrate is placed on the entire surface, and a uniform 10 to 50 μW /
Ultraviolet light U of cm ² is irradiated for 10 to 60 seconds to adhere the single crystal silicon substrate 11 as the base. The ultraviolet curable resin 19 is transparent, and the single crystal silicon substrate 11 can be seen through the transparent glass substrate 20, which is convenient in the subsequent steps, and has a characteristic that it does not soften or melt up to 150 ° C. Therefore, there is a degree of freedom in the subsequent heat treatment process (FIG. 1 (b)).

Next, by a mechanical polishing method (grinding) using a fixed diamond (diameter 20 μm or less) grindstone, 425 to 5 from the back surface of the single crystal silicon substrate 11.
Polishing to 15 μm is performed to obtain a thinned single crystal silicon substrate 11a having a thickness of 10 to 100 μm. At this time, the through hole 17 and the groove 18 simultaneously penetrate the thinned single crystal silicon substrate 11a.
A groove 18a penetrating with a is formed. In other words, the through hole 17a that penetrates serves as a vertical electrode wiring between the upper and lower semiconductor substrates, and the thin-layer single crystal silicon substrate 11 is formed by the through groove 18a having a smooth sidewall and a forward taper.
This means that a is divided into chips (FIG. 1 (c)).

Next, the adhesive 23 is applied to a thickness of 200 to 300 μm.
m of the chip expander sheet 25, and the thin-layer single crystal silicon substrate 11a is adhered on the expander sheet 25 coated with the adhesive 23. Then, the dicing saw 2 is aligned with the penetrating groove 18a which is a scribe line provided in the thin semiconductor substrate 11a.
1. A transparent glass substrate 2 obtained by cutting only the transparent glass substrate 20 by 1 to obtain the same shape as the thin-layer semiconductor substrate 11a.
0a is obtained (FIG. 1 (d)).

Next, the expander sheet 25 is pulled from the periphery of the wafer using a chip expander (not shown) to separate the ultraviolet curable resin 19 and obtain a divided chip. At this time, the thickness of the chip expander sheet 25 is as thin as 50 to 100 μm (FIG. 1 (e), FIG. 2 (b)).

Next, it is placed on a hot plate heated to 100 ° C. or lower to soften the adhesive 23, adsorb the surface of the cut transparent glass substrate 20a with vacuum tweezers, and apply the epoxy resin 22 to the lower semiconductor substrate 24. Are stacked at desired positions (FIG. 1 (f)).

Next, after the epoxy resin 22 is solidified at 150 ° C. or lower to bond the lower semiconductor substrate 24 and the thin-layer single crystal silicon substrate 11a to each other, the epoxy resin 22 is dipped in hot water or an organic solvent to cure the ultraviolet curable resin 19. Is melted and the cut transparent glass substrate 20a is released (FIG. 1 (g)). After this, the epoxy resin 22 under the through hole 17a penetrating through the through hole 17a for electrically connecting the thinned single crystal silicon substrate 11a and the lower semiconductor substrate 24.
Are removed by a method such as chemical etching or reactive ion etching, and the thin-layer single crystal silicon substrate 11a is removed.
A through hole (not shown) for electrically connecting the lower semiconductor substrate 24 and the lower semiconductor substrate 24 is formed.

As described above, according to the method for dividing a thin-layer semiconductor substrate according to the above-described embodiment, when the through hole 17 is formed, the groove 18 is formed at the same depth as the through hole 17 by etching. When the layered single crystal silicon substrate 11a is divided, the through groove 18a becomes a rift, so that the divided single crystal silicon substrate 11a can be divided without causing damage due to cracks or breaks. In addition, the transparent glass substrate 20a
Since the ultraviolet-curable resin 19 is used to bond the thin-film single-crystal silicon substrate 11a with the transparent glass substrate 2
When only 0 is cut with the dicing saw 21, it is possible to easily perform alignment with the penetrating groove 18a serving as the scribe line. Further, since the groove 18 is formed by etching, the cross section of the penetrating groove 18a has a smooth side surface, and a wiring may be formed between the upper and lower thinned single crystal silicon substrate 11a and the lower semiconductor substrate 24 using this side surface. It is possible. Further, since the side surface of the penetrating through hole 18a has a good straight line, the alignment with the lower layer semiconductor substrate 24 becomes easy.

In the conventional method, the semiconductor chip separated from the transparent glass substrate 109 by the organic solvent or the like is scattered in the organic solvent, is a thin layer, and is easily broken. The workability of was poor. In this embodiment, since the thinned single crystal silicon substrate 11a is adhered to the lower semiconductor substrate 24 and then the ultraviolet curable resin 19 is dissolved, the thinned single crystal silicon substrate 11a is scattered in the solvent and damaged. You can get rid of.

In the present invention, the through hole 17 and the groove 1 are provided.
8 is formed by the RIE method, but the method is not limited to this, and in addition to the above method, hydrofluoric acid / nitric acid type, KOH type or ammonia type (tetra-ethyl-ammonium-human oxidoxide:
The wet etching of the [(C ₂ H ₅ ) ₄ N] OH) aqueous solution similarly performed through holes 17 on the single crystal silicon substrate 11.
And scribe lines can be formed.

Further, in the above-mentioned embodiment, when performing the polishing, the mechanical polishing using the fixed diamond grindstone is performed, but the invention is not limited to this, and a method of polishing by pulverizing powdery diamond abrasive grains with water ( The thinned single crystal silicon substrate 11a can be similarly obtained by lapping) or a polishing method (polishing) using a cloth and an alkaline aqueous solution (generally colloidal silica is often used).

[0037]

As described above in detail, the following effects can be expected in the method for dividing a thin-layer semiconductor substrate according to the present invention.

(1) Since the ultraviolet curable resin that does not melt up to 150 ° C. is used as the adhesive, the thinned single crystal silicon substrate does not peel off from the transparent glass substrate, and the degree of freedom in the process increases.

(2) Since the dicing process for the thin-layered single crystal silicon substrate can be omitted, a thin-layer semiconductor chip can be manufactured without destroying the elements in the thinned single-crystal silicon substrate. It can be reduced.

(3) Since the semiconductor substrate is separated by etching, the side wall is very smooth, and by adjusting the angle arbitrarily, it is possible to form wiring between the upper and lower semiconductor substrates using the side wall of the chip.

Further, since it is not the non-linear side surface of the chip formed by dicing but the side surface of the linear chip, alignment with the alignment mark with the lower semiconductor substrate is facilitated during stacking.

(4) When a transparent glass substrate or a transparent ultraviolet curable resin is used, the transparent glass substrate is aligned by visually observing with an optical microscope or the like to the groove provided in the thinned single crystal silicon substrate. Easy to cut.

(5) Similar to the conventional method, the thin-layer semiconductor substrate, which is weak in strength, can be easily divided by one-time dicing, and it is possible to transfer the thin and thin semiconductor substrate while distinguishing the quality.

[Brief description of drawings]

1A to 1G are cross-sectional views taken along the line AA 'in FIG. 2A showing a dividing step of a thin layer semiconductor substrate according to an example.

FIG. 2A is a plan view of a single crystal silicon substrate having scribe lines formed by a dicing saw,
(B) is a plan view showing a thin layer single crystal silicon substrate mounted on an expander sheet and divided.

FIG. 3A is a plan view of a conventional single crystal silicon substrate, and FIG. 3B is a plan view showing a conventional single crystal silicon substrate having scribe lines formed by a dicing saw.

4A to 4E are cross-sectional views taken along the line BB ′ in FIG. 3, which schematically show a conventional dividing step of a single crystal silicon substrate.

[Explanation of symbols]

11 Single Crystal Silicon Substrate (Semiconductor Substrate) 11a Thinned Single Crystal Silicon Substrate (Thinned Semiconductor Substrate) 17 Through Hole 18 Groove 19 UV Curable Resin 20 Transparent Glass Substrate

[Procedure amendment]

[Submission date] November 26, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

[1 in FIG. 1] and

2A to 2G are sectional views taken along the line AA ′ in FIG. 2A, showing a dividing step of the thin-layer semiconductor substrate according to the example.

FIG. 2A is a plan view of a single crystal silicon substrate having scribe lines formed by a dicing saw,
(B) is a plan view showing a thin layer single crystal silicon substrate mounted on an expander sheet and divided.

FIG. 3A is a plan view of a conventional single crystal silicon substrate, and FIG. 3B is a plan view showing a conventional single crystal silicon substrate having scribe lines formed by a dicing saw.

[1 of FIG. 4] and

4 (a) to (e) are cross-sectional views taken along the line BB 'in FIG. 3 schematically showing a conventional dividing step of a single crystal silicon substrate.

[Explanation of Codes] 11 Single Crystal Silicon Substrate (Semiconductor Substrate) 11a Thinned Single Crystal Silicon Substrate (Thinned Semiconductor Substrate) 17 Through Hole 18 Groove 19 Ultraviolet Curing Resin 20 Transparent Glass Substrate

[Procedure Amendment 2]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[1 in FIG. 1]

[2 in FIG. 1]

[Fig. 2]

[Figure 3]

[1 in FIG. 4]

[2 in FIG. 4]

Continuation of front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical indication location S (72) Inventor Manabu Yumoto 22-22 Nagaike-cho, Abeno-ku, Osaka, Osaka

Claims (3)

[Claims] 1. A method for dividing a thin-layer semiconductor substrate in which a semiconductor substrate adhered to a transparent glass substrate is thinned and divided into chips. In a through-hole forming step, a through hole is previously formed in a region to be a dicing line of the semiconductor substrate. A step of forming a groove having the same depth as the hole depth, a step of thereafter adhering the transparent glass substrate to the semiconductor substrate and polishing the back surface of the semiconductor substrate, and further forming the semiconductor substrate on the transparent glass substrate A method for dividing a thin-layer semiconductor substrate, including a step of performing dicing on a position overlapping with the groove. 2. The method for dividing a thin-layer semiconductor substrate according to claim 1, wherein a transparent ultraviolet curable resin is used as an adhesive for adhering the transparent glass substrate and the semiconductor substrate. 3. The method for dividing a thin layer semiconductor substrate according to claim 1, wherein the through hole and the groove are formed by etching.